1 2018-01-19 Martin Liska <mliska@suse.cz>
3 * predict.c (dump_prediction): Add new format for
4 analyze_brprob.py script which is enabled with -details
6 * profile-count.h (precise_p): New function.
8 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
10 PR tree-optimization/83922
11 * tree-vect-loop.c (vect_verify_full_masking): Return false if
12 there are no statements that need masking.
13 (vect_active_double_reduction_p): New function.
14 (vect_analyze_loop_operations): Use it when handling phis that
15 are not in the loop header.
17 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
19 PR tree-optimization/83914
20 * tree-vect-loop.c (vectorizable_induction): Don't convert
21 init_expr or apply the peeling adjustment for inductions
22 that are nested within the vectorized loop.
24 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
29 2018-01-18 Jakub Jelinek <jakub@redhat.com>
33 * function.h (gimplify_parameters): Add gimple_seq * argument.
34 * function.c: Include gimple.h and options.h.
35 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
36 for the added local temporaries if needed.
37 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
38 if there are any parameter cleanups, wrap whole body into a
39 try/finally with the cleanups.
41 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
44 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
45 Use GET_MODE_CLASS for scalar floating point.
47 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
51 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
52 Fix call of call_cgraph_insertion_hooks.
54 2018-01-18 Martin Sebor <msebor@redhat.com>
56 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
58 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
61 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
64 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
67 * common.opt: (-ffile-prefix-map): New option.
68 * opts.c (common_handle_option): Defer it.
69 * opts-global.c (handle_common_deferred_options): Handle it.
70 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
71 * file-prefix-map.h: New file.
72 (remap_debug_filename, add_debug_prefix_map): ...here.
73 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
74 * final.c (debug_prefix_map, add_debug_prefix_map
75 remap_debug_filename): Move to...
76 * file-prefix-map.c: New file.
77 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
78 generalize, get rid of alloca(), use strrchr() instead of strchr().
79 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
80 Implement in terms of add_prefix_map().
81 (remap_macro_filename, remap_debug_filename): Implement in term of
83 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
84 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
85 * dbxout.c: Include file-prefix-map.h.
87 * vmsdbgout.c: Likewise.
88 * xcoffout.c: Likewise.
89 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
90 * doc/cppopts.texi (-fmacro-prefix-map): Document.
91 * doc/invoke.texi (-ffile-prefix-map): Document.
92 (-fdebug-prefix-map): Update description.
94 2018-01-18 Martin Liska <mliska@suse.cz>
96 * config/i386/i386.c (indirect_thunk_name): Document that also
98 (output_indirect_thunk): Document why both instructions
99 (pause and lfence) are generated.
101 2018-01-18 Richard Biener <rguenther@suse.de>
103 PR tree-optimization/83887
104 * graphite-scop-detection.c
105 (scop_detection::get_nearest_dom_with_single_entry): Remove.
106 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
107 (scop_detection::merge_sese): Re-implement with a flood-fill
108 algorithm that properly finds a SESE region if it exists.
110 2018-01-18 Jakub Jelinek <jakub@redhat.com>
113 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
114 pointer_diff optimizations use view_convert instead of convert.
116 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
118 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
119 Generate different code for -mno-speculate-indirect-jumps.
120 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
121 (*call_indirect_aix<mode>): Disable for
122 -mno-speculate-indirect-jumps.
123 (*call_indirect_aix<mode>_nospec): New define_insn.
124 (*call_value_indirect_aix<mode>): Disable for
125 -mno-speculate-indirect-jumps.
126 (*call_value_indirect_aix<mode>_nospec): New define_insn.
127 (*sibcall_nonlocal_sysv<mode>): Generate different code for
128 -mno-speculate-indirect-jumps.
129 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
131 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
133 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
134 long double type, set the flags for noting the default long double
135 type, even if we don't pass or return a long double type.
137 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
140 * ipa-inline.c (flatten_function): Do not overwrite final inlining
143 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
145 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
146 support for merge[hl].
147 (fold_mergehl_helper): New helper function.
148 (tree-vector-builder.h): New #include for tree_vector_builder usage.
149 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
150 (altivec_vmrglw_direct): Add xxmrglw insn.
152 2018-01-17 Andrew Waterman <andrew@sifive.com>
154 * config/riscv/riscv.c (riscv_conditional_register_usage): If
155 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
157 2018-01-17 David Malcolm <dmalcolm@redhat.com>
160 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
161 call the lto_location_cache before reading the
162 DECL_SOURCE_LOCATION of the types.
164 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
165 Richard Sandiford <richard.sandiford@linaro.org>
167 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
168 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
169 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
170 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
171 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
173 * config/aarch64/constraints.md (aarch64_movti_operand):
175 * config/aarch64/predicates.md (Uti): Add new constraint.
177 2018-01-17 Carl Love <cel@us.ibm.com>
178 * config/rs6000/vsx.md (define_expand xl_len_r,
179 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
180 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
182 (define_expand, define_insn): Move the shift left from the
183 define_insn to the define_expand for lxvl and stxvl instructions.
184 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
185 and XL_LEN_R definitions to PURE.
187 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
189 * config/i386/i386.c (indirect_thunk_name): Declare regno
190 as unsigned int. Compare regno with INVALID_REGNUM.
191 (output_indirect_thunk): Ditto.
192 (output_indirect_thunk_function): Ditto.
193 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
194 in the call to output_indirect_thunk_function.
196 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
199 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
200 rather than the size of inner_type to determine the stack slot size
201 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
203 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
206 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
209 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
211 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
212 endian Linux systems to optionally enable multilibs for selecting
213 the long double type if the user configured an explicit type.
214 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
215 have no long double multilibs if not defined.
216 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
217 warn if the user used -mabi={ieee,ibm}longdouble and we built
218 multilibs for long double.
219 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
220 appropriate multilib option.
221 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
223 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
224 for building long double multilibs.
225 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
227 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
229 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
232 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
234 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
237 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
240 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
243 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
245 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
246 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
248 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
250 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
251 different rtl trees depending on TARGET_64BIT.
252 (rs6000_gen_lvx): Likewise.
254 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
256 * config/visium/visium.md (nop): Tweak comment.
257 (hazard_nop): Likewise.
259 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
261 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
262 -mspeculate-indirect-jumps.
263 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
264 for -mno-speculate-indirect-jumps.
265 (*call_indirect_elfv2<mode>_nospec): New define_insn.
266 (*call_value_indirect_elfv2<mode>): Disable for
267 -mno-speculate-indirect-jumps.
268 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
269 (indirect_jump): Emit different RTL for
270 -mno-speculate-indirect-jumps.
271 (*indirect_jump<mode>): Disable for
272 -mno-speculate-indirect-jumps.
273 (*indirect_jump<mode>_nospec): New define_insn.
274 (tablejump): Emit different RTL for
275 -mno-speculate-indirect-jumps.
276 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
277 (tablejumpsi_nospec): New define_expand.
278 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
279 (tablejumpdi_nospec): New define_expand.
280 (*tablejump<mode>_internal1): Disable for
281 -mno-speculate-indirect-jumps.
282 (*tablejump<mode>_internal1_nospec): New define_insn.
283 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
286 2018-01-16 Artyom Skrobov tyomitch@gmail.com
288 * caller-save.c (insert_save): Drop unnecessary parameter. All
291 2018-01-16 Jakub Jelinek <jakub@redhat.com>
292 Richard Biener <rguenth@suse.de>
295 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
296 return early, inline manually is_gimple_sizepos. Make sure if we
297 call gimplify_expr we don't end up with a gimple constant.
298 * tree.c (variably_modified_type_p): Don't return true for
299 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
300 * gimplify.h (is_gimple_sizepos): Remove.
302 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
304 PR tree-optimization/83857
305 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
306 vectorizable_live_operation for pure SLP statements.
307 (vectorizable_live_operation): Handle PHIs.
309 2018-01-16 Richard Biener <rguenther@suse.de>
311 PR tree-optimization/83867
312 * tree-vect-stmts.c (vect_transform_stmt): Precompute
313 nested_in_vect_loop_p since the scalar stmt may get invalidated.
315 2018-01-16 Jakub Jelinek <jakub@redhat.com>
318 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
319 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
320 If off is not INTEGER_CST, issue a may not be aligned warning
321 rather than isn't aligned. Use isn%'t rather than isn't.
322 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
324 <case MULT_EXPR>: Improve the case when bottom and one of the
325 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
326 operand, in that case check if the other operand is multiple of
327 bottom divided by the INTEGER_CST operand.
329 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
332 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
333 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
334 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
335 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
336 * config/pa/pa.c (pa_function_arg_advance): Likewise.
337 (pa_function_arg, pa_arg_partial_bytes): Likewise.
338 (pa_function_arg_size): New function.
340 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
342 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
343 in a separate statement.
345 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
347 PR tree-optimization/83847
348 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
349 group gathers and scatters.
351 2018-01-16 Jakub Jelinek <jakub@redhat.com>
353 PR rtl-optimization/86620
354 * params.def (max-sched-ready-insns): Bump minimum value to 1.
356 PR rtl-optimization/83213
357 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
358 to last if both are JUMP_INSNs.
360 PR tree-optimization/83843
361 * gimple-ssa-store-merging.c
362 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
363 store_immediate_info for bswap/nop orig_stores.
365 2018-01-15 Andrew Waterman <andrew@sifive.com>
367 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
369 <UDIV>: Increase cost if !TARGET_DIV.
371 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
373 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
374 (define_attr "cr_logical_3op"): New.
375 (cceq_ior_compare): Adjust.
376 (cceq_ior_compare_complement): Adjust.
377 (*cceq_rev_compare): Adjust.
378 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
379 (is_cracked_insn): Adjust.
380 (insn_must_be_first_in_group): Adjust.
381 * config/rs6000/40x.md: Adjust.
382 * config/rs6000/440.md: Adjust.
383 * config/rs6000/476.md: Adjust.
384 * config/rs6000/601.md: Adjust.
385 * config/rs6000/603.md: Adjust.
386 * config/rs6000/6xx.md: Adjust.
387 * config/rs6000/7450.md: Adjust.
388 * config/rs6000/7xx.md: Adjust.
389 * config/rs6000/8540.md: Adjust.
390 * config/rs6000/cell.md: Adjust.
391 * config/rs6000/e300c2c3.md: Adjust.
392 * config/rs6000/e500mc.md: Adjust.
393 * config/rs6000/e500mc64.md: Adjust.
394 * config/rs6000/e5500.md: Adjust.
395 * config/rs6000/e6500.md: Adjust.
396 * config/rs6000/mpc.md: Adjust.
397 * config/rs6000/power4.md: Adjust.
398 * config/rs6000/power5.md: Adjust.
399 * config/rs6000/power6.md: Adjust.
400 * config/rs6000/power7.md: Adjust.
401 * config/rs6000/power8.md: Adjust.
402 * config/rs6000/power9.md: Adjust.
403 * config/rs6000/rs64.md: Adjust.
404 * config/rs6000/titan.md: Adjust.
406 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
408 * config/i386/predicates.md (indirect_branch_operand): Rewrite
409 ix86_indirect_branch_register logic.
411 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
413 * config/i386/constraints.md (Bs): Update
414 ix86_indirect_branch_register check. Don't check
415 ix86_indirect_branch_register with GOT_memory_operand.
417 * config/i386/predicates.md (GOT_memory_operand): Don't check
418 ix86_indirect_branch_register here.
419 (GOT32_symbol_operand): Likewise.
421 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
423 * config/i386/predicates.md (constant_call_address_operand):
424 Rewrite ix86_indirect_branch_register logic.
425 (sibcall_insn_operand): Likewise.
427 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
429 * config/i386/constraints.md (Bs): Replace
430 ix86_indirect_branch_thunk_register with
431 ix86_indirect_branch_register.
433 * config/i386/i386.md (indirect_jump): Likewise.
434 (tablejump): Likewise.
435 (*sibcall_memory): Likewise.
436 (*sibcall_value_memory): Likewise.
437 Peepholes of indirect call and jump via memory: Likewise.
438 * config/i386/i386.opt: Likewise.
439 * config/i386/predicates.md (indirect_branch_operand): Likewise.
440 (GOT_memory_operand): Likewise.
441 (call_insn_operand): Likewise.
442 (sibcall_insn_operand): Likewise.
443 (GOT32_symbol_operand): Likewise.
445 2018-01-15 Jakub Jelinek <jakub@redhat.com>
448 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
449 type rather than type addr's type points to.
450 (expand_omp_atomic_mutex): Likewise.
451 (expand_omp_atomic): Likewise.
453 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
456 * config/i386/i386.c (output_indirect_thunk_function): Use
457 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
458 for __x86_return_thunk.
460 2018-01-15 Richard Biener <rguenther@suse.de>
463 * expmed.c (extract_bit_field_1): Fix typo.
465 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
468 * config/arm/iterators.md (VF): New mode iterator.
469 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
470 Remove integer-related logic from pattern.
471 (neon_vabd<mode>_3): Likewise.
473 2018-01-15 Jakub Jelinek <jakub@redhat.com>
476 * common.opt (fstrict-overflow): No longer an alias.
477 (fwrapv-pointer): New option.
478 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
479 also for pointer types based on flag_wrapv_pointer.
480 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
481 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
482 opts->x_flag_wrapv got set.
483 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
484 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
485 POINTER_TYPE_OVERFLOW_UNDEFINED.
486 * match.pd: Likewise in address comparison pattern.
487 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
489 2018-01-15 Richard Biener <rguenther@suse.de>
492 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
493 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
494 Reset type names to their identifier if their TYPE_DECL doesn't
495 have linkage (and thus is used for ODR and devirt).
496 (save_debug_info_for_decl): Remove.
497 (save_debug_info_for_type): Likewise.
498 (add_tree_to_fld_list): Adjust.
499 * tree-pretty-print.c (dump_generic_node): Make dumping of
500 type names more robust.
502 2018-01-15 Richard Biener <rguenther@suse.de>
504 * BASE-VER: Bump to 8.0.1.
506 2018-01-14 Martin Sebor <msebor@redhat.com>
509 * builtins.c (check_access): Avoid warning when the no-warning bit
512 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
514 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
515 * ira-color (allocno_hard_regs_compare): Likewise.
517 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
520 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
521 Use .pushsection/.popsection.
523 2018-01-14 Martin Sebor <msebor@redhat.com>
526 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
528 2018-01-14 Jakub Jelinek <jakub@redhat.com>
530 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
531 entry from extra_headers.
532 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
533 extra_headers, make the list bitwise identical to the i?86-*-* one.
535 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
537 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
538 -mcmodel=large with -mindirect-branch=thunk,
539 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
540 -mfunction-return=thunk-extern.
541 * doc/invoke.texi: Document -mcmodel=large is incompatible with
542 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
543 -mfunction-return=thunk and -mfunction-return=thunk-extern.
545 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
547 * config/i386/i386.c (print_reg): Print the name of the full
548 integer register without '%'.
549 (ix86_print_operand): Handle 'V'.
550 * doc/extend.texi: Document 'V' modifier.
552 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
554 * config/i386/constraints.md (Bs): Disallow memory operand for
555 -mindirect-branch-register.
557 * config/i386/predicates.md (indirect_branch_operand): Likewise.
558 (GOT_memory_operand): Likewise.
559 (call_insn_operand): Likewise.
560 (sibcall_insn_operand): Likewise.
561 (GOT32_symbol_operand): Likewise.
562 * config/i386/i386.md (indirect_jump): Call convert_memory_address
563 for -mindirect-branch-register.
564 (tablejump): Likewise.
565 (*sibcall_memory): Likewise.
566 (*sibcall_value_memory): Likewise.
567 Disallow peepholes of indirect call and jump via memory for
568 -mindirect-branch-register.
569 (*call_pop): Replace m with Bw.
570 (*call_value_pop): Likewise.
571 (*sibcall_pop_memory): Replace m with Bs.
572 * config/i386/i386.opt (mindirect-branch-register): New option.
573 * doc/invoke.texi: Document -mindirect-branch-register option.
575 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
577 * config/i386/i386-protos.h (ix86_output_function_return): New.
578 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
579 set function_return_type.
580 (indirect_thunk_name): Add ret_p to indicate thunk for function
582 (output_indirect_thunk_function): Pass false to
584 (ix86_output_indirect_branch_via_reg): Likewise.
585 (ix86_output_indirect_branch_via_push): Likewise.
586 (output_indirect_thunk_function): Create alias for function
587 return thunk if regno < 0.
588 (ix86_output_function_return): New function.
589 (ix86_handle_fndecl_attribute): Handle function_return.
590 (ix86_attribute_table): Add function_return.
591 * config/i386/i386.h (machine_function): Add
592 function_return_type.
593 * config/i386/i386.md (simple_return_internal): Use
594 ix86_output_function_return.
595 (simple_return_internal_long): Likewise.
596 * config/i386/i386.opt (mfunction-return=): New option.
597 (indirect_branch): Mention -mfunction-return=.
598 * doc/extend.texi: Document function_return function attribute.
599 * doc/invoke.texi: Document -mfunction-return= option.
601 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
603 * config/i386/i386-opts.h (indirect_branch): New.
604 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
605 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
606 with local indirect jump when converting indirect call and jump.
607 (ix86_set_indirect_branch_type): New.
608 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
609 (indirectlabelno): New.
610 (indirect_thunk_needed): Likewise.
611 (indirect_thunk_bnd_needed): Likewise.
612 (indirect_thunks_used): Likewise.
613 (indirect_thunks_bnd_used): Likewise.
614 (INDIRECT_LABEL): Likewise.
615 (indirect_thunk_name): Likewise.
616 (output_indirect_thunk): Likewise.
617 (output_indirect_thunk_function): Likewise.
618 (ix86_output_indirect_branch_via_reg): Likewise.
619 (ix86_output_indirect_branch_via_push): Likewise.
620 (ix86_output_indirect_branch): Likewise.
621 (ix86_output_indirect_jmp): Likewise.
622 (ix86_code_end): Call output_indirect_thunk_function if needed.
623 (ix86_output_call_insn): Call ix86_output_indirect_branch if
625 (ix86_handle_fndecl_attribute): Handle indirect_branch.
626 (ix86_attribute_table): Add indirect_branch.
627 * config/i386/i386.h (machine_function): Add indirect_branch_type
628 and has_local_indirect_jump.
629 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
631 (tablejump): Likewise.
632 (*indirect_jump): Use ix86_output_indirect_jmp.
633 (*tablejump_1): Likewise.
634 (simple_return_indirect_internal): Likewise.
635 * config/i386/i386.opt (mindirect-branch=): New option.
636 (indirect_branch): New.
639 (thunk-inline): Likewise.
640 (thunk-extern): Likewise.
641 * doc/extend.texi: Document indirect_branch function attribute.
642 * doc/invoke.texi: Document -mindirect-branch= option.
644 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
647 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
649 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
651 * ipa-inline.c (want_inline_small_function_p): Return false if
652 inlining has already failed with CIF_FINAL_ERROR.
653 (update_caller_keys): Call want_inline_small_function_p before
655 (update_callee_keys): Likewise.
657 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
659 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
661 (rs6000_quadword_masked_address_p): Likewise.
662 (quad_aligned_load_p): Likewise.
663 (quad_aligned_store_p): Likewise.
664 (const_load_sequence_p): Add comment to describe the outer-most loop.
665 (mimic_memory_attributes_and_flags): New function.
666 (rs6000_gen_stvx): Likewise.
667 (replace_swapped_aligned_store): Likewise.
668 (rs6000_gen_lvx): Likewise.
669 (replace_swapped_aligned_load): Likewise.
670 (replace_swapped_load_constant): Capitalize argument name in
671 comment describing this function.
672 (rs6000_analyze_swaps): Add a third pass to search for vector loads
673 and stores that access quad-word aligned addresses and replace
674 with stvx or lvx instructions when appropriate.
675 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
676 New function prototype.
677 (rs6000_quadword_masked_address_p): Likewise.
678 (rs6000_gen_lvx): Likewise.
679 (rs6000_gen_stvx): Likewise.
680 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
681 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
682 when memory address is aligned.
683 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
684 this split to select lvx instruction when memory address is aligned.
685 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
686 instruction when memory address is aligned.
687 (*vsx_le_perm_load_v16qi): Likewise.
688 (four unnamed splitters): Modify to select the stvx instruction
689 when memory is aligned.
691 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
693 * predict.c (determine_unlikely_bbs): Handle correctly BBs
694 which appears in the queue multiple times.
696 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
697 Alan Hayward <alan.hayward@arm.com>
698 David Sherwood <david.sherwood@arm.com>
700 * tree-vectorizer.h (vec_lower_bound): New structure.
701 (_loop_vec_info): Add check_nonzero and lower_bounds.
702 (LOOP_VINFO_CHECK_NONZERO): New macro.
703 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
704 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
705 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
706 fields. Make seg_len the distance travelled, not including the
708 (dr_direction_indicator): Declare.
709 (dr_zero_step_indicator): Likewise.
710 (dr_known_forward_stride_p): Likewise.
711 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
713 (runtime_alias_check_p): Allow runtime alias checks with
715 (operator ==): Compare access_size and align.
716 (prune_runtime_alias_test_list): Rework for new distinction between
717 the access_size and seg_len.
718 (create_intersect_range_checks_index): Likewise. Cope with polynomial
720 (get_segment_min_max): New function.
721 (create_intersect_range_checks): Use it.
722 (dr_step_indicator): New function.
723 (dr_direction_indicator): Likewise.
724 (dr_zero_step_indicator): Likewise.
725 (dr_known_forward_stride_p): Likewise.
726 * tree-loop-distribution.c (data_ref_segment_size): Return
727 DR_STEP * (niters - 1).
728 (compute_alias_check_pairs): Update call to the dr_with_seg_len
730 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
731 (vect_preserves_scalar_order_p): New function, split out from...
732 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
733 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
734 (vect_vfa_access_size): New function.
735 (vect_vfa_align): Likewise.
736 (vect_compile_time_alias): Take access_size_a and access_b arguments.
737 (dump_lower_bound): New function.
738 (vect_check_lower_bound): Likewise.
739 (vect_small_gap_p): Likewise.
740 (vectorizable_with_step_bound_p): Likewise.
741 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
742 depencies if the vectorization factor is 1. Convert the checks
743 for nonzero steps into checks on the bounds of DR_STEP. Try using
744 a bunds check for variable steps if the minimum required step is
745 relatively small. Update calls to the dr_with_seg_len
746 constructor and to vect_compile_time_alias.
747 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
749 (vect_loop_versioning): Call it.
750 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
752 (vect_estimate_min_profitable_iters): Account for any bounds checks.
754 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
755 Alan Hayward <alan.hayward@arm.com>
756 David Sherwood <david.sherwood@arm.com>
758 * doc/sourcebuild.texi (vect_scatter_store): Document.
759 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
761 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
763 * genopinit.c (main): Add supports_vec_scatter_store and
764 supports_vec_scatter_store_cached to target_optabs.
765 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
766 IFN_MASK_SCATTER_STORE.
767 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
769 * internal-fn.h (internal_store_fn_p): Declare.
770 (internal_fn_stored_value_index): Likewise.
771 * internal-fn.c (scatter_store_direct): New macro.
772 (expand_scatter_store_optab_fn): New function.
773 (direct_scatter_store_optab_supported_p): New macro.
774 (internal_store_fn_p): New function.
775 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
776 IFN_MASK_SCATTER_STORE.
777 (internal_fn_mask_index): Likewise.
778 (internal_fn_stored_value_index): New function.
779 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
781 * optabs-query.h (supports_vec_scatter_store_p): Declare.
782 * optabs-query.c (supports_vec_scatter_store_p): New function.
783 * tree-vectorizer.h (vect_get_store_rhs): Declare.
784 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
785 true for scatter stores.
786 (vect_gather_scatter_fn_p): Handle scatter stores too.
787 (vect_check_gather_scatter): Consider using scatter stores if
788 supports_vec_scatter_store_p.
789 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
791 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
792 internal_fn_stored_value_index.
793 (check_load_store_masking): Handle scatter stores too.
794 (vect_get_store_rhs): Make public.
795 (vectorizable_call): Use internal_store_fn_p.
796 (vectorizable_store): Handle scatter store internal functions.
797 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
798 when deciding whether the end of the group has been reached.
799 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
800 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
801 (mask_scatter_store<mode>): New insns.
803 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
804 Alan Hayward <alan.hayward@arm.com>
805 David Sherwood <david.sherwood@arm.com>
807 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
808 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
809 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
811 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
812 Use vect_truncate_gather_scatter_offset if we can't treat the
813 operation as a normal gather load or scatter store.
814 (get_group_load_store_type): Take the gather_scatter_info
815 as argument. Try using a gather load or scatter store for
816 single-element groups.
817 (get_load_store_type): Update calls to get_group_load_store_type
818 and vect_use_strided_gather_scatters_p.
820 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
821 Alan Hayward <alan.hayward@arm.com>
822 David Sherwood <david.sherwood@arm.com>
824 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
825 optional tree argument.
826 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
828 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
829 but continue to use the current value as a fallback.
830 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
831 to compare the updates.
832 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
833 (get_load_store_type): Use it when handling a strided access.
834 (vect_get_strided_load_store_ops): New function.
835 (vect_get_data_ptr_increment): Likewise.
836 (vectorizable_load): Handle strided gather loads. Always pass
837 a step to vect_create_data_ref_ptr and bump_vector_ptr.
839 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
840 Alan Hayward <alan.hayward@arm.com>
841 David Sherwood <david.sherwood@arm.com>
843 * doc/md.texi (gather_load@var{m}): Document.
844 (mask_gather_load@var{m}): Likewise.
845 * genopinit.c (main): Add supports_vec_gather_load and
846 supports_vec_gather_load_cached to target_optabs.
847 * optabs-tree.c (init_tree_optimization_optabs): Use
848 ggc_cleared_alloc to allocate target_optabs.
849 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
850 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
852 * internal-fn.h (internal_load_fn_p): Declare.
853 (internal_gather_scatter_fn_p): Likewise.
854 (internal_fn_mask_index): Likewise.
855 (internal_gather_scatter_fn_supported_p): Likewise.
856 * internal-fn.c (gather_load_direct): New macro.
857 (expand_gather_load_optab_fn): New function.
858 (direct_gather_load_optab_supported_p): New macro.
859 (direct_internal_fn_optab): New function.
860 (internal_load_fn_p): Likewise.
861 (internal_gather_scatter_fn_p): Likewise.
862 (internal_fn_mask_index): Likewise.
863 (internal_gather_scatter_fn_supported_p): Likewise.
864 * optabs-query.c (supports_at_least_one_mode_p): New function.
865 (supports_vec_gather_load_p): Likewise.
866 * optabs-query.h (supports_vec_gather_load_p): Declare.
867 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
868 and memory_type field.
869 (NUM_PATTERNS): Bump to 15.
870 * tree-vect-data-refs.c: Include internal-fn.h.
871 (vect_gather_scatter_fn_p): New function.
872 (vect_describe_gather_scatter_call): Likewise.
873 (vect_check_gather_scatter): Try using internal functions for
874 gather loads. Recognize existing calls to a gather load function.
875 (vect_analyze_data_refs): Consider using gather loads if
876 supports_vec_gather_load_p.
877 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
878 (vect_get_gather_scatter_offset_type): Likewise.
879 (vect_convert_mask_for_vectype): Likewise.
880 (vect_add_conversion_to_patterm): Likewise.
881 (vect_try_gather_scatter_pattern): Likewise.
882 (vect_recog_gather_scatter_pattern): New pattern recognizer.
883 (vect_vect_recog_func_ptrs): Add it.
884 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
885 internal_fn_mask_index and internal_gather_scatter_fn_p.
886 (check_load_store_masking): Take the gather_scatter_info as an
887 argument and handle gather loads.
888 (vect_get_gather_scatter_ops): New function.
889 (vectorizable_call): Check internal_load_fn_p.
890 (vectorizable_load): Likewise. Handle gather load internal
892 (vectorizable_store): Update call to check_load_store_masking.
893 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
894 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
895 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
896 (aarch64_gather_scale_operand_d): New predicates.
897 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
898 (mask_gather_load<mode>): New insns.
900 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
901 Alan Hayward <alan.hayward@arm.com>
902 David Sherwood <david.sherwood@arm.com>
904 * optabs.def (fold_left_plus_optab): New optab.
905 * doc/md.texi (fold_left_plus_@var{m}): Document.
906 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
907 * internal-fn.c (fold_left_direct): Define.
908 (expand_fold_left_optab_fn): Likewise.
909 (direct_fold_left_optab_supported_p): Likewise.
910 * fold-const-call.c (fold_const_fold_left): New function.
911 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
912 * tree-parloops.c (valid_reduction_p): New function.
913 (gather_scalar_reductions): Use it.
914 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
915 (vect_finish_replace_stmt): Declare.
916 * tree-vect-loop.c (fold_left_reduction_fn): New function.
917 (needs_fold_left_reduction_p): New function, split out from...
918 (vect_is_simple_reduction): ...here. Accept reductions that
919 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
920 (vect_force_simple_reduction): Also store the reduction type in
921 the assignment's STMT_VINFO_REDUC_TYPE.
922 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
923 (merge_with_identity): New function.
924 (vect_expand_fold_left): Likewise.
925 (vectorize_fold_left_reduction): Likewise.
926 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
927 scalar phi in place for it. Check for target support and reject
928 cases that would reassociate the operation. Defer the transform
929 phase to vectorize_fold_left_reduction.
930 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
931 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
932 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
934 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
936 * tree-if-conv.c (predicate_mem_writes): Remove redundant
937 call to ifc_temp_var.
939 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
940 Alan Hayward <alan.hayward@arm.com>
941 David Sherwood <david.sherwood@arm.com>
943 * target.def (legitimize_address_displacement): Take the original
944 offset as a poly_int.
945 * targhooks.h (default_legitimize_address_displacement): Update
947 * targhooks.c (default_legitimize_address_displacement): Likewise.
948 * doc/tm.texi: Regenerate.
949 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
950 as an argument, moving assert of ad->disp == ad->disp_term to...
951 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
952 Try calling targetm.legitimize_address_displacement before expanding
953 the address rather than afterwards, and adjust for the new interface.
954 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
955 Match the new hook interface. Handle SVE addresses.
956 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
959 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
961 * Makefile.in (OBJS): Add early-remat.o.
962 * target.def (select_early_remat_modes): New hook.
963 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
964 * doc/tm.texi: Regenerate.
965 * targhooks.h (default_select_early_remat_modes): Declare.
966 * targhooks.c (default_select_early_remat_modes): New function.
967 * timevar.def (TV_EARLY_REMAT): New timevar.
968 * passes.def (pass_early_remat): New pass.
969 * tree-pass.h (make_pass_early_remat): Declare.
970 * early-remat.c: New file.
971 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
973 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
975 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
976 Alan Hayward <alan.hayward@arm.com>
977 David Sherwood <david.sherwood@arm.com>
979 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
980 vfm1 with a bound_epilog parameter.
981 (vect_do_peeling): Update calls accordingly, and move the prologue
982 call earlier in the function. Treat the base bound_epilog as 0 for
983 fully-masked loops and retain vf - 1 for other loops. Add 1 to
984 this base when peeling for gaps.
985 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
986 with fully-masked loops.
987 (vect_estimate_min_profitable_iters): Handle the single peeled
988 iteration in that case.
990 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
991 Alan Hayward <alan.hayward@arm.com>
992 David Sherwood <david.sherwood@arm.com>
994 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
995 single-element interleaving even if the size is not a power of 2.
996 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
997 accesses for single-element interleaving if the group size is
1000 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1001 Alan Hayward <alan.hayward@arm.com>
1002 David Sherwood <david.sherwood@arm.com>
1004 * doc/md.texi (fold_extract_last_@var{m}): Document.
1005 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1006 * optabs.def (fold_extract_last_optab): New optab.
1007 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1008 * internal-fn.c (fold_extract_direct): New macro.
1009 (expand_fold_extract_optab_fn): Likewise.
1010 (direct_fold_extract_optab_supported_p): Likewise.
1011 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1012 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1013 EXTRACT_LAST_REDUCTION.
1014 (get_initial_def_for_reduction): Do not create an initial vector
1015 for EXTRACT_LAST_REDUCTION reductions.
1016 (vectorizable_reduction): Leave the scalar phi in place for
1017 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1018 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1019 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1020 transform phase to vectorizable_condition.
1021 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1023 (vect_finish_stmt_generation): ...here.
1024 (vect_finish_replace_stmt): New function.
1025 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1026 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1028 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1030 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1031 Alan Hayward <alan.hayward@arm.com>
1032 David Sherwood <david.sherwood@arm.com>
1034 * doc/md.texi (extract_last_@var{m}): Document.
1035 * optabs.def (extract_last_optab): New optab.
1036 * internal-fn.def (EXTRACT_LAST): New internal function.
1037 * internal-fn.c (cond_unary_direct): New macro.
1038 (expand_cond_unary_optab_fn): Likewise.
1039 (direct_cond_unary_optab_supported_p): Likewise.
1040 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1041 loops using EXTRACT_LAST.
1042 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1043 (extract_last_<mode>): ...this optab.
1044 (vec_extract<mode><Vel>): Update accordingly.
1046 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1047 Alan Hayward <alan.hayward@arm.com>
1048 David Sherwood <david.sherwood@arm.com>
1050 * target.def (empty_mask_is_expensive): New hook.
1051 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1052 * doc/tm.texi: Regenerate.
1053 * targhooks.h (default_empty_mask_is_expensive): Declare.
1054 * targhooks.c (default_empty_mask_is_expensive): New function.
1055 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1056 if the target says that empty masks are expensive.
1057 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1059 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1061 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1062 Alan Hayward <alan.hayward@arm.com>
1063 David Sherwood <david.sherwood@arm.com>
1065 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1066 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1067 (vect_use_loop_mask_for_alignment_p): New function.
1068 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1069 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1070 niters_skip argument. Make sure that the first niters_skip elements
1071 of the first iteration are inactive.
1072 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1073 Update call to vect_set_loop_masks_directly.
1074 (get_misalign_in_elems): New function, split out from...
1075 (vect_gen_prolog_loop_niters): ...here.
1076 (vect_update_init_of_dr): Take a code argument that specifies whether
1077 the adjustment should be added or subtracted.
1078 (vect_update_init_of_drs): Likewise.
1079 (vect_prepare_for_masked_peels): New function.
1080 (vect_do_peeling): Skip prologue peeling if we're using a mask
1081 instead. Update call to vect_update_inits_of_drs.
1082 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1084 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1085 alignment. Do not include the number of peeled iterations in
1086 the minimum threshold in that case.
1087 (vectorizable_induction): Adjust the start value down by
1088 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1089 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1090 Take the number of skipped iterations into account when calculating
1092 * tree-vect-stmts.c (vect_gen_while_not): New function.
1094 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1095 Alan Hayward <alan.hayward@arm.com>
1096 David Sherwood <david.sherwood@arm.com>
1098 * doc/sourcebuild.texi (vect_fully_masked): Document.
1099 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1101 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1103 (vect_analyze_loop_2): ...here. Don't check the vectorization
1104 factor against the number of loop iterations if the loop is
1107 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1108 Alan Hayward <alan.hayward@arm.com>
1109 David Sherwood <david.sherwood@arm.com>
1111 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1112 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1113 (dump_groups): Update accordingly.
1114 (iv_use::mem_type): New member variable.
1115 (address_p): New function.
1116 (record_use): Add a mem_type argument and initialize the new
1118 (record_group_use): Add a mem_type argument. Use address_p.
1119 Remove obsolete null checks of base_object. Update call to record_use.
1120 (find_interesting_uses_op): Update call to record_group_use.
1121 (find_interesting_uses_cond): Likewise.
1122 (find_interesting_uses_address): Likewise.
1123 (get_mem_type_for_internal_fn): New function.
1124 (find_address_like_use): Likewise.
1125 (find_interesting_uses_stmt): Try find_address_like_use before
1126 calling find_interesting_uses_op.
1127 (addr_offset_valid_p): Use the iv mem_type field as the type
1128 of the addressed memory.
1129 (add_autoinc_candidates): Likewise.
1130 (get_address_cost): Likewise.
1131 (split_small_address_groups_p): Use address_p.
1132 (split_address_groups): Likewise.
1133 (add_iv_candidate_for_use): Likewise.
1134 (autoinc_possible_for_pair): Likewise.
1135 (rewrite_groups): Likewise.
1136 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1137 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1138 (get_alias_ptr_type_for_ptr_address): New function.
1139 (rewrite_use_address): Rewrite address uses in calls that were
1140 identified by find_address_like_use.
1142 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1143 Alan Hayward <alan.hayward@arm.com>
1144 David Sherwood <david.sherwood@arm.com>
1146 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1148 * gimple-expr.h (is_gimple_addressable: Likewise.
1149 * gimple-expr.c (is_gimple_address): Likewise.
1150 * internal-fn.c (expand_call_mem_ref): New function.
1151 (expand_mask_load_optab_fn): Use it.
1152 (expand_mask_store_optab_fn): Likewise.
1154 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1155 Alan Hayward <alan.hayward@arm.com>
1156 David Sherwood <david.sherwood@arm.com>
1158 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1159 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1160 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1161 (cond_umax@var{mode}): Document.
1162 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1163 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1164 (cond_umin_optab, cond_umax_optab): New optabs.
1165 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1166 (COND_IOR, COND_XOR): New internal functions.
1167 * internal-fn.h (get_conditional_internal_fn): Declare.
1168 * internal-fn.c (cond_binary_direct): New macro.
1169 (expand_cond_binary_optab_fn): Likewise.
1170 (direct_cond_binary_optab_supported_p): Likewise.
1171 (get_conditional_internal_fn): New function.
1172 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1173 Cope with reduction statements that are vectorized as calls rather
1175 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1176 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1177 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1178 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1179 (UNSPEC_COND_EOR): New unspecs.
1180 (optab): Add mappings for them.
1181 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1182 (sve_int_op, sve_fp_op): New int attributes.
1184 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1185 Alan Hayward <alan.hayward@arm.com>
1186 David Sherwood <david.sherwood@arm.com>
1188 * optabs.def (while_ult_optab): New optab.
1189 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1190 * internal-fn.def (WHILE_ULT): New internal function.
1191 * internal-fn.h (direct_internal_fn_supported_p): New override
1192 that takes two types as argument.
1193 * internal-fn.c (while_direct): New macro.
1194 (expand_while_optab_fn): New function.
1195 (convert_optab_supported_p): Likewise.
1196 (direct_while_optab_supported_p): New macro.
1197 * wide-int.h (wi::udiv_ceil): New function.
1198 * tree-vectorizer.h (rgroup_masks): New structure.
1199 (vec_loop_masks): New typedef.
1200 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1202 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1203 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1204 (vect_max_vf): New function.
1205 (slpeel_make_loop_iterate_ntimes): Delete.
1206 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1207 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1208 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1209 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1210 internal-fn.h, stor-layout.h and optabs-query.h.
1211 (vect_set_loop_mask): New function.
1212 (add_preheader_seq): Likewise.
1213 (add_header_seq): Likewise.
1214 (interleave_supported_p): Likewise.
1215 (vect_maybe_permute_loop_masks): Likewise.
1216 (vect_set_loop_masks_directly): Likewise.
1217 (vect_set_loop_condition_masked): Likewise.
1218 (vect_set_loop_condition_unmasked): New function, split out from
1219 slpeel_make_loop_iterate_ntimes.
1220 (slpeel_make_loop_iterate_ntimes): Rename to..
1221 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1222 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1223 (vect_do_peeling): Update call accordingly.
1224 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1226 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1227 mask_compare_type, can_fully_mask_p and fully_masked_p.
1228 (release_vec_loop_masks): New function.
1229 (_loop_vec_info): Use it to free the loop masks.
1230 (can_produce_all_loop_masks_p): New function.
1231 (vect_get_max_nscalars_per_iter): Likewise.
1232 (vect_verify_full_masking): Likewise.
1233 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1234 retries, and free the mask rgroups before retrying. Check loop-wide
1235 reasons for disallowing fully-masked loops. Make the final decision
1236 about whether use a fully-masked loop or not.
1237 (vect_estimate_min_profitable_iters): Do not assume that peeling
1238 for the number of iterations will be needed for fully-masked loops.
1239 (vectorizable_reduction): Disable fully-masked loops.
1240 (vectorizable_live_operation): Likewise.
1241 (vect_halve_mask_nunits): New function.
1242 (vect_double_mask_nunits): Likewise.
1243 (vect_record_loop_mask): Likewise.
1244 (vect_get_loop_mask): Likewise.
1245 (vect_transform_loop): Handle the case in which the final loop
1246 iteration might handle a partial vector. Call vect_set_loop_condition
1247 instead of slpeel_make_loop_iterate_ntimes.
1248 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1249 (check_load_store_masking): New function.
1250 (prepare_load_store_mask): Likewise.
1251 (vectorizable_store): Handle fully-masked loops.
1252 (vectorizable_load): Likewise.
1253 (supportable_widening_operation): Use vect_halve_mask_nunits for
1255 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1256 (vect_gen_while): New function.
1257 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1258 (aarch64_uqdec<mode>): New insn.
1260 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1261 Alan Hayward <alan.hayward@arm.com>
1262 David Sherwood <david.sherwood@arm.com>
1264 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1265 (reduc_xor_scal_optab): New optabs.
1266 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1267 (reduc_xor_scal_@var{m}): Document.
1268 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1269 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1271 * fold-const-call.c (fold_const_call): Handle them.
1272 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1273 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1274 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1275 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1276 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1277 (UNSPEC_XORV): New unspecs.
1278 (optab): Add entries for them.
1279 (BITWISEV): New int iterator.
1280 (bit_reduc_op): New int attributes.
1282 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1283 Alan Hayward <alan.hayward@arm.com>
1284 David Sherwood <david.sherwood@arm.com>
1286 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1287 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1288 * optabs.def (vec_shl_insert_optab): New optab.
1289 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1290 (duplicate_and_interleave): Likewise.
1291 * tree-vect-loop.c: Include internal-fn.h.
1292 (neutral_op_for_slp_reduction): New function, split out from
1293 get_initial_defs_for_reduction.
1294 (get_initial_def_for_reduction): Handle option 2 for variable-length
1295 vectors by loading the neutral value into a vector and then shifting
1296 the initial value into element 0.
1297 (get_initial_defs_for_reduction): Replace the code argument with
1298 the neutral value calculated by neutral_op_for_slp_reduction.
1299 Use gimple_build_vector for constant-length vectors.
1300 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1301 but the first group_size elements have a neutral value.
1302 Use duplicate_and_interleave otherwise.
1303 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1304 Update call to get_initial_defs_for_reduction. Handle SLP
1305 reductions for variable-length vectors by creating one vector
1306 result for each scalar result, with the elements associated
1307 with other scalar results stubbed out with the neutral value.
1308 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1309 Require IFN_VEC_SHL_INSERT for double reductions on
1310 variable-length vectors, or SLP reductions that have
1311 a neutral value. Require can_duplicate_and_interleave_p
1312 support for variable-length unchained SLP reductions if there
1313 is no neutral value, such as for MIN/MAX reductions. Also require
1314 the number of vector elements to be a multiple of the number of
1315 SLP statements when doing variable-length unchained SLP reductions.
1316 Update call to vect_create_epilog_for_reduction.
1317 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1318 and remove initial values.
1319 (duplicate_and_interleave): Make public.
1320 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1321 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1323 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1324 Alan Hayward <alan.hayward@arm.com>
1325 David Sherwood <david.sherwood@arm.com>
1327 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1328 (can_duplicate_and_interleave_p): New function.
1329 (vect_get_and_check_slp_defs): Take the vector of statements
1330 rather than just the current one. Remove excess parentheses.
1331 Restriction rejectinon of vect_constant_def and vect_external_def
1332 for variable-length vectors to boolean types, or types for which
1333 can_duplicate_and_interleave_p is false.
1334 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1335 (duplicate_and_interleave): New function.
1336 (vect_get_constant_vectors): Use gimple_build_vector for
1337 constant-length vectors and suitable variable-length constant
1338 vectors. Use duplicate_and_interleave for other variable-length
1339 vectors. Don't defer the update when inserting new statements.
1341 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1342 Alan Hayward <alan.hayward@arm.com>
1343 David Sherwood <david.sherwood@arm.com>
1345 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1346 min_profitable_iters doesn't go negative.
1348 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1349 Alan Hayward <alan.hayward@arm.com>
1350 David Sherwood <david.sherwood@arm.com>
1352 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1353 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1354 * optabs.def (vec_mask_load_lanes_optab): New optab.
1355 (vec_mask_store_lanes_optab): Likewise.
1356 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1357 (MASK_STORE_LANES): Likewise.
1358 * internal-fn.c (mask_load_lanes_direct): New macro.
1359 (mask_store_lanes_direct): Likewise.
1360 (expand_mask_load_optab_fn): Handle masked operations.
1361 (expand_mask_load_lanes_optab_fn): New macro.
1362 (expand_mask_store_optab_fn): Handle masked operations.
1363 (expand_mask_store_lanes_optab_fn): New macro.
1364 (direct_mask_load_lanes_optab_supported_p): Likewise.
1365 (direct_mask_store_lanes_optab_supported_p): Likewise.
1366 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1368 (vect_load_lanes_supported): Likewise.
1369 * tree-vect-data-refs.c (strip_conversion): New function.
1370 (can_group_stmts_p): Likewise.
1371 (vect_analyze_data_ref_accesses): Use it instead of checking
1372 for a pair of assignments.
1373 (vect_store_lanes_supported): Take a masked_p parameter.
1374 (vect_load_lanes_supported): Likewise.
1375 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1376 vect_store_lanes_supported and vect_load_lanes_supported.
1377 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1378 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1379 parameter. Don't allow gaps for masked accesses.
1380 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1381 and vect_load_lanes_supported.
1382 (get_load_store_type): Take a masked_p parameter and update
1383 call to get_group_load_store_type.
1384 (vectorizable_store): Update call to get_load_store_type.
1385 Handle IFN_MASK_STORE_LANES.
1386 (vectorizable_load): Update call to get_load_store_type.
1387 Handle IFN_MASK_LOAD_LANES.
1389 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1390 Alan Hayward <alan.hayward@arm.com>
1391 David Sherwood <david.sherwood@arm.com>
1393 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1395 * config/aarch64/aarch64-protos.h
1396 (aarch64_sve_struct_memory_operand_p): Declare.
1397 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1398 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1399 (VPRED, vpred): Handle SVE structure modes.
1400 * config/aarch64/constraints.md (Utx): New constraint.
1401 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1402 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1403 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1404 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1405 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1406 structure modes. Split into pieces after RA.
1407 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1408 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1410 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1411 SVE structure modes.
1412 (aarch64_classify_address): Likewise.
1413 (sizetochar): Move earlier in file.
1414 (aarch64_print_operand): Handle SVE register lists.
1415 (aarch64_array_mode): New function.
1416 (aarch64_sve_struct_memory_operand_p): Likewise.
1417 (TARGET_ARRAY_MODE): Redefine.
1419 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1420 Alan Hayward <alan.hayward@arm.com>
1421 David Sherwood <david.sherwood@arm.com>
1423 * target.def (array_mode): New target hook.
1424 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1425 * doc/tm.texi: Regenerate.
1426 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1427 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1428 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1430 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1433 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1434 Alan Hayward <alan.hayward@arm.com>
1435 David Sherwood <david.sherwood@arm.com>
1437 * fold-const.c (fold_binary_loc): Check the argument types
1438 rather than the result type when testing for a vector operation.
1440 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1442 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1443 * doc/tm.texi: Regenerate.
1445 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1446 Alan Hayward <alan.hayward@arm.com>
1447 David Sherwood <david.sherwood@arm.com>
1449 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1450 (sve): Document new AArch64 extension.
1451 * doc/md.texi (w): Extend the description of the AArch64
1452 constraint to include SVE vectors.
1453 (Upl, Upa): Document new AArch64 predicate constraints.
1454 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1456 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1457 (msve-vector-bits=): New option.
1458 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1459 SVE when these are disabled.
1460 (sve): New extension.
1461 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1462 modes. Adjust their number of units based on aarch64_sve_vg.
1463 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1464 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1465 aarch64_addr_query_type.
1466 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1467 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1468 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1469 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1470 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1471 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1472 (aarch64_simd_imm_zero_p): Delete.
1473 (aarch64_check_zero_based_sve_index_immediate): Declare.
1474 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1475 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1476 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1477 (aarch64_sve_float_mul_immediate_p): Likewise.
1478 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1480 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1481 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1482 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1483 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1484 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1485 (aarch64_regmode_natural_size): Likewise.
1486 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1487 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1489 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1490 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1491 for VG and the SVE predicate registers.
1492 (V_ALIASES): Add a "z"-prefixed alias.
1493 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1494 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1495 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1496 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1497 (REG_CLASS_NAMES): Add entries for them.
1498 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1499 and the predicate registers.
1500 (aarch64_sve_vg): Declare.
1501 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1502 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1503 (REGMODE_NATURAL_SIZE): Define.
1504 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1506 * config/aarch64/aarch64.c: Include cfgrtl.h.
1507 (simd_immediate_info): Add a constructor for series vectors,
1508 and an associated step field.
1509 (aarch64_sve_vg): New variable.
1510 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1511 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1512 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1513 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1514 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1515 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1516 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1517 (aarch64_get_mask_mode): New functions.
1518 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1519 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1520 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1521 predicate modes and predicate registers. Explicitly restrict
1522 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1523 to store a vector mode if it is recognized by
1524 aarch64_classify_vector_mode.
1525 (aarch64_regmode_natural_size): New function.
1526 (aarch64_hard_regno_caller_save_mode): Return the original mode
1528 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1529 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1530 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1531 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1533 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1534 does not overlap dest if the function is frame-related. Handle
1536 (aarch64_split_add_offset): New function.
1537 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1538 them aarch64_add_offset.
1539 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1540 and update call to aarch64_sub_sp.
1541 (aarch64_add_cfa_expression): New function.
1542 (aarch64_expand_prologue): Pass extra temporary registers to the
1543 functions above. Handle the case in which we need to emit new
1544 DW_CFA_expressions for registers that were originally saved
1545 relative to the stack pointer, but now have to be expressed
1546 relative to the frame pointer.
1547 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1549 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1550 IP0 and IP1 values for SVE frames.
1551 (aarch64_expand_vec_series): New function.
1552 (aarch64_expand_sve_widened_duplicate): Likewise.
1553 (aarch64_expand_sve_const_vector): Likewise.
1554 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1555 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1556 into the register, rather than emitting a SET directly.
1557 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1558 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1559 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1560 (offset_9bit_signed_scaled_p): New functions.
1561 (aarch64_replicate_bitmask_imm): New function.
1562 (aarch64_bitmask_imm): Use it.
1563 (aarch64_cannot_force_const_mem): Reject expressions involving
1564 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1565 (aarch64_classify_index): Handle SVE indices, by requiring
1566 a plain register index with a scale that matches the element size.
1567 (aarch64_classify_address): Handle SVE addresses. Assert that
1568 the mode of the address is VOIDmode or an integer mode.
1569 Update call to aarch64_classify_symbol.
1570 (aarch64_classify_symbolic_expression): Update call to
1571 aarch64_classify_symbol.
1572 (aarch64_const_vec_all_in_range_p): New function.
1573 (aarch64_print_vector_float_operand): Likewise.
1574 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1575 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1576 and the FP immediates 1.0 and 0.5.
1577 (aarch64_print_address_internal): Handle SVE addresses.
1578 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1579 (aarch64_regno_regclass): Handle predicate registers.
1580 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1582 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1583 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1584 (aarch64_convert_sve_vector_bits): New function.
1585 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1586 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1588 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1589 Handle SVE vector and predicate modes. Accept VL-based constants
1590 that need only one temporary register, and VL offsets that require
1591 no temporary registers.
1592 (aarch64_conditional_register_usage): Mark the predicate registers
1593 as fixed if SVE isn't available.
1594 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1595 Return true for SVE vector and predicate modes.
1596 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1597 rather than an unsigned int. Handle SVE modes.
1598 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1600 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1602 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1603 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1604 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1605 (aarch64_sve_float_mul_immediate_p): New functions.
1606 (aarch64_sve_valid_immediate): New function.
1607 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1608 Explicitly reject structure modes. Check for INDEX constants.
1609 Handle PTRUE and PFALSE constants.
1610 (aarch64_check_zero_based_sve_index_immediate): New function.
1611 (aarch64_simd_imm_zero_p): Delete.
1612 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1613 vector modes. Accept constants in the range of CNT[BHWD].
1614 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1615 ask for an Advanced SIMD mode.
1616 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1617 (aarch64_simd_vector_alignment): Handle SVE predicates.
1618 (aarch64_vectorize_preferred_vector_alignment): New function.
1619 (aarch64_simd_vector_alignment_reachable): Use it instead of
1621 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1622 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1624 (MAX_VECT_LEN): Delete.
1625 (expand_vec_perm_d): Add a vec_flags field.
1626 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1627 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1628 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1630 (aarch64_evpc_rev): Rename to...
1631 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1632 (aarch64_evpc_rev_global): New function.
1633 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1634 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1636 (aarch64_evpc_sve_tbl): New function.
1637 (aarch64_expand_vec_perm_const_1): Update after rename of
1638 aarch64_evpc_rev. Handle SVE permutes too, trying
1639 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1640 than aarch64_evpc_tbl.
1641 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1642 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1643 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1644 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1645 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1646 (aarch64_expand_sve_vcond): New functions.
1647 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1648 of aarch64_vector_mode_p.
1649 (aarch64_dwarf_poly_indeterminate_value): New function.
1650 (aarch64_compute_pressure_classes): Likewise.
1651 (aarch64_can_change_mode_class): Likewise.
1652 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1653 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1654 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1655 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1656 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1657 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1658 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1659 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1661 (Dn, Dl, Dr): Accept const as well as const_vector.
1662 (Dz): Likewise. Compare against CONST0_RTX.
1663 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1664 of "vector" where appropriate.
1665 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1666 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1667 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1668 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1669 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1670 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1671 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1672 (v_int_equiv): Extend to SVE modes.
1673 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1675 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1676 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1677 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1678 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1679 (SVE_COND_FP_CMP): New int iterators.
1680 (perm_hilo): Handle the new unpack unspecs.
1681 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1683 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1684 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1685 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1686 (aarch64_equality_operator, aarch64_constant_vector_operand)
1687 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1688 (aarch64_sve_nonimmediate_operand): Likewise.
1689 (aarch64_sve_general_operand): Likewise.
1690 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1691 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1692 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1693 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1694 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1695 (aarch64_sve_float_arith_immediate): Likewise.
1696 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1697 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1698 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1699 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1700 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1701 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1702 (aarch64_sve_float_arith_operand): Likewise.
1703 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1704 (aarch64_sve_float_mul_operand): Likewise.
1705 (aarch64_sve_vec_perm_operand): Likewise.
1706 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1707 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1708 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1709 as well as const_vector.
1710 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1711 in file. Use CONST0_RTX and CONSTM1_RTX.
1712 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1713 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1714 Use aarch64_simd_imm_zero.
1715 * config/aarch64/aarch64-sve.md: New file.
1716 * config/aarch64/aarch64.md: Include it.
1717 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1718 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1719 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1720 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1721 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1722 (sve): New attribute.
1723 (enabled): Disable instructions with the sve attribute unless
1725 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1726 aarch64_expand_mov_immediate.
1727 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1728 CNT[BHSD] immediates.
1729 (movti): Split CONST_POLY_INT moves into two halves.
1730 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1731 Split additions that need a temporary here if the destination
1732 is the stack pointer.
1733 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1734 (*add<mode>3_poly_1): New instruction.
1735 (set_clobber_cc): New expander.
1737 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1739 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1740 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1741 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1742 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1743 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1744 Change innermode from fixed_mode_size to machine_mode.
1745 (simplify_subreg): Update call accordingly. Handle a constant-sized
1746 subreg of a variable-length CONST_VECTOR.
1748 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1749 Alan Hayward <alan.hayward@arm.com>
1750 David Sherwood <david.sherwood@arm.com>
1752 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1753 (add_offset_to_base): New function, split out from...
1754 (create_mem_ref): ...here. When handling a scale other than 1,
1755 check first whether the address is valid without the offset.
1756 Add it into the base if so, leaving the index and scale as-is.
1758 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1761 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1762 fold_for_warn before checking if arg2 is INTEGER_CST.
1764 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1766 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1767 (store_multiple_operation): Delete.
1768 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1769 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1770 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1771 guarded by TARGET_STRING.
1772 (rs6000_output_load_multiple): Delete.
1773 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1774 OPTION_MASK_STRING / TARGET_STRING handling.
1775 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1776 (const rs6000_opt_masks) <"string">: Change mask to 0.
1777 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1778 (MASK_STRING): Delete.
1779 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1781 (load_multiple): Delete.
1788 (store_multiple): Delete.
1795 (movmemsi_8reg): Delete.
1796 (corresponding unnamed define_insn): Delete.
1797 (movmemsi_6reg): Delete.
1798 (corresponding unnamed define_insn): Delete.
1799 (movmemsi_4reg): Delete.
1800 (corresponding unnamed define_insn): Delete.
1801 (movmemsi_2reg): Delete.
1802 (corresponding unnamed define_insn): Delete.
1803 (movmemsi_1reg): Delete.
1804 (corresponding unnamed define_insn): Delete.
1805 * config/rs6000/rs6000.opt (mno-string): New.
1806 (mstring): Replace by deprecation warning stub.
1807 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1809 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1811 * regrename.c (regrename_do_replace): If replacing the same
1812 reg multiple times, try to reuse last created gen_raw_REG.
1815 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1816 main to workaround a bug in GDB.
1818 2018-01-12 Tom de Vries <tom@codesourcery.com>
1821 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1823 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1825 PR rtl-optimization/80481
1826 * ira-color.c (get_cap_member): New function.
1827 (allocnos_conflict_by_live_ranges_p): Use it.
1828 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1829 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1831 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1834 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1835 (*saddl_se_1): Ditto.
1837 (*ssubl_se_1): Ditto.
1839 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1841 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1842 rather than wi::to_widest for DR_INITs.
1843 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1844 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1845 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1847 (vect_analyze_group_access_1): Note that here.
1849 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1851 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1852 polynomial type sizes.
1854 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1856 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1857 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1858 (gimple_add_tmp_var): Likewise.
1860 2018-01-12 Martin Liska <mliska@suse.cz>
1862 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1863 (gimple_alloc_sizes): Likewise.
1864 (dump_gimple_statistics): Use PRIu64 in printf format.
1865 * gimple.h: Change uint64_t to int.
1867 2018-01-12 Martin Liska <mliska@suse.cz>
1869 * tree-core.h: Use uint64_t instead of int.
1870 * tree.c (tree_node_counts): Likewise.
1871 (tree_node_sizes): Likewise.
1872 (dump_tree_statistics): Use PRIu64 in printf format.
1874 2018-01-12 Martin Liska <mliska@suse.cz>
1876 * Makefile.in: As qsort_chk is implemented in vec.c, add
1877 vec.o to linkage of gencfn-macros.
1878 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1879 passing the info to record_node_allocation_statistics.
1880 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1882 * ggc-common.c (struct ggc_usage): Add operator== and use
1883 it in operator< and compare function.
1884 * mem-stats.h (struct mem_usage): Likewise.
1885 * vec.c (struct vec_usage): Remove operator< and compare
1886 function. Can be simply inherited.
1888 2018-01-12 Martin Jambor <mjambor@suse.cz>
1891 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1892 * tree-ssa-math-opts.c: Include domwalk.h.
1893 (convert_mult_to_fma_1): New function.
1894 (fma_transformation_info): New type.
1895 (fma_deferring_state): Likewise.
1896 (cancel_fma_deferring): New function.
1897 (result_of_phi): Likewise.
1898 (last_fma_candidate_feeds_initial_phi): Likewise.
1899 (convert_mult_to_fma): Added deferring logic, split actual
1900 transformation to convert_mult_to_fma_1.
1901 (math_opts_dom_walker): New type.
1902 (math_opts_dom_walker::after_dom_children): New method, body moved
1903 here from pass_optimize_widening_mul::execute, added deferring logic
1905 (pass_optimize_widening_mul::execute): Moved most of code to
1906 math_opts_dom_walker::after_dom_children.
1907 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1908 * config/i386/i386.c (ix86_option_override_internal): Added
1909 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1911 2018-01-12 Richard Biener <rguenther@suse.de>
1914 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1915 inline instance vars.
1917 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1920 * config/rx/rx.c (rx_is_restricted_memory_address):
1923 2018-01-12 Richard Biener <rguenther@suse.de>
1925 PR tree-optimization/80846
1926 * target.def (split_reduction): New target hook.
1927 * targhooks.c (default_split_reduction): New function.
1928 * targhooks.h (default_split_reduction): Declare.
1929 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1930 target requests first reduce vectors by combining low and high
1932 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1933 (get_vectype_for_scalar_type_and_size): Export.
1934 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1935 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1936 * doc/tm.texi: Regenerate.
1937 * config/i386/i386.c (ix86_split_reduction): Implement
1938 TARGET_VECTORIZE_SPLIT_REDUCTION.
1940 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1943 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1944 in PIC mode except for TARGET_VXWORKS_RTP.
1945 * config/sparc/sparc.c: Include cfgrtl.h.
1946 (TARGET_INIT_PIC_REG): Define.
1947 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1948 (sparc_pic_register_p): New predicate.
1949 (sparc_legitimate_address_p): Use it.
1950 (sparc_legitimize_pic_address): Likewise.
1951 (sparc_delegitimize_address): Likewise.
1952 (sparc_mode_dependent_address_p): Likewise.
1953 (gen_load_pcrel_sym): Remove 4th parameter.
1954 (load_got_register): Adjust call to above. Remove obsolete stuff.
1955 (sparc_expand_prologue): Do not call load_got_register here.
1956 (sparc_flat_expand_prologue): Likewise.
1957 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1958 (sparc_use_pseudo_pic_reg): New function.
1959 (sparc_init_pic_reg): Likewise.
1960 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1961 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1963 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1965 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1966 Add item for branch_cost.
1968 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1970 PR rtl-optimization/83565
1971 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1972 not extend the result to a larger mode for rotate operations.
1973 (num_sign_bit_copies1): Likewise.
1975 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1978 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1980 Use values-Xc.o for -pedantic.
1981 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1983 2018-01-12 Martin Liska <mliska@suse.cz>
1986 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1988 (possible_polymorphic_call_targets): Use it.
1989 (ipa_devirt): Likewise.
1991 2018-01-12 Martin Liska <mliska@suse.cz>
1993 * profile-count.h (enum profile_quality): Use 0 as invalid
1994 enum value of profile_quality.
1996 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1998 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1999 -mext-string options.
2001 2018-01-12 Richard Biener <rguenther@suse.de>
2003 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2004 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2005 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2007 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2009 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2011 * configure.ac (--with-long-double-format): Add support for the
2012 configuration option to change the default long double format on
2014 * config.gcc (powerpc*-linux*-*): Likewise.
2015 * configure: Regenerate.
2016 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2017 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2018 used without modification.
2020 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2022 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2023 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2024 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2025 MISC_BUILTIN_SPEC_BARRIER.
2026 (rs6000_init_builtins): Likewise.
2027 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2029 (speculation_barrier): New define_insn.
2030 * doc/extend.texi: Document __builtin_speculation_barrier.
2032 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2035 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2036 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2037 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2039 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2040 integral modes instead of "ss" and "sd".
2041 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2042 vectors with 32-bit and 64-bit elements.
2043 (vecdupssescalarmodesuffix): New mode attribute.
2044 (vec_dup<mode>): Use it.
2046 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2049 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2050 frame if argument is passed on stack.
2052 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2055 * ree.c (combine_reaching_defs): Optimize also
2056 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2057 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2059 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2062 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2064 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2067 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2068 after they are computed.
2070 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2072 PR tree-optimization/83695
2073 * gimple-loop-linterchange.cc
2074 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2075 reset cached scev information after interchange.
2076 (pass_linterchange::execute): Remove call to scev_reset_htab.
2078 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2080 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2081 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2082 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2083 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2084 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2085 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2086 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2087 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2088 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2089 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2090 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2091 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2092 (V_lane_reg): Likewise.
2093 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2095 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2096 (vfmal_lane_low<mode>_intrinsic,
2097 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2098 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2099 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2100 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2101 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2102 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2104 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2106 * config/arm/arm-cpus.in (fp16fml): New feature.
2107 (ALL_SIMD): Add fp16fml.
2108 (armv8.2-a): Add fp16fml as an option.
2109 (armv8.3-a): Likewise.
2110 (armv8.4-a): Add fp16fml as part of fp16.
2111 * config/arm/arm.h (TARGET_FP16FML): Define.
2112 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2114 * config/arm/arm-modes.def (V2HF): Define.
2115 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2116 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2117 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2118 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2119 vfmsl_low, vfmsl_high): New set of builtins.
2120 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2121 (vfml_op): New code attribute.
2122 (VFMLHALVES): New int iterator.
2123 (VFML, VFMLSEL): New mode attributes.
2124 (V_reg): Define mapping for V2HF.
2125 (V_hi, V_lo): New mode attributes.
2126 (VF_constraint): Likewise.
2127 (vfml_half, vfml_half_selector): New int attributes.
2128 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2130 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2131 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2133 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2134 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2135 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2136 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2138 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2139 Document new effective target and option set.
2141 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2143 * config/arm/arm-cpus.in (armv8_4): New feature.
2144 (ARMv8_4a): New fgroup.
2145 (armv8.4-a): New arch.
2146 * config/arm/arm-tables.opt: Regenerate.
2147 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2148 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2149 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2150 Add matching rules for -march=armv8.4-a and extensions.
2151 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2153 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2156 * config/rx/rx.md (BW): New mode attribute.
2157 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2159 2018-01-11 Richard Biener <rguenther@suse.de>
2161 PR tree-optimization/83435
2162 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2163 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2164 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2166 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2167 Alan Hayward <alan.hayward@arm.com>
2168 David Sherwood <david.sherwood@arm.com>
2170 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2172 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2173 (aarch64_print_address_internal): Use it to check for a zero offset.
2175 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2176 Alan Hayward <alan.hayward@arm.com>
2177 David Sherwood <david.sherwood@arm.com>
2179 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2180 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2181 Return a poly_int64 rather than a HOST_WIDE_INT.
2182 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2183 rather than a HOST_WIDE_INT.
2184 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2185 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2186 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2187 final_offset from HOST_WIDE_INT to poly_int64.
2188 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2189 to_constant when getting the number of units in an Advanced SIMD
2191 (aarch64_builtin_vectorized_function): Check for a constant number
2193 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2195 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2196 attribute instead of GET_MODE_NUNITS.
2197 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2198 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2199 GET_MODE_SIZE for fixed-size registers.
2200 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2201 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2202 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2203 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2204 (aarch64_print_operand, aarch64_print_address_internal)
2205 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2206 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2207 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2208 Handle polynomial GET_MODE_SIZE.
2209 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2210 wider than SImode without modification.
2211 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2212 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2213 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2214 passing and returning SVE modes.
2215 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2216 rather than GEN_INT.
2217 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2218 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2219 (aarch64_allocate_and_probe_stack_space): Likewise.
2220 (aarch64_layout_frame): Cope with polynomial offsets.
2221 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2222 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2224 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2225 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2226 poly_int64 rather than a HOST_WIDE_INT.
2227 (aarch64_get_separate_components, aarch64_process_components)
2228 (aarch64_expand_prologue, aarch64_expand_epilogue)
2229 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2230 (aarch64_anchor_offset): New function, split out from...
2231 (aarch64_legitimize_address): ...here.
2232 (aarch64_builtin_vectorization_cost): Handle polynomial
2233 TYPE_VECTOR_SUBPARTS.
2234 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2236 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2237 number of elements from the PARALLEL rather than the mode.
2238 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2239 rather than GET_MODE_BITSIZE.
2240 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2241 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2242 (aarch64_expand_vec_perm_const_1): Handle polynomial
2243 d->perm.length () and d->perm elements.
2244 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2245 Apply to_constant to d->perm elements.
2246 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2247 polynomial CONST_VECTOR_NUNITS.
2248 (aarch64_move_pointer): Take amount as a poly_int64 rather
2250 (aarch64_progress_pointer): Avoid temporary variable.
2251 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2252 the mode attribute instead of GET_MODE.
2254 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2255 Alan Hayward <alan.hayward@arm.com>
2256 David Sherwood <david.sherwood@arm.com>
2258 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2259 x exists before using it.
2260 (aarch64_add_constant_internal): Rename to...
2261 (aarch64_add_offset_1): ...this. Replace regnum with separate
2262 src and dest rtxes. Handle the case in which they're different,
2263 including when the offset is zero. Replace scratchreg with an rtx.
2264 Use 2 additions if there is no spare register into which we can
2265 move a 16-bit constant.
2266 (aarch64_add_constant): Delete.
2267 (aarch64_add_offset): Replace reg with separate src and dest
2268 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2269 Use aarch64_add_offset_1.
2270 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2271 an rtx rather than an int. Take the delta as a poly_int64
2272 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2273 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2274 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2275 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2276 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2278 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2279 aarch64_add_constant.
2281 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2283 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2284 Use scalar_float_mode.
2286 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2288 * config/aarch64/aarch64-simd.md
2289 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2290 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2291 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2292 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2293 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2294 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2295 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2296 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2297 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2298 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2300 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2303 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2304 targ_options->x_arm_arch_string is non NULL.
2306 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2308 * config/aarch64/aarch64.h
2309 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2311 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2314 * expmed.c (emit_store_flag_force): Swap if const op0
2315 and change VOIDmode to mode of op0.
2317 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2319 PR rtl-optimization/83761
2320 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2321 than bytes to mode_for_size.
2323 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2326 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2327 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2330 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2333 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2334 when in layout mode.
2335 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2336 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2339 2018-01-10 Michael Collison <michael.collison@arm.com>
2341 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2342 * config/aarch64/aarch64-option-extension.def: Add
2343 AARCH64_OPT_EXTENSION of 'fp16fml'.
2344 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2345 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2346 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2347 * config/aarch64/constraints.md (Ui7): New constraint.
2348 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2349 (VFMLA_SEL_W): Ditto.
2352 (VFMLA16_LOW): New int iterator.
2353 (VFMLA16_HIGH): Ditto.
2354 (UNSPEC_FMLAL): New unspec.
2355 (UNSPEC_FMLSL): Ditto.
2356 (UNSPEC_FMLAL2): Ditto.
2357 (UNSPEC_FMLSL2): Ditto.
2358 (f16mac): New code attribute.
2359 * config/aarch64/aarch64-simd-builtins.def
2360 (aarch64_fmlal_lowv2sf): Ditto.
2361 (aarch64_fmlsl_lowv2sf): Ditto.
2362 (aarch64_fmlalq_lowv4sf): Ditto.
2363 (aarch64_fmlslq_lowv4sf): Ditto.
2364 (aarch64_fmlal_highv2sf): Ditto.
2365 (aarch64_fmlsl_highv2sf): Ditto.
2366 (aarch64_fmlalq_highv4sf): Ditto.
2367 (aarch64_fmlslq_highv4sf): Ditto.
2368 (aarch64_fmlal_lane_lowv2sf): Ditto.
2369 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2370 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2371 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2372 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2373 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2374 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2375 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2376 (aarch64_fmlal_lane_highv2sf): Ditto.
2377 (aarch64_fmlsl_lane_highv2sf): Ditto.
2378 (aarch64_fmlal_laneq_highv2sf): Ditto.
2379 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2380 (aarch64_fmlalq_lane_highv4sf): Ditto.
2381 (aarch64_fmlsl_lane_highv4sf): Ditto.
2382 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2383 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2384 * config/aarch64/aarch64-simd.md:
2385 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2386 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2387 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2388 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2389 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2390 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2391 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2392 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2393 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2394 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2395 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2396 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2397 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2398 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2399 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2400 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2401 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2402 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2403 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2404 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2405 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2406 (vfmlsl_low_u32): Ditto.
2407 (vfmlalq_low_u32): Ditto.
2408 (vfmlslq_low_u32): Ditto.
2409 (vfmlal_high_u32): Ditto.
2410 (vfmlsl_high_u32): Ditto.
2411 (vfmlalq_high_u32): Ditto.
2412 (vfmlslq_high_u32): Ditto.
2413 (vfmlal_lane_low_u32): Ditto.
2414 (vfmlsl_lane_low_u32): Ditto.
2415 (vfmlal_laneq_low_u32): Ditto.
2416 (vfmlsl_laneq_low_u32): Ditto.
2417 (vfmlalq_lane_low_u32): Ditto.
2418 (vfmlslq_lane_low_u32): Ditto.
2419 (vfmlalq_laneq_low_u32): Ditto.
2420 (vfmlslq_laneq_low_u32): Ditto.
2421 (vfmlal_lane_high_u32): Ditto.
2422 (vfmlsl_lane_high_u32): Ditto.
2423 (vfmlal_laneq_high_u32): Ditto.
2424 (vfmlsl_laneq_high_u32): Ditto.
2425 (vfmlalq_lane_high_u32): Ditto.
2426 (vfmlslq_lane_high_u32): Ditto.
2427 (vfmlalq_laneq_high_u32): Ditto.
2428 (vfmlslq_laneq_high_u32): Ditto.
2429 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2430 (AARCH64_FL_FOR_ARCH8_4): New.
2431 (AARCH64_ISA_F16FML): New ISA flag.
2432 (TARGET_F16FML): New feature flag for fp16fml.
2433 (doc/invoke.texi): Document new fp16fml option.
2435 2018-01-10 Michael Collison <michael.collison@arm.com>
2437 * config/aarch64/aarch64-builtins.c:
2438 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2439 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2440 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2441 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2442 (AARCH64_ISA_SHA3): New ISA flag.
2443 (TARGET_SHA3): New feature flag for sha3.
2444 * config/aarch64/iterators.md (sha512_op): New int attribute.
2445 (CRYPTO_SHA512): New int iterator.
2446 (UNSPEC_SHA512H): New unspec.
2447 (UNSPEC_SHA512H2): Ditto.
2448 (UNSPEC_SHA512SU0): Ditto.
2449 (UNSPEC_SHA512SU1): Ditto.
2450 * config/aarch64/aarch64-simd-builtins.def
2451 (aarch64_crypto_sha512hqv2di): New builtin.
2452 (aarch64_crypto_sha512h2qv2di): Ditto.
2453 (aarch64_crypto_sha512su0qv2di): Ditto.
2454 (aarch64_crypto_sha512su1qv2di): Ditto.
2455 (aarch64_eor3qv8hi): Ditto.
2456 (aarch64_rax1qv2di): Ditto.
2457 (aarch64_xarqv2di): Ditto.
2458 (aarch64_bcaxqv8hi): Ditto.
2459 * config/aarch64/aarch64-simd.md:
2460 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2461 (aarch64_crypto_sha512su0qv2di): Ditto.
2462 (aarch64_crypto_sha512su1qv2di): Ditto.
2463 (aarch64_eor3qv8hi): Ditto.
2464 (aarch64_rax1qv2di): Ditto.
2465 (aarch64_xarqv2di): Ditto.
2466 (aarch64_bcaxqv8hi): Ditto.
2467 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2468 (vsha512h2q_u64): Ditto.
2469 (vsha512su0q_u64): Ditto.
2470 (vsha512su1q_u64): Ditto.
2471 (veor3q_u16): Ditto.
2472 (vrax1q_u64): Ditto.
2474 (vbcaxq_u16): Ditto.
2475 * config/arm/types.md (crypto_sha512): New type attribute.
2476 (crypto_sha3): Ditto.
2477 (doc/invoke.texi): Document new sha3 option.
2479 2018-01-10 Michael Collison <michael.collison@arm.com>
2481 * config/aarch64/aarch64-builtins.c:
2482 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2483 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2484 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2485 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2486 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2487 (AARCH64_ISA_SM4): New ISA flag.
2488 (TARGET_SM4): New feature flag for sm4.
2489 * config/aarch64/aarch64-simd-builtins.def
2490 (aarch64_sm3ss1qv4si): Ditto.
2491 (aarch64_sm3tt1aq4si): Ditto.
2492 (aarch64_sm3tt1bq4si): Ditto.
2493 (aarch64_sm3tt2aq4si): Ditto.
2494 (aarch64_sm3tt2bq4si): Ditto.
2495 (aarch64_sm3partw1qv4si): Ditto.
2496 (aarch64_sm3partw2qv4si): Ditto.
2497 (aarch64_sm4eqv4si): Ditto.
2498 (aarch64_sm4ekeyqv4si): Ditto.
2499 * config/aarch64/aarch64-simd.md:
2500 (aarch64_sm3ss1qv4si): Ditto.
2501 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2502 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2503 (aarch64_sm4eqv4si): Ditto.
2504 (aarch64_sm4ekeyqv4si): Ditto.
2505 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2506 (sm3part_op): Ditto.
2507 (CRYPTO_SM3TT): Ditto.
2508 (CRYPTO_SM3PART): Ditto.
2509 (UNSPEC_SM3SS1): New unspec.
2510 (UNSPEC_SM3TT1A): Ditto.
2511 (UNSPEC_SM3TT1B): Ditto.
2512 (UNSPEC_SM3TT2A): Ditto.
2513 (UNSPEC_SM3TT2B): Ditto.
2514 (UNSPEC_SM3PARTW1): Ditto.
2515 (UNSPEC_SM3PARTW2): Ditto.
2516 (UNSPEC_SM4E): Ditto.
2517 (UNSPEC_SM4EKEY): Ditto.
2518 * config/aarch64/constraints.md (Ui2): New constraint.
2519 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2520 * config/arm/types.md (crypto_sm3): New type attribute.
2521 (crypto_sm4): Ditto.
2522 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2523 (vsm3tt1aq_u32): Ditto.
2524 (vsm3tt1bq_u32): Ditto.
2525 (vsm3tt2aq_u32): Ditto.
2526 (vsm3tt2bq_u32): Ditto.
2527 (vsm3partw1q_u32): Ditto.
2528 (vsm3partw2q_u32): Ditto.
2529 (vsm4eq_u32): Ditto.
2530 (vsm4ekeyq_u32): Ditto.
2531 (doc/invoke.texi): Document new sm4 option.
2533 2018-01-10 Michael Collison <michael.collison@arm.com>
2535 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2536 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2537 (AARCH64_FL_FOR_ARCH8_4): New.
2538 (AARCH64_FL_V8_4): New flag.
2539 (doc/invoke.texi): Document new armv8.4-a option.
2541 2018-01-10 Michael Collison <michael.collison@arm.com>
2543 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2544 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2545 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2546 * config/aarch64/aarch64-option-extension.def: Add
2547 AARCH64_OPT_EXTENSION of 'sha2'.
2548 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2549 (crypto): Disable sha2 and aes if crypto disabled.
2550 (crypto): Enable aes and sha2 if enabled.
2551 (simd): Disable sha2 and aes if simd disabled.
2552 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2554 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2555 (TARGET_SHA2): New feature flag for sha2.
2556 (TARGET_AES): New feature flag for aes.
2557 * config/aarch64/aarch64-simd.md:
2558 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2559 conditional on TARGET_AES.
2560 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2561 (aarch64_crypto_sha1hsi): Make pattern conditional
2563 (aarch64_crypto_sha1hv4si): Ditto.
2564 (aarch64_be_crypto_sha1hv4si): Ditto.
2565 (aarch64_crypto_sha1su1v4si): Ditto.
2566 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2567 (aarch64_crypto_sha1su0v4si): Ditto.
2568 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2569 (aarch64_crypto_sha256su0v4si): Ditto.
2570 (aarch64_crypto_sha256su1v4si): Ditto.
2571 (doc/invoke.texi): Document new aes and sha2 options.
2573 2018-01-10 Martin Sebor <msebor@redhat.com>
2575 PR tree-optimization/83781
2576 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2579 2018-01-11 Martin Sebor <msebor@gmail.com>
2580 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2582 PR tree-optimization/83501
2583 PR tree-optimization/81703
2585 * tree-ssa-strlen.c (get_string_cst): Rename...
2586 (get_string_len): ...to this. Handle global constants.
2587 (handle_char_store): Adjust.
2589 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2590 Jim Wilson <jimw@sifive.com>
2592 * config/riscv/riscv-protos.h (riscv_output_return): New.
2593 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2594 (riscv_attribute_table, riscv_output_return),
2595 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2596 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2597 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2599 (riscv_expand_prologue): Add early return for naked function.
2600 (riscv_expand_epilogue): Likewise.
2601 (riscv_function_ok_for_sibcall): Return false for naked function.
2602 (riscv_set_current_function): New.
2603 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2604 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2605 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2606 * doc/extend.texi (RISC-V Function Attributes): New.
2608 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2610 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2611 check for 128-bit long double before checking TCmode.
2612 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2613 128-bit long doubles before checking TFmode or TCmode.
2614 (FLOAT128_IBM_P): Likewise.
2616 2018-01-10 Martin Sebor <msebor@redhat.com>
2618 PR tree-optimization/83671
2619 * builtins.c (c_strlen): Unconditionally return zero for the empty
2621 Use -Warray-bounds for warnings.
2622 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2623 for non-constant array indices with COMPONENT_REF, arrays of
2624 arrays, and pointers to arrays.
2625 (gimple_fold_builtin_strlen): Determine and set length range for
2626 non-constant character arrays.
2628 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2631 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2634 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2636 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2638 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2641 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2642 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2643 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2644 indexed_or_indirect_operand predicate.
2645 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2646 (*vsx_le_perm_load_v8hi): Likewise.
2647 (*vsx_le_perm_load_v16qi): Likewise.
2648 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2649 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2650 (*vsx_le_perm_store_v8hi): Likewise.
2651 (*vsx_le_perm_store_v16qi): Likewise.
2652 (eight unnamed splitters): Likewise.
2654 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2656 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2657 * config/rs6000/emmintrin.h: Likewise.
2658 * config/rs6000/mmintrin.h: Likewise.
2659 * config/rs6000/xmmintrin.h: Likewise.
2661 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2664 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2666 * tree.c (tree_nop_conversion): Return true for location wrapper
2668 (maybe_wrap_with_location): New function.
2669 (selftest::check_strip_nops): New function.
2670 (selftest::test_location_wrappers): New function.
2671 (selftest::tree_c_tests): Call it.
2672 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2673 (maybe_wrap_with_location): New decl.
2674 (EXPR_LOCATION_WRAPPER_P): New macro.
2675 (location_wrapper_p): New inline function.
2676 (tree_strip_any_location_wrapper): New inline function.
2678 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2681 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2682 stack_realign_offset for the largest alignment of stack slot
2684 (ix86_find_max_used_stack_alignment): New function.
2685 (ix86_finalize_stack_frame_flags): Use it. Set
2686 max_used_stack_alignment if we don't realign stack.
2687 * config/i386/i386.h (machine_function): Add
2688 max_used_stack_alignment.
2690 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2692 * config/arm/arm.opt (-mbranch-cost): New option.
2693 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2696 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2699 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2700 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2702 2018-01-10 Richard Biener <rguenther@suse.de>
2705 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2706 early out so it also covers the case where we have a non-NULL
2709 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2711 PR tree-optimization/83753
2712 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2713 for non-strided grouped accesses if the number of elements is 1.
2715 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2718 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2719 * i386.h (TARGET_USE_GATHER): Define.
2720 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2722 2018-01-10 Martin Liska <mliska@suse.cz>
2725 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2726 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2728 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2729 CLEANUP_NO_PARTITIONING is not set.
2731 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2733 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2734 for vectors, as a partial revert of r254296.
2735 * rtl.h (const_vec_p): Delete.
2736 (const_vec_duplicate_p): Don't test for vector CONSTs.
2737 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2738 * expmed.c (make_tree): Likewise.
2741 * common.md (E, F): Use CONSTANT_P instead of checking for
2743 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2744 checking for CONST_VECTOR.
2746 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2749 * predict.c (force_edge_cold): Handle in more sane way edges
2752 2018-01-09 Carl Love <cel@us.ibm.com>
2754 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2756 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2757 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2758 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2759 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2760 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2761 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2762 * config/rs6000/rs6000-protos.h: Add extern defition for
2763 rs6000_generate_float2_double_code.
2764 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2766 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2767 (float2_v2df): Add define_expand.
2769 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2772 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2773 op_mode in the force_to_mode call.
2775 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2777 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2778 instead of checking each element individually.
2779 (aarch64_evpc_uzp): Likewise.
2780 (aarch64_evpc_zip): Likewise.
2781 (aarch64_evpc_ext): Likewise.
2782 (aarch64_evpc_rev): Likewise.
2783 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2784 instead of checking each element individually. Return true without
2786 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2787 whether all selected elements come from the same input, instead of
2788 checking each element individually. Remove calls to gen_rtx_REG,
2789 start_sequence and end_sequence and instead assert that no rtl is
2792 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2794 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2795 order of HIGH and CONST checks.
2797 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2799 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2800 if the destination isn't an SSA_NAME.
2802 2018-01-09 Richard Biener <rguenther@suse.de>
2804 PR tree-optimization/83668
2805 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2807 (canonicalize_loop_form): ... here, renamed from ...
2808 (canonicalize_loop_closed_ssa_form): ... this and amended to
2809 swap successor edges for loop exit blocks to make us use
2810 the RPO order we need for initial schedule generation.
2812 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2814 PR tree-optimization/64811
2815 * match.pd: When optimizing comparisons with Inf, avoid
2816 introducing or losing exceptions from comparisons with NaN.
2818 2018-01-09 Martin Liska <mliska@suse.cz>
2821 * asan.c (shadow_mem_size): Add gcc_assert.
2823 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2825 Don't save registers in main().
2828 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2829 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2830 * config/avr/avr.c (avr_set_current_function): Don't error if
2831 naked, OS_task or OS_main are specified at the same time.
2832 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2834 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2836 * common/config/avr/avr-common.c (avr_option_optimization_table):
2837 Switch on -mmain-is-OS_task for optimizing compilations.
2839 2018-01-09 Richard Biener <rguenther@suse.de>
2841 PR tree-optimization/83572
2842 * graphite.c: Include cfganal.h.
2843 (graphite_transform_loops): Connect infinite loops to exit
2844 and remove fake edges at the end.
2846 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2848 * ipa-inline.c (edge_badness): Revert accidental checkin.
2850 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2853 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2854 symbols; not inline clones.
2856 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2859 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2860 hard registers. Formatting fixes.
2862 PR preprocessor/83722
2863 * gcc.c (try_generate_repro): Pass
2864 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2865 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2868 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2869 Kito Cheng <kito.cheng@gmail.com>
2871 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2872 (riscv_leaf_function_p): Delete.
2873 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2875 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2877 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2879 (do_ifelse): New function.
2880 (do_isel): New function.
2881 (do_sub3): New function.
2882 (do_add3): New function.
2883 (do_load_mask_compare): New function.
2884 (do_overlap_load_compare): New function.
2885 (expand_compare_loop): New function.
2886 (expand_block_compare): Call expand_compare_loop() when appropriate.
2887 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2889 (-mblock-compare-inline-loop-limit): New option.
2891 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2894 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2895 Reverse order of second and third operands in first alternative.
2896 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2897 of first and second elements in UNSPEC_VPERMR vector.
2898 (altivec_expand_vec_perm_le): Likewise.
2900 2017-01-08 Jeff Law <law@redhat.com>
2902 PR rtl-optimizatin/81308
2903 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2904 (process_switch): If group_case_labels makes a change, then set
2906 (pass_convert_switch::execute): If a switch is converted, then
2907 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2909 PR rtl-optimization/81308
2910 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2913 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2915 PR target/83663 - Revert r255946
2916 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2917 generation for cases where splatting a value is not useful.
2918 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2919 across a vec_duplicate and a paradoxical subreg forming a vector
2920 mode to a vec_concat.
2922 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2924 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2925 -march=armv8.3-a variants.
2926 * config/arm/t-multilib: Likewise.
2927 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2929 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2931 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2933 (cceq_ior_compare_complement): Give it a name so I can use it, and
2934 change boolean_or_operator predicate to boolean_operator so it can
2935 be used to generate a crand.
2936 (eqne): New code iterator.
2937 (bd/bd_neg): New code_attrs.
2938 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2939 a single define_insn.
2940 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2941 decrement (bdnzt/bdnzf/bdzt/bdzf).
2942 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2943 with the new names of the branch decrement patterns, and added the
2944 names of the branch decrement conditional patterns.
2946 2018-01-08 Richard Biener <rguenther@suse.de>
2948 PR tree-optimization/83563
2949 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2952 2018-01-08 Richard Biener <rguenther@suse.de>
2955 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2957 2018-01-08 Richard Biener <rguenther@suse.de>
2959 PR tree-optimization/83685
2960 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2961 references to abnormals.
2963 2018-01-08 Richard Biener <rguenther@suse.de>
2966 * dwarf2out.c (output_indirect_strings): Handle empty
2967 skeleton_debug_str_hash.
2968 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2970 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2972 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2973 (emit_store_direct): Likewise.
2974 (arc_trampoline_adjust_address): Likewise.
2975 (arc_asm_trampoline_template): New function.
2976 (arc_initialize_trampoline): Use asm_trampoline_template.
2977 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2978 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2979 * config/arc/arc.md (flush_icache): Delete pattern.
2981 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2983 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2984 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2987 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2990 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2991 by not USED_FOR_TARGET.
2992 (make_pass_resolve_sw_modes): Likewise.
2994 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2996 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2999 2018-01-08 Richard Biener <rguenther@suse.de>
3002 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3004 2018-01-08 Richard Biener <rguenther@suse.de>
3007 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3009 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3012 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3013 basic blocks with a small number of successors.
3014 (convert_control_dep_chain_into_preds): Improve handling of
3016 (dump_predicates): Split apart into...
3017 (dump_pred_chain): ...here...
3018 (dump_pred_info): ...and here.
3019 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3020 (can_chain_union_be_invalidated_p): Improve check for invalidation
3022 (uninit_uses_cannot_happen): Avoid unnecessary if
3023 convert_control_dep_chain_into_preds yielded nothing.
3025 2018-01-06 Martin Sebor <msebor@redhat.com>
3027 PR tree-optimization/83640
3028 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3029 subtracting negative offset from size.
3030 (builtin_access::overlap): Adjust offset bounds of the access to fall
3031 within the size of the object if possible.
3033 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3035 PR rtl-optimization/83699
3036 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3037 extract_bit_field_as_subreg to cases in which the extracted
3038 value is also a vector.
3040 * lra-constraints.c (process_alt_operands): Test for the equivalence
3041 substitutions when detecting a possible reload cycle.
3043 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3046 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3047 by default if flag_selective_schedling{,2}. Formatting fixes.
3049 PR rtl-optimization/83682
3050 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3051 if it has non-VECTOR_MODE element mode.
3052 (vec_duplicate_p): Likewise.
3055 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3056 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3058 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3061 * config/i386/i386-builtin.def
3062 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3063 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3064 Require also OPTION_MASK_ISA_AVX512F in addition to
3065 OPTION_MASK_ISA_GFNI.
3066 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3067 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3068 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3069 to OPTION_MASK_ISA_GFNI.
3070 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3071 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3072 OPTION_MASK_ISA_AVX512BW.
3073 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3074 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3075 addition to OPTION_MASK_ISA_GFNI.
3076 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3077 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3078 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3079 to OPTION_MASK_ISA_GFNI.
3080 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3081 a requirement for all ISAs rather than any of them with a few
3083 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3085 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3086 bitmasks to be enabled with 3 exceptions, instead of requiring any
3087 enabled ISA with lots of exceptions.
3088 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3089 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3090 Change avx512bw in isa attribute to avx512f.
3091 * config/i386/sgxintrin.h: Add license boilerplate.
3092 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3093 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3094 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3095 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3097 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3098 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3099 temporarily sse2 rather than sse if not enabled already.
3102 * config/i386/sse.md (VI248_VLBW): Rename to ...
3103 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3104 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3105 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3106 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3107 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3108 mode iterator instead of VI248_VLBW.
3110 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3112 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3113 (record_modified): Skip clobbers; add debug output.
3114 (param_change_prob): Use sreal frequencies.
3116 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3118 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3119 punt for user-aligned variables.
3121 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3123 * tree-chrec.c (chrec_contains_symbols): Return true for
3126 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3129 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3130 of (x|y) == x for BICS pattern.
3132 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3134 PR tree-optimization/83605
3135 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3136 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3139 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3141 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3142 * config/epiphany/rtems.h: New file.
3144 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3145 Uros Bizjak <ubizjak@gmail.com>
3148 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3149 QIreg_operand instead of register_operand predicate.
3150 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3151 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3152 comments instead of -fmitigate[-_]rop.
3154 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3157 * cgraphunit.c (symbol_table::compile): Switch to text_section
3158 before calling assembly_start debug hook.
3159 * run-rtl-passes.c (run_rtl_passes): Likewise.
3162 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3164 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3165 range_int_cst_p rather than !symbolic_range_p before calling
3166 extract_range_from_multiplicative_op_1.
3168 2017-01-04 Jeff Law <law@redhat.com>
3170 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3171 redundant test in assertion.
3173 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3175 * doc/rtl.texi: Document machine_mode wrapper classes.
3177 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3179 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3182 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3184 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3185 the VEC_PERM_EXPR fold to fail.
3187 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3190 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3191 to switched_sections.
3193 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3196 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3199 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3202 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3203 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3205 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3208 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3209 is BLKmode and bitpos not zero or mode change is needed.
3211 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3214 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3217 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3220 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3221 instead of MULT rtx. Update all corresponding splitters.
3223 (*ssub<modesuffix>): Ditto.
3225 (*cmp_sadd_di): Update split patterns.
3226 (*cmp_sadd_si): Ditto.
3227 (*cmp_sadd_sidi): Ditto.
3228 (*cmp_ssub_di): Ditto.
3229 (*cmp_ssub_si): Ditto.
3230 (*cmp_ssub_sidi): Ditto.
3231 * config/alpha/predicates.md (const23_operand): New predicate.
3232 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3233 Look for ASHIFT, not MULT inner operand.
3234 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3236 2018-01-04 Martin Liska <mliska@suse.cz>
3238 PR gcov-profile/83669
3239 * gcov.c (output_intermediate_file): Add version to intermediate
3241 * doc/gcov.texi: Document new field 'version' in intermediate
3242 file format. Fix location of '-k' option of gcov command.
3244 2018-01-04 Martin Liska <mliska@suse.cz>
3247 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3249 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3251 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3253 2018-01-03 Martin Sebor <msebor@redhat.com>
3255 PR tree-optimization/83655
3256 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3257 checking calls with invalid arguments.
3259 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3261 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3262 (vectorizable_mask_load_store): Delete.
3263 (vectorizable_call): Return false for masked loads and stores.
3264 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3265 instead of gimple_assign_rhs1.
3266 (vectorizable_load): Handle IFN_MASK_LOAD.
3267 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3269 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3271 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3273 (vectorizable_mask_load_store): ...here.
3274 (vectorizable_load): ...and here.
3276 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3278 * tree-vect-stmts.c (vect_build_all_ones_mask)
3279 (vect_build_zero_merge_argument): New functions, split out from...
3280 (vectorizable_load): ...here.
3282 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3284 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3286 (vectorizable_mask_load_store): ...here.
3287 (vectorizable_store): ...and here.
3289 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3291 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3293 (vectorizable_mask_load_store): ...here.
3295 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3297 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3298 (vect_model_store_cost): Take a vec_load_store_type instead of a
3300 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3301 (vect_model_store_cost): Take a vec_load_store_type instead of a
3303 (vectorizable_mask_load_store): Update accordingly.
3304 (vectorizable_store): Likewise.
3305 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3307 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3309 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3310 IFN_MASK_LOAD calls here rather than...
3311 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3313 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3314 Alan Hayward <alan.hayward@arm.com>
3315 David Sherwood <david.sherwood@arm.com>
3317 * expmed.c (extract_bit_field_1): For vector extracts,
3318 fall back to extract_bit_field_as_subreg if vec_extract
3321 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3322 Alan Hayward <alan.hayward@arm.com>
3323 David Sherwood <david.sherwood@arm.com>
3325 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3326 they are variable or constant sized.
3327 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3328 slots for constant-sized data.
3330 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3331 Alan Hayward <alan.hayward@arm.com>
3332 David Sherwood <david.sherwood@arm.com>
3334 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3335 handling COND_EXPRs with boolean comparisons, try to find a better
3336 basis for the mask type than the boolean itself.
3338 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3340 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3341 is calculated and how it can be overridden.
3342 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3343 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3345 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3348 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3349 Alan Hayward <alan.hayward@arm.com>
3350 David Sherwood <david.sherwood@arm.com>
3352 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3353 Remove the mode argument.
3354 (aarch64_simd_valid_immediate): Remove the mode and inverse
3356 * config/aarch64/iterators.md (bitsize): New iterator.
3357 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3358 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3359 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3360 aarch64_simd_valid_immediate.
3361 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3362 (aarch64_reg_or_bic_imm): Likewise.
3363 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3364 with an insn_type enum and msl with a modifier_type enum.
3365 Replace element_width with a scalar_mode. Change the shift
3366 to unsigned int. Add constructors for scalar_float_mode and
3367 scalar_int_mode elements.
3368 (aarch64_vect_float_const_representable_p): Delete.
3369 (aarch64_can_const_movi_rtx_p)
3370 (aarch64_simd_scalar_immediate_valid_for_move)
3371 (aarch64_simd_make_constant): Update call to
3372 aarch64_simd_valid_immediate.
3373 (aarch64_advsimd_valid_immediate_hs): New function.
3374 (aarch64_advsimd_valid_immediate): Likewise.
3375 (aarch64_simd_valid_immediate): Remove mode and inverse
3376 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3377 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3378 and aarch64_float_const_representable_p on the result.
3379 (aarch64_output_simd_mov_immediate): Remove mode argument.
3380 Update call to aarch64_simd_valid_immediate and use of
3381 simd_immediate_info.
3382 (aarch64_output_scalar_simd_mov_immediate): Update call
3385 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3386 Alan Hayward <alan.hayward@arm.com>
3387 David Sherwood <david.sherwood@arm.com>
3389 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3390 (mode_nunits): Likewise CONST_MODE_NUNITS.
3391 * machmode.def (ADJUST_NUNITS): Document.
3392 * genmodes.c (mode_data::need_nunits_adj): New field.
3393 (blank_mode): Update accordingly.
3394 (adj_nunits): New variable.
3395 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3397 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3398 listed in adj_nunits.
3399 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3400 listed in adj_nunits. Don't emit case statements for such modes.
3401 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3402 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3403 nothing if adj_nunits is nonnull.
3404 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3405 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3406 (emit_mode_fbit): Update use of print_maybe_const_decl.
3407 (emit_move_size): Likewise. Treat the array as non-const
3409 (emit_mode_adjustments): Handle adj_nunits.
3411 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3413 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3414 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3415 (VECTOR_MODES): Use it.
3416 (make_vector_modes): Take the prefix as an argument.
3418 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3419 Alan Hayward <alan.hayward@arm.com>
3420 David Sherwood <david.sherwood@arm.com>
3422 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3423 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3424 for MODE_VECTOR_BOOL.
3425 * machmode.def (VECTOR_BOOL_MODE): Document.
3426 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3427 (make_vector_bool_mode): New function.
3428 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3430 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3431 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3433 * stor-layout.c (int_mode_for_mode): Likewise.
3434 * tree.c (build_vector_type_for_mode): Likewise.
3435 * varasm.c (output_constant_pool_2): Likewise.
3436 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3437 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3438 for MODE_VECTOR_BOOL.
3439 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3440 of mode class checks.
3441 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3442 instead of a list of mode class checks.
3443 (expand_vector_scalar_condition): Likewise.
3444 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3446 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3447 Alan Hayward <alan.hayward@arm.com>
3448 David Sherwood <david.sherwood@arm.com>
3450 * machmode.h (mode_size): Change from unsigned short to
3452 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3453 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3454 or if measurement_type is not polynomial.
3455 (fixed_size_mode::includes_p): Check for constant-sized modes.
3456 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3457 return a poly_uint16 rather than an unsigned short.
3458 (emit_mode_size): Change the type of mode_size from unsigned short
3459 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3460 (emit_mode_adjustments): Cope with polynomial vector sizes.
3461 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3463 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3465 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3466 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3467 * caller-save.c (setup_save_areas): Likewise.
3468 (replace_reg_with_saved_mem): Likewise.
3469 * calls.c (emit_library_call_value_1): Likewise.
3470 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3471 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3472 (gen_lowpart_for_combine): Likewise.
3473 * convert.c (convert_to_integer_1): Likewise.
3474 * cse.c (equiv_constant, cse_insn): Likewise.
3475 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3476 (cselib_subst_to_values): Likewise.
3477 * dce.c (word_dce_process_block): Likewise.
3478 * df-problems.c (df_word_lr_mark_ref): Likewise.
3479 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3480 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3481 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3482 (rtl_for_decl_location): Likewise.
3483 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3484 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3485 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3486 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3487 (expand_expr_real_1): Likewise.
3488 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3489 (pad_below): Likewise.
3490 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3491 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3492 * ira.c (get_subreg_tracking_sizes): Likewise.
3493 * ira-build.c (ira_create_allocno_objects): Likewise.
3494 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3495 (ira_sort_regnos_for_alter_reg): Likewise.
3496 * ira-costs.c (record_operand_costs): Likewise.
3497 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3498 (resolve_simple_move): Likewise.
3499 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3500 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3501 (lra_constraints): Likewise.
3502 (CONST_POOL_OK_P): Reject variable-sized modes.
3503 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3504 (add_pseudo_to_slot, lra_spill): Likewise.
3505 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3506 * optabs-query.c (get_best_extraction_insn): Likewise.
3507 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3508 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3509 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3510 * recog.c (offsettable_address_addr_space_p): Likewise.
3511 * regcprop.c (maybe_mode_change): Likewise.
3512 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3513 * regrename.c (build_def_use): Likewise.
3514 * regstat.c (dump_reg_info): Likewise.
3515 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3516 (find_reloads, find_reloads_subreg_address): Likewise.
3517 * reload1.c (eliminate_regs_1): Likewise.
3518 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3519 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3520 (simplify_binary_operation_1, simplify_subreg): Likewise.
3521 * targhooks.c (default_function_arg_padding): Likewise.
3522 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3523 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3524 (verify_gimple_assign_ternary): Likewise.
3525 * tree-inline.c (estimate_move_cost): Likewise.
3526 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3527 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3528 (get_address_cost_ainc): Likewise.
3529 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3530 (vect_supportable_dr_alignment): Likewise.
3531 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3532 (vectorizable_reduction): Likewise.
3533 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3534 (vectorizable_operation, vectorizable_load): Likewise.
3535 * tree.c (build_same_sized_truth_vector_type): Likewise.
3536 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3537 * var-tracking.c (emit_note_insn_var_location): Likewise.
3538 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3539 (ADDR_VEC_ALIGN): Likewise.
3541 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3542 Alan Hayward <alan.hayward@arm.com>
3543 David Sherwood <david.sherwood@arm.com>
3545 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3547 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3548 or if measurement_type is polynomial.
3549 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3550 * combine.c (make_extraction): Likewise.
3551 * dse.c (find_shift_sequence): Likewise.
3552 * dwarf2out.c (mem_loc_descriptor): Likewise.
3553 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3554 (extract_bit_field, extract_low_bits): Likewise.
3555 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3556 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3557 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3558 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3559 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3560 * reload.c (find_reloads): Likewise.
3561 * reload1.c (alter_reg): Likewise.
3562 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3563 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3564 * tree-if-conv.c (predicate_mem_writes): Likewise.
3565 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3566 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3567 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3568 * valtrack.c (dead_debug_insert_temp): Likewise.
3569 * varasm.c (mergeable_constant_section): Likewise.
3570 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3572 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3573 Alan Hayward <alan.hayward@arm.com>
3574 David Sherwood <david.sherwood@arm.com>
3576 * expr.c (expand_assignment): Cope with polynomial mode sizes
3577 when assigning to a CONCAT.
3579 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3580 Alan Hayward <alan.hayward@arm.com>
3581 David Sherwood <david.sherwood@arm.com>
3583 * machmode.h (mode_precision): Change from unsigned short to
3585 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3587 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3588 or if measurement_type is not polynomial.
3589 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3590 in which the mode is already known to be a scalar_int_mode.
3591 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3592 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3594 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3595 for GET_MODE_PRECISION.
3596 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3597 for GET_MODE_PRECISION.
3598 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3600 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3601 (expand_field_assignment, make_extraction): Likewise.
3602 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3603 (get_last_value): Likewise.
3604 * convert.c (convert_to_integer_1): Likewise.
3605 * cse.c (cse_insn): Likewise.
3606 * expr.c (expand_expr_real_1): Likewise.
3607 * lra-constraints.c (simplify_operand_subreg): Likewise.
3608 * optabs-query.c (can_atomic_load_p): Likewise.
3609 * optabs.c (expand_atomic_load): Likewise.
3610 (expand_atomic_store): Likewise.
3611 * ree.c (combine_reaching_defs): Likewise.
3612 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3613 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3614 * tree.h (type_has_mode_precision_p): Likewise.
3615 * ubsan.c (instrument_si_overflow): Likewise.
3617 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3618 Alan Hayward <alan.hayward@arm.com>
3619 David Sherwood <david.sherwood@arm.com>
3621 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3622 polynomial numbers of units.
3623 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3624 (valid_vector_subparts_p): New function.
3625 (build_vector_type): Remove temporary shim and take the number
3626 of units as a poly_uint64 rather than an int.
3627 (build_opaque_vector_type): Take the number of units as a
3628 poly_uint64 rather than an int.
3629 * tree.c (build_vector_from_ctor): Handle polynomial
3630 TYPE_VECTOR_SUBPARTS.
3631 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3632 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3633 (build_vector_from_val): If the number of units is variable,
3634 use build_vec_duplicate_cst for constant operands and
3635 VEC_DUPLICATE_EXPR otherwise.
3636 (make_vector_type): Remove temporary is_constant ().
3637 (build_vector_type, build_opaque_vector_type): Take the number of
3638 units as a poly_uint64 rather than an int.
3639 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3641 * cfgexpand.c (expand_debug_expr): Likewise.
3642 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3643 (store_constructor, expand_expr_real_1): Likewise.
3644 (const_scalar_mask_from_tree): Likewise.
3645 * fold-const-call.c (fold_const_reduction): Likewise.
3646 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3647 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3648 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3649 (fold_relational_const): Likewise.
3650 (native_interpret_vector): Likewise. Change the size from an
3651 int to an unsigned int.
3652 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3653 TYPE_VECTOR_SUBPARTS.
3654 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3655 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3656 duplicating a non-constant operand into a variable-length vector.
3657 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3658 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3659 * ipa-icf.c (sem_variable::equals): Likewise.
3660 * match.pd: Likewise.
3661 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3662 * print-tree.c (print_node): Likewise.
3663 * stor-layout.c (layout_type): Likewise.
3664 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3665 * tree-cfg.c (verify_gimple_comparison): Likewise.
3666 (verify_gimple_assign_binary): Likewise.
3667 (verify_gimple_assign_ternary): Likewise.
3668 (verify_gimple_assign_single): Likewise.
3669 * tree-pretty-print.c (dump_generic_node): Likewise.
3670 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3671 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3672 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3673 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3674 (vect_shift_permute_load_chain): Likewise.
3675 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3676 (expand_vector_condition, optimize_vector_constructor): Likewise.
3677 (lower_vec_perm, get_compute_type): Likewise.
3678 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3679 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3680 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3681 (vect_recog_mask_conversion_pattern): Likewise.
3682 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3683 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3684 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3685 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3686 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3687 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3688 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3689 (supportable_widening_operation): Likewise.
3690 (supportable_narrowing_operation): Likewise.
3691 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3693 * varasm.c (output_constant): Likewise.
3695 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3696 Alan Hayward <alan.hayward@arm.com>
3697 David Sherwood <david.sherwood@arm.com>
3699 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3700 so that both the length == 3 and length != 3 cases set up their
3701 own permute vectors. Add comments explaining why we know the
3702 number of elements is constant.
3703 (vect_permute_load_chain): Likewise.
3705 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3706 Alan Hayward <alan.hayward@arm.com>
3707 David Sherwood <david.sherwood@arm.com>
3709 * machmode.h (mode_nunits): Change from unsigned char to
3711 (ONLY_FIXED_SIZE_MODES): New macro.
3712 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3713 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3714 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3716 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3717 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3718 or if measurement_type is not polynomial.
3719 * genmodes.c (ZERO_COEFFS): New macro.
3720 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3722 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3723 Use ZERO_COEFFS when emitting initializers.
3724 * data-streamer.h (bp_pack_poly_value): New function.
3725 (bp_unpack_poly_value): Likewise.
3726 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3727 for GET_MODE_NUNITS.
3728 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3729 for GET_MODE_NUNITS.
3730 * tree.c (make_vector_type): Remove temporary shim and make
3731 the real function take the number of units as a poly_uint64
3733 (build_vector_type_for_mode): Handle polynomial nunits.
3734 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3735 * emit-rtl.c (const_vec_series_p_1): Likewise.
3736 (gen_rtx_CONST_VECTOR): Likewise.
3737 * fold-const.c (test_vec_duplicate_folding): Likewise.
3738 * genrecog.c (validate_pattern): Likewise.
3739 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3740 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3741 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3742 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3743 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3744 * rtlanal.c (subreg_get_info): Likewise.
3745 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3746 (vect_grouped_load_supported): Likewise.
3747 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3748 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3749 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3750 (simplify_const_unary_operation, simplify_binary_operation_1)
3751 (simplify_const_binary_operation, simplify_ternary_operation)
3752 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3753 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3754 instead of CONST_VECTOR_NUNITS.
3755 * varasm.c (output_constant_pool_2): Likewise.
3756 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3757 explicit-encoded elements in the XVEC for variable-length vectors.
3759 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3761 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3763 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3764 Alan Hayward <alan.hayward@arm.com>
3765 David Sherwood <david.sherwood@arm.com>
3767 * coretypes.h (fixed_size_mode): Declare.
3768 (fixed_size_mode_pod): New typedef.
3769 * builtins.h (target_builtins::x_apply_args_mode)
3770 (target_builtins::x_apply_result_mode): Change type to
3771 fixed_size_mode_pod.
3772 * builtins.c (apply_args_size, apply_result_size, result_vector)
3773 (expand_builtin_apply_args_1, expand_builtin_apply)
3774 (expand_builtin_return): Update accordingly.
3776 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3778 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3779 * cselib.c (cselib_hash_rtx): Likewise.
3780 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3781 CONST_VECTOR encoding.
3783 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3784 Jeff Law <law@redhat.com>
3787 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3788 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3789 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3790 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3793 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3794 explicitly probe *sp in a noreturn function if there were any callee
3795 register saves or frame pointer is needed.
3797 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3800 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3801 BLKmode for ternary, binary or unary expressions.
3804 * var-tracking.c (delete_vta_debug_insn): New inline function.
3805 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3806 insns from get_insns () to NULL instead of each bb separately.
3807 Use delete_vta_debug_insn. No longer static.
3808 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3809 delete_vta_debug_insns callers.
3810 * rtl.h (delete_vta_debug_insns): Declare.
3811 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3812 instead of variable_tracking_main.
3814 2018-01-03 Martin Sebor <msebor@redhat.com>
3816 PR tree-optimization/83603
3817 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3818 arguments past the endof the argument list in functions declared
3819 without a prototype.
3820 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3821 Avoid checking when arguments are null.
3823 2018-01-03 Martin Sebor <msebor@redhat.com>
3826 * doc/extend.texi (attribute const): Fix a typo.
3827 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3828 issuing -Wsuggest-attribute for void functions.
3830 2018-01-03 Martin Sebor <msebor@redhat.com>
3832 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3833 offset_int::from instead of wide_int::to_shwi.
3834 (maybe_diag_overlap): Remove assertion.
3835 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3836 * gimple-ssa-sprintf.c (format_directive): Same.
3837 (parse_directive): Same.
3838 (sprintf_dom_walker::compute_format_length): Same.
3839 (try_substitute_return_value): Same.
3841 2017-01-03 Jeff Law <law@redhat.com>
3844 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3845 non-constant residual for zero at runtime and avoid probing in
3846 that case. Reorganize code for trailing problem to mirror handling
3849 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3851 PR tree-optimization/83501
3852 * tree-ssa-strlen.c (get_string_cst): New.
3853 (handle_char_store): Call get_string_cst.
3855 2018-01-03 Martin Liska <mliska@suse.cz>
3857 PR tree-optimization/83593
3858 * tree-ssa-strlen.c: Include tree-cfg.h.
3859 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3860 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3861 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3863 (strlen_dom_walker::before_dom_children): Call
3864 gimple_purge_dead_eh_edges. Dump tranformation with details
3866 (strlen_dom_walker::before_dom_children): Update call by adding
3867 new argument cleanup_eh.
3868 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3870 2018-01-03 Martin Liska <mliska@suse.cz>
3873 * cif-code.def (VARIADIC_THUNK): New enum value.
3874 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3877 2018-01-03 Jan Beulich <jbeulich@suse.com>
3879 * sse.md (mov<mode>_internal): Tighten condition for when to use
3880 vmovdqu<ssescalarsize> for TI and OI modes.
3882 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3884 Update copyright years.
3886 2018-01-03 Martin Liska <mliska@suse.cz>
3889 * ipa-visibility.c (function_and_variable_visibility): Skip
3890 functions with noipa attribure.
3892 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3894 * gcc.c (process_command): Update copyright notice dates.
3895 * gcov-dump.c (print_version): Ditto.
3896 * gcov.c (print_version): Ditto.
3897 * gcov-tool.c (print_version): Ditto.
3898 * gengtype.c (create_file): Ditto.
3899 * doc/cpp.texi: Bump @copying's copyright year.
3900 * doc/cppinternals.texi: Ditto.
3901 * doc/gcc.texi: Ditto.
3902 * doc/gccint.texi: Ditto.
3903 * doc/gcov.texi: Ditto.
3904 * doc/install.texi: Ditto.
3905 * doc/invoke.texi: Ditto.
3907 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3909 * vector-builder.h (vector_builder::m_full_nelts): Change from
3910 unsigned int to poly_uint64.
3911 (vector_builder::full_nelts): Update prototype accordingly.
3912 (vector_builder::new_vector): Likewise.
3913 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3914 (vector_builder::operator ==): Likewise.
3915 (vector_builder::finalize): Likewise.
3916 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3917 Take the number of elements as a poly_uint64 rather than an
3919 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3920 from unsigned int to poly_uint64.
3921 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3922 (vec_perm_indices::new_vector): Likewise.
3923 (vec_perm_indices::length): Likewise.
3924 (vec_perm_indices::nelts_per_input): Likewise.
3925 (vec_perm_indices::input_nelts): Likewise.
3926 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3927 number of elements per input as a poly_uint64 rather than an
3928 unsigned int. Use the original encoding for variable-length
3929 vectors, rather than clamping each individual element.
3930 For the second and subsequent elements in each pattern,
3931 clamp the step and base before clamping their sum.
3932 (vec_perm_indices::series_p): Handle polynomial element counts.
3933 (vec_perm_indices::all_in_range_p): Likewise.
3934 (vec_perm_indices_to_tree): Likewise.
3935 (vec_perm_indices_to_rtx): Likewise.
3936 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3937 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3938 (tree_vector_builder::new_binary_operation): Handle polynomial
3939 element counts. Return false if we need to know the number
3940 of elements at compile time.
3941 * fold-const.c (fold_vec_perm): Punt if the number of elements
3942 isn't known at compile time.
3944 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3946 * vec-perm-indices.h (vec_perm_builder): Change element type
3947 from HOST_WIDE_INT to poly_int64.
3948 (vec_perm_indices::element_type): Update accordingly.
3949 (vec_perm_indices::clamp): Handle polynomial element_types.
3950 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3951 (vec_perm_indices::all_in_range_p): Likewise.
3952 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3954 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3955 polynomial vec_perm_indices element types.
3956 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3957 * fold-const.c (fold_vec_perm): Likewise.
3958 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3959 * tree-vect-generic.c (lower_vec_perm): Likewise.
3960 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3961 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3962 element type to HOST_WIDE_INT.
3964 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3965 Alan Hayward <alan.hayward@arm.com>
3966 David Sherwood <david.sherwood@arm.com>
3968 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3969 rather than an int. Use plus_constant.
3970 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3971 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3973 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3974 Alan Hayward <alan.hayward@arm.com>
3975 David Sherwood <david.sherwood@arm.com>
3977 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3978 a HOST_WIDE_INT to a poly_int64.
3980 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3981 Alan Hayward <alan.hayward@arm.com>
3982 David Sherwood <david.sherwood@arm.com>
3984 * calls.c (load_register_parameters): Cope with polynomial
3985 mode sizes. Require a constant size for BLKmode parameters
3986 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3987 forces a parameter to be padded at the lsb end in order to
3988 fill a complete number of words, require the parameter size
3989 to be ordered wrt UNITS_PER_WORD.
3991 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3992 Alan Hayward <alan.hayward@arm.com>
3993 David Sherwood <david.sherwood@arm.com>
3995 * reload1.c (spill_stack_slot_width): Change element type
3996 from unsigned int to poly_uint64_pod.
3997 (alter_reg): Treat mode sizes as polynomial.
3999 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4000 Alan Hayward <alan.hayward@arm.com>
4001 David Sherwood <david.sherwood@arm.com>
4003 * reload.c (complex_word_subreg_p): New function.
4004 (reload_inner_reg_of_subreg, push_reload): Use it.
4006 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4007 Alan Hayward <alan.hayward@arm.com>
4008 David Sherwood <david.sherwood@arm.com>
4010 * lra-constraints.c (process_alt_operands): Reject matched
4011 operands whose sizes aren't ordered.
4012 (match_reload): Refer to this check here.
4014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4015 Alan Hayward <alan.hayward@arm.com>
4016 David Sherwood <david.sherwood@arm.com>
4018 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4019 that the mode size is in the set {1, 2, 4, 8, 16}.
4021 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4022 Alan Hayward <alan.hayward@arm.com>
4023 David Sherwood <david.sherwood@arm.com>
4025 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4026 Use plus_constant instead of gen_rtx_PLUS.
4028 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4029 Alan Hayward <alan.hayward@arm.com>
4030 David Sherwood <david.sherwood@arm.com>
4032 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4033 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4034 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4035 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4036 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4037 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4038 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4039 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4040 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4041 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4043 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4044 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4045 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4046 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4047 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4048 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4049 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4050 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4051 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4052 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4054 * expr.c (emit_move_resolve_push): Treat the input and result
4055 of PUSH_ROUNDING as a poly_int64.
4056 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4057 (emit_push_insn): Likewise.
4058 * lra-eliminations.c (mark_not_eliminable): Likewise.
4059 * recog.c (push_operand): Likewise.
4060 * reload1.c (elimination_effects): Likewise.
4061 * rtlanal.c (nonzero_bits1): Likewise.
4062 * calls.c (store_one_arg): Likewise. Require the padding to be
4063 known at compile time.
4065 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4066 Alan Hayward <alan.hayward@arm.com>
4067 David Sherwood <david.sherwood@arm.com>
4069 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4070 Use plus_constant instead of gen_rtx_PLUS.
4072 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4073 Alan Hayward <alan.hayward@arm.com>
4074 David Sherwood <david.sherwood@arm.com>
4076 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4079 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4080 Alan Hayward <alan.hayward@arm.com>
4081 David Sherwood <david.sherwood@arm.com>
4083 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4084 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4085 via stack temporaries. Treat the mode size as polynomial too.
4087 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4088 Alan Hayward <alan.hayward@arm.com>
4089 David Sherwood <david.sherwood@arm.com>
4091 * expr.c (expand_expr_real_2): When handling conversions involving
4092 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4093 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4094 as a poly_uint64 too.
4096 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4097 Alan Hayward <alan.hayward@arm.com>
4098 David Sherwood <david.sherwood@arm.com>
4100 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4102 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4103 Alan Hayward <alan.hayward@arm.com>
4104 David Sherwood <david.sherwood@arm.com>
4106 * combine.c (can_change_dest_mode): Handle polynomial
4107 REGMODE_NATURAL_SIZE.
4108 * expmed.c (store_bit_field_1): Likewise.
4109 * expr.c (store_constructor): Likewise.
4110 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4111 and polynomial REGMODE_NATURAL_SIZE.
4112 (gen_lowpart_common): Likewise.
4113 * reginfo.c (record_subregs_of_mode): Likewise.
4114 * rtlanal.c (read_modify_subreg_p): Likewise.
4116 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4117 Alan Hayward <alan.hayward@arm.com>
4118 David Sherwood <david.sherwood@arm.com>
4120 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4121 numbers of elements.
4123 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4124 Alan Hayward <alan.hayward@arm.com>
4125 David Sherwood <david.sherwood@arm.com>
4127 * match.pd: Cope with polynomial numbers of vector elements.
4129 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4130 Alan Hayward <alan.hayward@arm.com>
4131 David Sherwood <david.sherwood@arm.com>
4133 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4134 in a POINTER_PLUS_EXPR.
4136 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4137 Alan Hayward <alan.hayward@arm.com>
4138 David Sherwood <david.sherwood@arm.com>
4140 * omp-simd-clone.c (simd_clone_subparts): New function.
4141 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4142 (ipa_simd_modify_function_body): Likewise.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4149 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4150 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4151 (expand_vector_condition, vector_element): Likewise.
4152 (subparts_gt): New function.
4153 (get_compute_type): Use subparts_gt.
4154 (count_type_subparts): Delete.
4155 (expand_vector_operations_1): Use subparts_gt instead of
4156 count_type_subparts.
4158 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4159 Alan Hayward <alan.hayward@arm.com>
4160 David Sherwood <david.sherwood@arm.com>
4162 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4163 (vect_compile_time_alias): ...this new function. Do the calculation
4164 on poly_ints rather than trees.
4165 (vect_prune_runtime_alias_test_list): Update call accordingly.
4167 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4168 Alan Hayward <alan.hayward@arm.com>
4169 David Sherwood <david.sherwood@arm.com>
4171 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4173 (vect_schedule_slp_instance): Likewise.
4175 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4176 Alan Hayward <alan.hayward@arm.com>
4177 David Sherwood <david.sherwood@arm.com>
4179 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4180 constant and extern definitions for variable-length vectors.
4181 (vect_get_constant_vectors): Note that the number of units
4182 is known to be constant.
4184 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4185 Alan Hayward <alan.hayward@arm.com>
4186 David Sherwood <david.sherwood@arm.com>
4188 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4189 of units as polynomial. Choose between WIDE and NARROW based
4192 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4193 Alan Hayward <alan.hayward@arm.com>
4194 David Sherwood <david.sherwood@arm.com>
4196 * tree-vect-stmts.c (simd_clone_subparts): New function.
4197 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4199 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4200 Alan Hayward <alan.hayward@arm.com>
4201 David Sherwood <david.sherwood@arm.com>
4203 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4204 vectors as polynomial. Use build_index_vector for
4207 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4208 Alan Hayward <alan.hayward@arm.com>
4209 David Sherwood <david.sherwood@arm.com>
4211 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4212 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4213 for variable-length vectors.
4214 (vectorizable_mask_load_store): Treat the number of units as
4215 polynomial, asserting that it is constant if the condition has
4216 already been enforced.
4217 (vectorizable_store, vectorizable_load): Likewise.
4219 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4220 Alan Hayward <alan.hayward@arm.com>
4221 David Sherwood <david.sherwood@arm.com>
4223 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4224 of units as polynomial. Punt if we can't tell at compile time
4225 which vector contains the final result.
4227 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4228 Alan Hayward <alan.hayward@arm.com>
4229 David Sherwood <david.sherwood@arm.com>
4231 * tree-vect-loop.c (vectorizable_induction): Treat the number
4232 of units as polynomial. Punt on SLP inductions. Use an integer
4233 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4234 cast of such a series for variable-length floating-point
4237 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4238 Alan Hayward <alan.hayward@arm.com>
4239 David Sherwood <david.sherwood@arm.com>
4241 * tree.h (build_index_vector): Declare.
4242 * tree.c (build_index_vector): New function.
4243 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4244 of units as polynomial, forcibly converting it to a constant if
4245 vectorizable_reduction has already enforced the condition.
4246 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4247 to create a {1,2,3,...} vector.
4248 (vectorizable_reduction): Treat the number of units as polynomial.
4249 Choose vectype_in based on the largest scalar element size rather
4250 than the smallest number of units. Enforce the restrictions
4253 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4254 Alan Hayward <alan.hayward@arm.com>
4255 David Sherwood <david.sherwood@arm.com>
4257 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4258 number of units as polynomial.
4260 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4261 Alan Hayward <alan.hayward@arm.com>
4262 David Sherwood <david.sherwood@arm.com>
4264 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4265 * target.def (autovectorize_vector_sizes): Return the vector sizes
4266 by pointer, using vector_sizes rather than a bitmask.
4267 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4268 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4269 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4271 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4272 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4273 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4274 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4275 * omp-general.c (omp_max_vf): Likewise.
4276 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4277 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4278 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4279 * tree-vect-slp.c (vect_slp_bb): Likewise.
4280 * doc/tm.texi: Regenerate.
4281 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4283 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4284 the vector size as a poly_uint64 rather than an unsigned int.
4285 (current_vector_size): Change from an unsigned int to a poly_uint64.
4286 (get_vectype_for_scalar_type): Update accordingly.
4287 * tree.h (build_truth_vector_type): Take the size and number of
4288 units as a poly_uint64 rather than an unsigned int.
4289 (build_vector_type): Add a temporary overload that takes
4290 the number of units as a poly_uint64 rather than an unsigned int.
4291 * tree.c (make_vector_type): Likewise.
4292 (build_truth_vector_type): Take the number of units as a poly_uint64
4293 rather than an unsigned int.
4295 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4296 Alan Hayward <alan.hayward@arm.com>
4297 David Sherwood <david.sherwood@arm.com>
4299 * target.def (get_mask_mode): Take the number of units and length
4300 as poly_uint64s rather than unsigned ints.
4301 * targhooks.h (default_get_mask_mode): Update accordingly.
4302 * targhooks.c (default_get_mask_mode): Likewise.
4303 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4304 * doc/tm.texi: Regenerate.
4306 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4307 Alan Hayward <alan.hayward@arm.com>
4308 David Sherwood <david.sherwood@arm.com>
4310 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4311 * omp-general.c (omp_max_vf): Likewise.
4312 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4313 (expand_omp_simd): Handle polynomial safelen.
4314 * omp-low.c (omplow_simd_context): Add a default constructor.
4315 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4316 (lower_rec_simd_input_clauses): Update accordingly.
4317 (lower_rec_input_clauses): Likewise.
4319 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4320 Alan Hayward <alan.hayward@arm.com>
4321 David Sherwood <david.sherwood@arm.com>
4323 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4324 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4325 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4326 (vect_analyze_slp_cost): Likewise.
4327 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4328 (vect_model_load_cost): Likewise.
4330 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4331 Alan Hayward <alan.hayward@arm.com>
4332 David Sherwood <david.sherwood@arm.com>
4334 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4335 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4336 from an unsigned int * to a poly_uint64_pod *.
4337 (calculate_unrolling_factor): New function.
4338 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4340 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4341 Alan Hayward <alan.hayward@arm.com>
4342 David Sherwood <david.sherwood@arm.com>
4344 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4345 from an unsigned int to a poly_uint64.
4346 (_loop_vec_info::slp_unrolling_factor): Likewise.
4347 (_loop_vec_info::vectorization_factor): Change from an int
4349 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4350 (vect_get_num_vectors): New function.
4351 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4352 (vect_get_num_copies): Use vect_get_num_vectors.
4353 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4354 to an unsigned int *.
4355 (vect_analyze_data_refs): Change min_vf from an int * to a
4357 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4358 than an unsigned HOST_WIDE_INT.
4359 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4360 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4361 to an unsigned int *.
4362 (vect_analyze_data_ref_dependences): Likewise.
4363 (vect_compute_data_ref_alignment): Handle polynomial vf.
4364 (vect_enhance_data_refs_alignment): Likewise.
4365 (vect_prune_runtime_alias_test_list): Likewise.
4366 (vect_shift_permute_load_chain): Likewise.
4367 (vect_supportable_dr_alignment): Likewise.
4368 (dependence_distance_ge_vf): Take the vectorization factor as a
4369 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4370 (vect_analyze_data_refs): Change min_vf from an int * to a
4372 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4373 vfm1 as a poly_uint64 rather than an int. Make the same change
4374 for the returned bound_scalar.
4375 (vect_gen_vector_loop_niters): Handle polynomial vf.
4376 (vect_do_peeling): Likewise. Update call to
4377 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4378 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4380 * tree-vect-loop.c (vect_determine_vectorization_factor)
4381 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4382 (vect_get_known_peeling_cost): Likewise.
4383 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4384 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4385 (vect_transform_loop): Likewise. Use the lowest possible VF when
4386 updating the upper bounds of the loop.
4387 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4389 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4390 polynomial unroll factors.
4391 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4392 (vect_make_slp_decision): Likewise.
4393 (vect_supported_load_permutation_p): Likewise, and polynomial
4395 (vect_analyze_slp_cost): Handle polynomial vf.
4396 (vect_slp_analyze_node_operations): Likewise.
4397 (vect_slp_analyze_bb_1): Likewise.
4398 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4399 than an unsigned HOST_WIDE_INT.
4400 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4401 (vectorizable_load): Handle polynomial vf.
4402 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4404 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4406 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4407 Alan Hayward <alan.hayward@arm.com>
4408 David Sherwood <david.sherwood@arm.com>
4410 * match.pd: Handle bit operations involving three constants
4411 and try to fold one pair.
4413 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4415 * tree-vect-loop-manip.c: Include gimple-fold.h.
4416 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4417 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4418 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4419 Add a path that uses a step of VF instead of 1, but disable it
4421 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4422 and niters_no_overflow parameters. Update calls to
4423 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4424 Create a new SSA name if the latter choses to use a ste other
4425 than zero, and return it via niters_vector_mult_vf_var.
4426 * tree-vect-loop.c (vect_transform_loop): Update calls to
4427 vect_do_peeling, vect_gen_vector_loop_niters and
4428 slpeel_make_loop_iterate_ntimes.
4429 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4430 (vect_gen_vector_loop_niters): Update declarations after above changes.
4432 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4434 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4435 128-bit round to integer instructions.
4436 (ceil<mode>2): Likewise.
4437 (btrunc<mode>2): Likewise.
4438 (round<mode>2): Likewise.
4440 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4442 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4443 unaligned VSX load/store on P8/P9.
4444 (expand_block_clear): Allow the use of unaligned VSX
4445 load/store on P8/P9.
4447 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4449 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4451 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4452 swap associated with both a load and a store.
4454 2018-01-02 Andrew Waterman <andrew@sifive.com>
4456 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4457 * config/riscv/riscv.md (clear_cache): Use it.
4459 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4461 * web.c: Remove out-of-date comment.
4463 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4465 * expr.c (fixup_args_size_notes): Check that any existing
4466 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4467 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4468 (emit_single_push_insn): ...here.
4470 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4472 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4473 (const_vector_encoded_nelts): New function.
4474 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4475 (const_vector_int_elt, const_vector_elt): Declare.
4476 * emit-rtl.c (const_vector_int_elt_1): New function.
4477 (const_vector_elt): Likewise.
4478 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4479 of CONST_VECTOR_ELT.
4481 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4483 * expr.c: Include rtx-vector-builder.h.
4484 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4485 directly on the tree encoding.
4486 (const_vector_from_tree): Likewise.
4487 * optabs.c: Include rtx-vector-builder.h.
4488 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4489 sequence of "u" values.
4490 * vec-perm-indices.c: Include rtx-vector-builder.h.
4491 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4492 directly on the vec_perm_indices encoding.
4494 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4496 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4497 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4498 * rtx-vector-builder.h: New file.
4499 * rtx-vector-builder.c: Likewise.
4500 * rtl.h (rtx_def::u2): Add a const_vector field.
4501 (CONST_VECTOR_NPATTERNS): New macro.
4502 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4503 (CONST_VECTOR_DUPLICATE_P): Likewise.
4504 (CONST_VECTOR_STEPPED_P): Likewise.
4505 (CONST_VECTOR_ENCODED_ELT): Likewise.
4506 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4507 (unwrap_const_vec_duplicate): Likewise.
4508 (const_vec_series_p): Check for a non-duplicated vector encoding.
4509 Say that the function only returns true for integer vectors.
4510 * emit-rtl.c: Include rtx-vector-builder.h.
4511 (gen_const_vec_duplicate_1): Delete.
4512 (gen_const_vector): Call gen_const_vec_duplicate instead of
4513 gen_const_vec_duplicate_1.
4514 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4515 (gen_const_vec_duplicate): Use rtx_vector_builder.
4516 (gen_const_vec_series): Likewise.
4517 (gen_rtx_CONST_VECTOR): Likewise.
4518 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4519 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4520 Build a new vector rather than modifying a CONST_VECTOR in-place.
4521 (handle_special_swappables): Update call accordingly.
4522 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4523 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4524 Build a new vector rather than modifying a CONST_VECTOR in-place.
4525 (handle_special_swappables): Update call accordingly.
4527 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4529 * simplify-rtx.c (simplify_const_binary_operation): Use
4530 CONST_VECTOR_ELT instead of XVECEXP.
4532 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4534 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4535 the selector elements to be different from the data elements
4536 if the selector is a VECTOR_CST.
4537 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4538 ssizetype for the selector.
4540 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4542 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4543 before testing each element individually.
4544 * tree-vect-generic.c (lower_vec_perm): Likewise.
4546 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4548 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4549 * selftest-run-tests.c (selftest::run_tests): Call it.
4550 * vector-builder.h (vector_builder::operator ==): New function.
4551 (vector_builder::operator !=): Likewise.
4552 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4553 (vec_perm_indices::all_from_input_p): New function.
4554 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4555 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4556 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4557 instead of reading the VECTOR_CST directly. Detect whether both
4558 vector inputs are the same before constructing the vec_perm_indices,
4559 and update the number of inputs argument accordingly. Use the
4560 utility functions added above. Only construct sel2 if we need to.
4562 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4564 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4565 the broadcast of the low byte.
4566 (expand_mult_highpart): Use an explicit encoding for the permutes.
4567 * optabs-query.c (can_mult_highpart_p): Likewise.
4568 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4569 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4570 (vectorizable_bswap): Likewise.
4571 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4572 explicit encoding for the power-of-2 permutes.
4573 (vect_permute_store_chain): Likewise.
4574 (vect_grouped_load_supported): Likewise.
4575 (vect_permute_load_chain): Likewise.
4577 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4579 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4580 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4581 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4582 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4583 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4584 (vect_gen_perm_mask_any): Likewise.
4586 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4588 * int-vector-builder.h: New file.
4589 * vec-perm-indices.h: Include int-vector-builder.h.
4590 (vec_perm_indices): Redefine as an int_vector_builder.
4591 (auto_vec_perm_indices): Delete.
4592 (vec_perm_builder): Redefine as a stand-alone class.
4593 (vec_perm_indices::vec_perm_indices): New function.
4594 (vec_perm_indices::clamp): Likewise.
4595 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4596 (vec_perm_indices::new_vector): New function.
4597 (vec_perm_indices::new_expanded_vector): Update for new
4598 vec_perm_indices class.
4599 (vec_perm_indices::rotate_inputs): New function.
4600 (vec_perm_indices::all_in_range_p): Operate directly on the
4601 encoded form, without computing elided elements.
4602 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4603 encoding. Update for new vec_perm_indices class.
4604 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4605 the given vec_perm_builder.
4606 (expand_vec_perm_var): Update vec_perm_builder constructor.
4607 (expand_mult_highpart): Use vec_perm_builder instead of
4608 auto_vec_perm_indices.
4609 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4610 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4611 or double series encoding as appropriate.
4612 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4613 vec_perm_indices instead of auto_vec_perm_indices.
4614 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4615 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4616 (vect_permute_store_chain): Likewise.
4617 (vect_grouped_load_supported): Likewise.
4618 (vect_permute_load_chain): Likewise.
4619 (vect_shift_permute_load_chain): Likewise.
4620 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4621 (vect_transform_slp_perm_load): Likewise.
4622 (vect_schedule_slp_instance): Likewise.
4623 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4624 (vectorizable_mask_load_store): Likewise.
4625 (vectorizable_bswap): Likewise.
4626 (vectorizable_store): Likewise.
4627 (vectorizable_load): Likewise.
4628 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4629 vec_perm_indices instead of auto_vec_perm_indices. Use
4630 tree_to_vec_perm_builder to read the vector from a tree.
4631 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4632 vec_perm_builder instead of a vec_perm_indices.
4633 (have_whole_vector_shift): Use vec_perm_builder and
4634 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4635 truncation to calc_vec_perm_mask_for_shift.
4636 (vect_create_epilog_for_reduction): Likewise.
4637 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4638 from auto_vec_perm_indices to vec_perm_indices.
4639 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4640 instead of changing individual elements.
4641 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4642 the vector in d.perm.
4643 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4644 from auto_vec_perm_indices to vec_perm_indices.
4645 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4646 instead of changing individual elements.
4647 (arm_vectorize_vec_perm_const): Use new_vector to install
4648 the vector in d.perm.
4649 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4650 Update vec_perm_builder constructor.
4651 (rs6000_expand_interleave): Likewise.
4652 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4653 (rs6000_expand_interleave): Likewise.
4655 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4657 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4658 to qimode could truncate the indices.
4659 * optabs.c (expand_vec_perm_var): Likewise.
4661 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4663 * Makefile.in (OBJS): Add vec-perm-indices.o.
4664 * vec-perm-indices.h: New file.
4665 * vec-perm-indices.c: Likewise.
4666 * target.h (vec_perm_indices): Replace with a forward class
4668 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4669 * optabs.h: Include vec-perm-indices.h.
4670 (expand_vec_perm): Delete.
4671 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4672 (expand_vec_perm_const): Declare.
4673 * target.def (vec_perm_const_ok): Replace with...
4674 (vec_perm_const): ...this new hook.
4675 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4676 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4677 * doc/tm.texi: Regenerate.
4678 * optabs.def (vec_perm_const): Delete.
4679 * doc/md.texi (vec_perm_const): Likewise.
4680 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4681 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4682 expand_vec_perm for constant permutation vectors. Assert that
4683 the mode of variable permutation vectors is the integer equivalent
4684 of the mode that is being permuted.
4685 * optabs-query.h (selector_fits_mode_p): Declare.
4686 * optabs-query.c: Include vec-perm-indices.h.
4687 (selector_fits_mode_p): New function.
4688 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4689 is defined, instead of checking whether the vec_perm_const_optab
4690 exists. Use targetm.vectorize.vec_perm_const instead of
4691 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4692 fit in the vector mode before using a variable permute.
4693 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4694 vec_perm_indices instead of an rtx.
4695 (expand_vec_perm): Replace with...
4696 (expand_vec_perm_const): ...this new function. Take the selector
4697 as a vec_perm_indices rather than an rtx. Also take the mode of
4698 the selector. Update call to shift_amt_for_vec_perm_mask.
4699 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4700 Use vec_perm_indices::new_expanded_vector to expand the original
4701 selector into bytes. Check whether the indices fit in the vector
4702 mode before using a variable permute.
4703 (expand_vec_perm_var): Make global.
4704 (expand_mult_highpart): Use expand_vec_perm_const.
4705 * fold-const.c: Includes vec-perm-indices.h.
4706 * tree-ssa-forwprop.c: Likewise.
4707 * tree-vect-data-refs.c: Likewise.
4708 * tree-vect-generic.c: Likewise.
4709 * tree-vect-loop.c: Likewise.
4710 * tree-vect-slp.c: Likewise.
4711 * tree-vect-stmts.c: Likewise.
4712 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4714 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4715 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4716 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4717 (aarch64_vectorize_vec_perm_const): ...this new function.
4718 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4719 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4720 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4721 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4722 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4723 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4724 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4726 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4727 check for NEON modes.
4728 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4729 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4730 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4731 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4733 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4734 the old VEC_PERM_CONST conditions.
4735 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4736 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4737 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4738 (ia64_vectorize_vec_perm_const_ok): Merge into...
4739 (ia64_vectorize_vec_perm_const): ...this new function.
4740 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4741 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4742 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4743 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4744 * config/mips/mips.c (mips_expand_vec_perm_const)
4745 (mips_vectorize_vec_perm_const_ok): Merge into...
4746 (mips_vectorize_vec_perm_const): ...this new function.
4747 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4748 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4749 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4750 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4751 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4752 (rs6000_expand_vec_perm_const): Delete.
4753 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4755 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4756 (altivec_expand_vec_perm_const_le): Take each operand individually.
4757 Operate on constant selectors rather than rtxes.
4758 (altivec_expand_vec_perm_const): Likewise. Update call to
4759 altivec_expand_vec_perm_const_le.
4760 (rs6000_expand_vec_perm_const): Delete.
4761 (rs6000_vectorize_vec_perm_const_ok): Delete.
4762 (rs6000_vectorize_vec_perm_const): New function.
4763 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4764 an element count and rtx array.
4765 (rs6000_expand_extract_even): Update call accordingly.
4766 (rs6000_expand_interleave): Likewise.
4767 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4768 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4769 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4770 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4771 (rs6000_expand_vec_perm_const): Delete.
4772 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4773 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4774 (altivec_expand_vec_perm_const_le): Take each operand individually.
4775 Operate on constant selectors rather than rtxes.
4776 (altivec_expand_vec_perm_const): Likewise. Update call to
4777 altivec_expand_vec_perm_const_le.
4778 (rs6000_expand_vec_perm_const): Delete.
4779 (rs6000_vectorize_vec_perm_const_ok): Delete.
4780 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4781 reference to the SPE evmerge intructions.
4782 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4783 an element count and rtx array.
4784 (rs6000_expand_extract_even): Update call accordingly.
4785 (rs6000_expand_interleave): Likewise.
4786 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4787 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4789 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4791 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4793 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4794 vector mode and that that mode matches the mode of the data
4796 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4797 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4798 directly using expand_vec_perm_1 when forcing selectors into
4800 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4802 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4804 * optabs-query.h (can_vec_perm_p): Delete.
4805 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4806 * optabs-query.c (can_vec_perm_p): Split into...
4807 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4808 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4809 particular selector is valid.
4810 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4811 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4812 (vect_grouped_load_supported): Likewise.
4813 (vect_shift_permute_load_chain): Likewise.
4814 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4815 (vect_transform_slp_perm_load): Likewise.
4816 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4817 (vectorizable_bswap): Likewise.
4818 (vect_gen_perm_mask_checked): Likewise.
4819 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4820 implementations of variable permutation vectors into account
4821 when deciding which selector to use.
4822 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4823 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4824 with a false third argument.
4825 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4826 to test whether the constant selector is valid and can_vec_perm_var_p
4827 to test whether a variable selector is valid.
4829 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4831 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4832 * optabs-query.c (can_vec_perm_p): Likewise.
4833 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4834 instead of vec_perm_indices.
4835 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4836 (vect_gen_perm_mask_checked): Likewise,
4837 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4838 (vect_gen_perm_mask_checked): Likewise,
4840 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4842 * optabs-query.h (qimode_for_vec_perm): Declare.
4843 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4844 (qimode_for_vec_perm): ...this new function.
4845 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4847 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4849 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4850 does not have a conditional at the top.
4852 2018-01-02 Richard Biener <rguenther@suse.de>
4854 * ipa-inline.c (big_speedup_p): Fix expression.
4856 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4859 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4862 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4866 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4867 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4868 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4869 cond_taken_branch_cost 3->4.
4871 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4873 PR tree-optimization/83581
4874 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4875 TODO_cleanup_cfg if any changes have been made.
4878 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4879 convert_modes if target mode has the right side, but different mode
4883 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4884 last argument when extracting from CONCAT. If either from_real or
4885 from_imag is NULL, use expansion through memory. If result is not
4886 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4887 the parts directly to inner mode, if even that fails, use expansion
4891 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4892 check for bswap in mode rather than HImode and use that in expand_unop
4895 Copyright (C) 2018 Free Software Foundation, Inc.
4897 Copying and distribution of this file, with or without modification,
4898 are permitted in any medium without royalty provided the copyright
4899 notice and this notice are preserved.