gcc/testsuite/gcc.target/powerpc/p9-extract-3.c

   1 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
   2 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
   3 /* { dg-require-effective-target powerpc_p9vector_ok } */
   4 /* { dg-options "-mcpu=power9 -O2" } */
   5
   6 /* Test that under ISA 3.0 (-mcpu=power9), the compiler optimizes conversion to
   7    double after a vec_extract to use the VEXTRACTU{B,H} or XXEXTRACTUW
   8    instructions (which leaves the result in a vector register), and not the
   9    VEXTU{B,H,W}{L,R}X instructions (which needs a direct move to do the floating
  10    point conversion).  */
  11
  12 #include <altivec.h>
  13
  14 double
  15 fpcvt_int_0 (vector int a)
  16 {
  17   int b = vec_extract (a, 0);
  18   return (double)b;
  19 }
  20
  21 double
  22 fpcvt_int_3 (vector int a)
  23 {
  24   int b = vec_extract (a, 3);
  25   return (double)b;
  26 }
  27
  28 double
  29 fpcvt_uint_0 (vector unsigned int a)
  30 {
  31   unsigned int b = vec_extract (a, 0);
  32   return (double)b;
  33 }
  34
  35 double
  36 fpcvt_uint_3 (vector unsigned int a)
  37 {
  38   unsigned int b = vec_extract (a, 3);
  39   return (double)b;
  40 }
  41
  42 double
  43 fpcvt_short_0 (vector short a)
  44 {
  45   short b = vec_extract (a, 0);
  46   return (double)b;
  47 }
  48
  49 double
  50 fpcvt_short_7 (vector short a)
  51 {
  52   short b = vec_extract (a, 7);
  53   return (double)b;
  54 }
  55
  56 double
  57 fpcvt_ushort_0 (vector unsigned short a)
  58 {
  59   unsigned short b = vec_extract (a, 0);
  60   return (double)b;
  61 }
  62
  63 double
  64 fpcvt_ushort_7 (vector unsigned short a)
  65 {
  66   unsigned short b = vec_extract (a, 7);
  67   return (double)b;
  68 }
  69
  70 double
  71 fpcvt_schar_0 (vector signed char a)
  72 {
  73   signed char b = vec_extract (a, 0);
  74   return (double)b;
  75 }
  76
  77 double
  78 fpcvt_schar_15 (vector signed char a)
  79 {
  80   signed char b = vec_extract (a, 15);
  81   return (double)b;
  82 }
  83
  84 double
  85 fpcvt_uchar_0 (vector unsigned char a)
  86 {
  87   unsigned char b = vec_extract (a, 0);
  88   return (double)b;
  89 }
  90
  91 double
  92 fpcvt_uchar_15 (vector unsigned char a)
  93 {
  94   signed char b = vec_extract (a, 15);
  95   return (double)b;
  96 }
  97
  98 /* { dg-final { scan-assembler     "vextractu\[bh\] "    } } */
  99 /* { dg-final { scan-assembler     "vexts\[bh\]2d "      } } */
 100 /* { dg-final { scan-assembler     "vspltw "             } } */
 101 /* { dg-final { scan-assembler     "xscvsxddp "          } } */
 102 /* { dg-final { scan-assembler     "xvcvsxwdp "          } } */
 103 /* { dg-final { scan-assembler     "xvcvuxwdp "          } } */
 104 /* { dg-final { scan-assembler-not "exts\[bhw\] "        } } */
 105 /* { dg-final { scan-assembler-not "stxv"                } } */
 106 /* { dg-final { scan-assembler-not "m\[ft\]vsrd "        } } */
 107 /* { dg-final { scan-assembler-not "m\[ft\]vsrw\[az\] "  } } */
 108 /* { dg-final { scan-assembler-not "l\[hw\]\[az\] "      } } */