* gcc.target/powerpc/builtins-1-be.c <vclzb>: Rename duplicate test
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / fold-vec-minmax-longlong.c
blob234d078b07c8427bfa04557661e3d07341ffd89e
1 /* Verify that overloaded built-ins for vec_min with long long
2 inputs produce the right results. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_p8vector_ok } */
6 /* { dg-options "-mpower8-vector" } */
8 #include <altivec.h>
10 vector signed long long
11 test3_min (vector signed long long x, vector signed long long y)
13 return vec_min (x, y);
16 vector unsigned long long
17 test6_min (vector unsigned long long x, vector unsigned long long y)
19 return vec_min (x, y);
22 vector signed long long
23 test3_max (vector signed long long x, vector signed long long y)
25 return vec_max (x, y);
28 vector unsigned long long
29 test6_max (vector unsigned long long x, vector unsigned long long y)
31 return vec_max (x, y);
34 vector signed long long
35 test7_max (vector signed long long x, vector long long bool y)
37 return vec_max (x, y);
40 vector signed long long
41 test8_max (vector long long bool x, vector signed long long y)
43 return vec_max (x, y);
46 vector unsigned long long
47 test9_max (vector unsigned long long x, vector long long bool y)
49 return vec_max (x, y);
52 vector unsigned long long
53 test10_max (vector long long bool x, vector unsigned long long y)
55 return vec_max (x, y);
58 /* { dg-final { scan-assembler-times "vminsd" 1 } } */
59 /* { dg-final { scan-assembler-times "vmaxsd" 3 } } */
60 /* { dg-final { scan-assembler-times "vminud" 1 } } */
61 /* { dg-final { scan-assembler-times "vmaxud" 3 } } */