* gcc.target/powerpc/builtins-1-be.c <vclzb>: Rename duplicate test
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / fold-vec-minmax-int.c
blob0dea882db9f79aa703981e98b984c8a6283391cb
1 /* Verify that overloaded built-ins for vec_min with int
2 inputs produce the right results. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
8 #include <altivec.h>
10 vector signed int
11 test3_min (vector signed int x, vector signed int y)
13 return vec_min (x, y);
16 vector unsigned int
17 test6_min (vector unsigned int x, vector unsigned int y)
19 return vec_min (x, y);
22 vector signed int
23 test3_max (vector signed int x, vector signed int y)
25 return vec_max (x, y);
28 vector unsigned int
29 test6_max (vector unsigned int x, vector unsigned int y)
31 return vec_max (x, y);
34 vector signed int
35 test4_min (vector bool int x, vector signed int y)
37 return vec_min (x, y);
40 vector signed int
41 test5_min (vector signed int x, vector bool int y)
43 return vec_min (x, y);
46 vector unsigned int
47 test7_min (vector bool int x, vector unsigned int y)
49 return vec_min (x, y);
52 vector unsigned int
53 test8_min (vector unsigned int x, vector bool int y)
55 return vec_min (x, y);
58 /* { dg-final { scan-assembler-times "vminsw" 3 } } */
59 /* { dg-final { scan-assembler-times "vmaxsw" 1 } } */
60 /* { dg-final { scan-assembler-times "vminuw" 3 } } */
61 /* { dg-final { scan-assembler-times "vmaxuw" 1 } } */