1 /* Verify that overloaded built-ins for vec_min with int
2 inputs produce the right results. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
11 test3_min (vector
signed int x
, vector
signed int y
)
13 return vec_min (x
, y
);
17 test6_min (vector
unsigned int x
, vector
unsigned int y
)
19 return vec_min (x
, y
);
23 test3_max (vector
signed int x
, vector
signed int y
)
25 return vec_max (x
, y
);
29 test6_max (vector
unsigned int x
, vector
unsigned int y
)
31 return vec_max (x
, y
);
35 test4_min (vector
bool int x
, vector
signed int y
)
37 return vec_min (x
, y
);
41 test5_min (vector
signed int x
, vector
bool int y
)
43 return vec_min (x
, y
);
47 test7_min (vector
bool int x
, vector
unsigned int y
)
49 return vec_min (x
, y
);
53 test8_min (vector
unsigned int x
, vector
bool int y
)
55 return vec_min (x
, y
);
58 /* { dg-final { scan-assembler-times "vminsw" 3 } } */
59 /* { dg-final { scan-assembler-times "vmaxsw" 1 } } */
60 /* { dg-final { scan-assembler-times "vminuw" 3 } } */
61 /* { dg-final { scan-assembler-times "vmaxuw" 1 } } */