gcc/testsuite/gcc.target/powerpc/bool3-p7.c

   1 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
   2 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
   3 /* { dg-require-effective-target powerpc_vsx_ok } */
   4 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
   5 /* { dg-options "-O2 -mcpu=power7" } */
   6 /* { dg-final { scan-assembler     "\[ \t\]and "     } } */
   7 /* { dg-final { scan-assembler     "\[ \t\]or "      } } */
   8 /* { dg-final { scan-assembler     "\[ \t\]xor "     } } */
   9 /* { dg-final { scan-assembler     "\[ \t\]nor "     } } */
  10 /* { dg-final { scan-assembler     "\[ \t\]andc "    } } */
  11 /* { dg-final { scan-assembler-not "\[ \t\]vand "    } } */
  12 /* { dg-final { scan-assembler-not "\[ \t\]vandc "   } } */
  13 /* { dg-final { scan-assembler-not "\[ \t\]vor "     } } */
  14 /* { dg-final { scan-assembler-not "\[ \t\]vxor "    } } */
  15 /* { dg-final { scan-assembler-not "\[ \t\]vnor "    } } */
  16 /* { dg-final { scan-assembler-not "\[ \t\]xxland "  } } */
  17 /* { dg-final { scan-assembler-not "\[ \t\]xxlor "   } } */
  18 /* { dg-final { scan-assembler-not "\[ \t\]xxlxor "  } } */
  19 /* { dg-final { scan-assembler-not "\[ \t\]xxlnor "  } } */
  20 /* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */
  21 /* { dg-final { scan-assembler-not "\[ \t\]xxleqv "  } } */
  22 /* { dg-final { scan-assembler-not "\[ \t\]xxlorc "  } } */
  23 /* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */
  24
  25 /* On power7, for 128-bit types, ORC/ANDC/EQV might not show up, since the
  26    vector unit doesn't support these, so the appropriate combine patterns may
  27    not be generated.  */
  28
  29 #ifndef TYPE
  30 #ifdef _ARCH_PPC64
  31 #define TYPE __int128_t
  32 #else
  33 typedef int v4si __attribute__ ((vector_size (16)));
  34 #define TYPE v4si
  35 #endif
  36 #endif
  37
  38 #include "bool3.h"