[AArch64, ILP32] 3/6 Change tests to be ILP32-friendly.
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / fcvt_double_uint.c
blob59be47512cf73884700c1fb5de69ace7558e8ae3
1 /* { dg-do compile } */
2 /* { dg-options "-O2" } */
4 #define GPF double
5 #define SUFFIX(x) x
6 #define GPI unsigned int
8 #include "fcvt.x"
10 /* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
11 /* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 {target lp64} } } */
12 /* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *d\[0-9\]" 1 {target ilp32} } } */
13 /* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
14 /* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 {target lp64} } } */
15 /* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *d\[0-9\]" 1 {target ilp32} } } */
16 /* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
17 /* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *d\[0-9\]" 2 } } */