Fix for assertion error when expanding macro.
[iverilog.git] / parse.y
blobc2614ce8699b6e8ad397859c6c41083ecae042f1
2 %{
3 /*
4 * Copyright (c) 1998-2007 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
10 * any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
21 #ifdef HAVE_CVS_IDENT
22 #ident "$Id: parse.y,v 1.239 2007/06/14 03:50:00 steve Exp $"
23 #endif
25 # include "config.h"
27 # include "parse_misc.h"
28 # include "compiler.h"
29 # include "pform.h"
30 # include "Statement.h"
31 # include "PSpec.h"
32 # include <sstream>
34 class PSpecPath;
36 extern void lex_start_table();
37 extern void lex_end_table();
39 static svector<PExpr*>* active_range = 0;
40 static bool active_signed = false;
42 /* Port declaration lists use this structure for context. */
43 static struct {
44 NetNet::Type port_net_type;
45 NetNet::PortType port_type;
46 bool sign_flag;
47 svector<PExpr*>* range;
48 } port_declaration_context;
50 /* Later version of bison (including 1.35) will not compile in stack
51 extension if the output is compiled with C++ and either the YYSTYPE
52 or YYLTYPE are provided by the source code. However, I can get the
53 old behavior back by defining these symbols. */
54 # define YYSTYPE_IS_TRIVIAL 1
55 # define YYLTYPE_IS_TRIVIAL 1
57 /* Recent version of bison expect that the user supply a
58 YYLLOC_DEFAULT macro that makes up a yylloc value from existing
59 values. I need to supply an explicit version to account for the
60 text field, that otherwise won't be copied. */
61 # define YYLLOC_DEFAULT(Current, Rhs, N) do { \
62 (Current).first_line = (Rhs)[1].first_line; \
63 (Current).first_column = (Rhs)[1].first_column; \
64 (Current).last_line = (Rhs)[N].last_line; \
65 (Current).last_column = (Rhs)[N].last_column; \
66 (Current).text = (Rhs)[1].text; } while (0)
69 * These are some common strength pairs that are used as defaults when
70 * the user is not otherwise specific.
72 const static struct str_pair_t pull_strength = { PGate::PULL, PGate::PULL };
73 const static struct str_pair_t str_strength = { PGate::STRONG, PGate::STRONG };
75 static list<perm_string>* list_from_identifier(char*id)
77 list<perm_string>*tmp = new list<perm_string>;
78 tmp->push_back(lex_strings.make(id));
79 delete id;
80 return tmp;
83 static list<perm_string>* list_from_identifier(list<perm_string>*tmp, char*id)
85 tmp->push_back(lex_strings.make(id));
86 delete id;
87 return tmp;
92 %union {
93 bool flag;
95 char letter;
97 /* text items are C strings allocated by the lexor using
98 strdup. They can be put into lists with the texts type. */
99 char*text;
100 list<perm_string>*perm_strings;
101 pform_name_t*pform_name;
103 hname_t*hier;
105 list<string>*strings;
107 struct str_pair_t drive;
109 PCase::Item*citem;
110 svector<PCase::Item*>*citems;
112 lgate*gate;
113 svector<lgate>*gates;
115 Module::port_t *mport;
116 svector<Module::port_t*>*mports;
118 named_pexpr_t*named_pexpr;
119 svector<named_pexpr_t*>*named_pexprs;
120 struct parmvalue_t*parmvalue;
122 PExpr*expr;
123 svector<PExpr*>*exprs;
125 svector<PEEvent*>*event_expr;
127 NetNet::Type nettype;
128 PGBuiltin::Type gatetype;
129 NetNet::PortType porttype;
130 ivl_variable_type_t datatype;
132 PWire*wire;
133 svector<PWire*>*wires;
135 PEventStatement*event_statement;
136 Statement*statement;
137 svector<Statement*>*statement_list;
139 PTaskFuncArg function_type;
141 net_decl_assign_t*net_decl_assign;
143 verinum* number;
145 verireal* realtime;
147 PSpecPath* specpath;
148 list<index_component_t> *dimensions;
151 %token <text> IDENTIFIER SYSTEM_IDENTIFIER STRING
152 %token <text> PATHPULSE_IDENTIFIER
153 %token <number> BASED_NUMBER DEC_NUMBER
154 %token <realtime> REALTIME
155 %token K_LE K_GE K_EG K_EQ K_NE K_CEQ K_CNE K_LS K_RS K_RSS K_SG
156 %token K_PO_POS K_PO_NEG K_POW
157 %token K_PSTAR K_STARP
158 %token K_LOR K_LAND K_NAND K_NOR K_NXOR K_TRIGGER
159 %token K_always K_and K_assign K_begin K_bool K_buf K_bufif0 K_bufif1 K_case
160 %token K_casex K_casez K_cmos K_deassign K_default K_defparam K_disable
161 %token K_edge K_edge_descriptor
162 %token K_else K_end K_endcase K_endfunction K_endgenerate K_endmodule
163 %token K_endprimitive K_endspecify K_endtable K_endtask K_event K_for
164 %token K_force K_forever K_fork K_function K_generate K_genvar
165 %token K_highz0 K_highz1 K_if K_ifnone
166 %token K_initial K_inout K_input K_integer K_join K_large K_localparam
167 %token K_logic K_macromodule
168 %token K_medium K_module K_nand K_negedge K_nmos K_nor K_not K_notif0
169 %token K_notif1 K_or K_output K_parameter K_pmos K_posedge K_primitive
170 %token K_pull0 K_pull1 K_pulldown K_pullup K_rcmos K_real K_realtime
171 %token K_reg K_release K_repeat
172 %token K_rnmos K_rpmos K_rtran K_rtranif0 K_rtranif1 K_scalared
173 %token K_signed K_small K_specify
174 %token K_specparam K_strong0 K_strong1 K_supply0 K_supply1 K_table K_task
175 %token K_time K_tran K_tranif0 K_tranif1 K_tri K_tri0 K_tri1 K_triand
176 %token K_trior K_trireg K_vectored K_wait K_wand K_weak0 K_weak1
177 %token K_while K_wire
178 %token K_wone K_wor K_xnor K_xor
179 %token K_Shold K_Speriod K_Srecovery K_Srecrem K_Ssetup K_Swidth K_Ssetuphold
181 %token KK_attribute
183 %type <number> number
184 %type <flag> signed_opt udp_reg_opt edge_operator
185 %type <drive> drive_strength drive_strength_opt dr_strength0 dr_strength1
186 %type <letter> udp_input_sym udp_output_sym
187 %type <text> udp_input_list udp_sequ_entry udp_comb_entry
188 %type <perm_strings> udp_input_declaration_list
189 %type <strings> udp_entry_list udp_comb_entry_list udp_sequ_entry_list
190 %type <strings> udp_body udp_port_list
191 %type <wires> udp_port_decl udp_port_decls
192 %type <statement> udp_initial udp_init_opt
193 %type <expr> udp_initial_expr_opt
195 %type <text> register_variable net_variable real_variable
196 %type <perm_strings> register_variable_list net_variable_list real_variable_list list_of_identifiers
198 %type <net_decl_assign> net_decl_assign net_decl_assigns
200 %type <mport> port port_opt port_reference port_reference_list
201 %type <mport> port_declaration
202 %type <mports> list_of_ports module_port_list_opt list_of_port_declarations
204 %type <wires> task_item task_item_list task_item_list_opt
205 %type <wires> task_port_item task_port_decl task_port_decl_list
206 %type <wires> function_item function_item_list
208 %type <named_pexpr> port_name parameter_value_byname
209 %type <named_pexprs> port_name_list parameter_value_byname_list
211 %type <named_pexpr> attribute
212 %type <named_pexprs> attribute_list attribute_list_opt
214 %type <citem> case_item
215 %type <citems> case_items
217 %type <gate> gate_instance
218 %type <gates> gate_instance_list
220 %type <pform_name> heirarchy_identifier
221 %type <expr> expression expr_primary expr_mintypmax
222 %type <expr> lpvalue
223 %type <expr> delay_value delay_value_simple
224 %type <exprs> delay1 delay3 delay3_opt delay_value_list
225 %type <exprs> expression_list_with_nuls expression_list_proper
226 %type <exprs> cont_assign cont_assign_list
228 %type <exprs> range range_opt
229 %type <dimensions> dimensions_opt dimensions
230 %type <nettype> net_type var_type net_type_opt
231 %type <gatetype> gatetype
232 %type <porttype> port_type
233 %type <datatype> primitive_type primitive_type_opt
234 %type <parmvalue> parameter_value_opt
236 %type <function_type> function_range_or_type_opt
237 %type <event_expr> event_expression_list
238 %type <event_expr> event_expression
239 %type <event_statement> event_control
240 %type <statement> statement statement_or_null
241 %type <statement_list> statement_list
243 %type <letter> spec_polarity
244 %type <perm_strings> specify_path_identifiers
246 %type <specpath> specify_simple_path specify_simple_path_decl
247 %type <specpath> specify_edge_path specify_edge_path_decl
249 %token K_TAND
250 %right '?' ':'
251 %left K_LOR
252 %left K_LAND
253 %left '|'
254 %left '^' K_NXOR K_NOR
255 %left '&' K_NAND
256 %left K_EQ K_NE K_CEQ K_CNE
257 %left K_GE K_LE '<' '>'
258 %left K_LS K_RS K_RSS
259 %left '+' '-'
260 %left '*' '/' '%'
261 %left K_POW
262 %left UNARY_PREC
264 /* to resolve dangling else ambiguity. */
265 %nonassoc less_than_K_else
266 %nonassoc K_else
270 /* A degenerate source file can be completely empty. */
271 main : source_file | ;
273 source_file
274 : description
275 | source_file description
278 number : BASED_NUMBER
279 { $$ = $1; based_size = 0;}
280 | DEC_NUMBER
281 { $$ = $1; based_size = 0;}
282 | DEC_NUMBER BASED_NUMBER
283 { $$ = pform_verinum_with_size($1,$2, @2.text, @2.first_line);
284 based_size = 0; }
287 /* Verilog-2001 supports attribute lists, which can be attached to a
288 variety of different objects. The syntax inside the (* *) is a
289 comma separated list of names or names with assigned values. */
290 attribute_list_opt
291 : K_PSTAR attribute_list K_STARP { $$ = $2; }
292 | K_PSTAR K_STARP { $$ = 0; }
293 | { $$ = 0; }
296 attribute_list
297 : attribute_list ',' attribute
298 { svector<named_pexpr_t*>*tmp =
299 new svector<named_pexpr_t*>(*$1,$3);
300 delete $1;
301 $$ = tmp;
303 | attribute
304 { svector<named_pexpr_t*>*tmp = new svector<named_pexpr_t*>(1);
305 (*tmp)[0] = $1;
306 $$ = tmp;
311 attribute
312 : IDENTIFIER
313 { named_pexpr_t*tmp = new named_pexpr_t;
314 tmp->name = lex_strings.make($1);
315 tmp->parm = 0;
316 delete $1;
317 $$ = tmp;
319 | IDENTIFIER '=' expression
320 { PExpr*tmp = $3;
321 if (!pform_expression_is_constant(tmp)) {
322 yyerror(@3, "error: attribute value "
323 "expression must be constant.");
324 delete tmp;
325 tmp = 0;
327 named_pexpr_t*tmp2 = new named_pexpr_t;
328 tmp2->name = lex_strings.make($1);
329 tmp2->parm = tmp;
330 delete $1;
331 $$ = tmp2;
336 /* The block_item_decl is used in function definitions, task
337 definitions, module definitions and named blocks. Wherever a new
338 scope is entered, the source may declare new registers and
339 integers. This rule matches those declarations. The containing
340 rule has presumably set up the scope. */
342 block_item_decl
343 : attribute_list_opt K_reg
344 primitive_type_opt signed_opt range
345 register_variable_list ';'
346 { ivl_variable_type_t dtype = $3;
347 if (dtype == IVL_VT_NO_TYPE)
348 dtype = IVL_VT_LOGIC;
349 pform_set_net_range($6, $5, $4, dtype);
350 if ($1) delete $1;
353 /* This differs from the above pattern only in the absence of the
354 range. This is the rule for a scalar. */
356 | attribute_list_opt K_reg
357 primitive_type_opt signed_opt
358 register_variable_list ';'
359 { ivl_variable_type_t dtype = $3;
360 if (dtype == IVL_VT_NO_TYPE)
361 dtype = IVL_VT_LOGIC;
362 pform_set_net_range($5, 0, $4, dtype);
363 if ($1) delete $1;
366 /* Integer declarations are simpler in that they do not have all the
367 trappings of a general variable declaration. All of that is
368 implicit in the "integer" of the declaratin. */
370 | attribute_list_opt K_integer register_variable_list ';'
371 { pform_set_reg_integer($3);
372 if ($1) delete $1;
375 | attribute_list_opt K_time register_variable_list ';'
376 { pform_set_reg_time($3);
379 /* real declarations are fairly simple as there is no range of
380 signed flag in the declaration. Create the real as a NetNet::REG
381 with real value. Note that real and realtime are interchangable
382 in this context. */
384 | attribute_list_opt K_real real_variable_list ';'
385 { delete $3; }
386 | attribute_list_opt K_realtime real_variable_list ';'
387 { delete $3; }
389 | K_parameter parameter_assign_decl ';'
390 | K_localparam localparam_assign_decl ';'
392 /* Recover from errors that happen within variable lists. Use the
393 trailing semi-colon to resync the parser. */
395 | attribute_list_opt K_reg error ';'
396 { yyerror(@2, "error: syntax error in reg variable list.");
397 yyerrok;
398 if ($1) delete $1;
400 | attribute_list_opt K_integer error ';'
401 { yyerror(@2, "error: syntax error in integer variable list.");
402 yyerrok;
403 if ($1) delete $1;
405 | attribute_list_opt K_time error ';'
406 { yyerror(@2, "error: syntax error in time variable list.");
407 yyerrok;
409 | attribute_list_opt K_real error ';'
410 { yyerror(@2, "error: syntax error in real variable list.");
411 yyerrok;
413 | attribute_list_opt K_realtime error ';'
414 { yyerror(@1, "error: syntax error in realtime variable list.");
415 yyerrok;
417 | K_parameter error ';'
418 { yyerror(@1, "error: syntax error in parameter list.");
419 yyerrok;
421 | K_localparam error ';'
422 { yyerror(@1, "error: syntax error localparam list.");
423 yyerrok;
427 block_item_decls
428 : block_item_decl
429 | block_item_decls block_item_decl
432 block_item_decls_opt
433 : block_item_decls
437 case_item
438 : expression_list_proper ':' statement_or_null
439 { PCase::Item*tmp = new PCase::Item;
440 tmp->expr = *$1;
441 tmp->stat = $3;
442 delete $1;
443 $$ = tmp;
445 | K_default ':' statement_or_null
446 { PCase::Item*tmp = new PCase::Item;
447 tmp->stat = $3;
448 $$ = tmp;
450 | K_default statement_or_null
451 { PCase::Item*tmp = new PCase::Item;
452 tmp->stat = $2;
453 $$ = tmp;
455 | error ':' statement_or_null
456 { yyerror(@1, "error: Incomprehensible case expression.");
457 yyerrok;
461 case_items
462 : case_items case_item
463 { svector<PCase::Item*>*tmp;
464 tmp = new svector<PCase::Item*>(*$1, $2);
465 delete $1;
466 $$ = tmp;
468 | case_item
469 { svector<PCase::Item*>*tmp = new svector<PCase::Item*>(1);
470 (*tmp)[0] = $1;
471 $$ = tmp;
475 charge_strength
476 : '(' K_small ')'
477 | '(' K_medium ')'
478 | '(' K_large ')'
481 charge_strength_opt
482 : charge_strength
486 defparam_assign
487 : heirarchy_identifier '=' expression
488 { PExpr*tmp = $3;
489 if (!pform_expression_is_constant(tmp)) {
490 yyerror(@3, "error: parameter value "
491 "must be constant.");
492 delete tmp;
493 tmp = 0;
495 pform_set_defparam(*$1, $3);
496 delete $1;
500 defparam_assign_list
501 : defparam_assign
502 | range defparam_assign
503 { yyerror(@1, "error: defparam may not include a range.");
504 delete $1;
506 | defparam_assign_list ',' defparam_assign
509 delay1
510 : '#' delay_value_simple
511 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
512 (*tmp)[0] = $2;
513 $$ = tmp;
515 | '#' '(' delay_value ')'
516 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
517 (*tmp)[0] = $3;
518 $$ = tmp;
522 delay3
523 : '#' delay_value_simple
524 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
525 (*tmp)[0] = $2;
526 $$ = tmp;
528 | '#' '(' delay_value ')'
529 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
530 (*tmp)[0] = $3;
531 $$ = tmp;
533 | '#' '(' delay_value ',' delay_value ')'
534 { svector<PExpr*>*tmp = new svector<PExpr*>(2);
535 (*tmp)[0] = $3;
536 (*tmp)[1] = $5;
537 $$ = tmp;
539 | '#' '(' delay_value ',' delay_value ',' delay_value ')'
540 { svector<PExpr*>*tmp = new svector<PExpr*>(3);
541 (*tmp)[0] = $3;
542 (*tmp)[1] = $5;
543 (*tmp)[2] = $7;
544 $$ = tmp;
548 delay3_opt
549 : delay3 { $$ = $1; }
550 | { $$ = 0; }
553 delay_value_list
554 : delay_value
555 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
556 (*tmp)[0] = $1;
557 $$ = tmp;
559 | delay_value_list ',' delay_value
560 { svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
561 delete $1;
562 $$ = tmp;
566 delay_value
567 : expression
568 { PExpr*tmp = $1;
569 $$ = tmp;
571 | expression ':' expression ':' expression
572 { $$ = pform_select_mtm_expr($1, $3, $5); }
576 delay_value_simple
577 : DEC_NUMBER
578 { verinum*tmp = $1;
579 if (tmp == 0) {
580 yyerror(@1, "internal error: delay.");
581 $$ = 0;
582 } else {
583 $$ = new PENumber(tmp);
584 $$->set_file(@1.text);
585 $$->set_lineno(@1.first_line);
588 | REALTIME
589 { verireal*tmp = $1;
590 if (tmp == 0) {
591 yyerror(@1, "internal error: delay.");
592 $$ = 0;
593 } else {
594 $$ = new PEFNumber(tmp);
595 $$->set_file(@1.text);
596 $$->set_lineno(@1.first_line);
599 | IDENTIFIER
600 { PEIdent*tmp = new PEIdent(lex_strings.make($1));
601 tmp->set_file(@1.text);
602 tmp->set_lineno(@1.first_line);
603 $$ = tmp;
604 delete $1;
608 description
609 : module
610 | udp_primitive
611 | KK_attribute '(' IDENTIFIER ',' STRING ',' STRING ')'
612 { perm_string tmp3 = lex_strings.make($3);
613 pform_set_type_attrib(tmp3, $5, $7);
614 delete $3;
615 delete $5;
619 drive_strength
620 : '(' dr_strength0 ',' dr_strength1 ')'
621 { $$.str0 = $2.str0;
622 $$.str1 = $4.str1;
624 | '(' dr_strength1 ',' dr_strength0 ')'
625 { $$.str0 = $4.str0;
626 $$.str1 = $2.str1;
628 | '(' dr_strength0 ',' K_highz1 ')'
629 { $$.str0 = $2.str0;
630 $$.str1 = PGate::HIGHZ;
632 | '(' dr_strength1 ',' K_highz0 ')'
633 { $$.str0 = PGate::HIGHZ;
634 $$.str1 = $2.str1;
636 | '(' K_highz1 ',' dr_strength0 ')'
637 { $$.str0 = $4.str0;
638 $$.str1 = PGate::HIGHZ;
640 | '(' K_highz0 ',' dr_strength1 ')'
641 { $$.str0 = PGate::HIGHZ;
642 $$.str1 = $4.str1;
646 drive_strength_opt
647 : drive_strength { $$ = $1; }
648 | { $$.str0 = PGate::STRONG; $$.str1 = PGate::STRONG; }
651 dr_strength0
652 : K_supply0 { $$.str0 = PGate::SUPPLY; }
653 | K_strong0 { $$.str0 = PGate::STRONG; }
654 | K_pull0 { $$.str0 = PGate::PULL; }
655 | K_weak0 { $$.str0 = PGate::WEAK; }
658 dr_strength1
659 : K_supply1 { $$.str1 = PGate::SUPPLY; }
660 | K_strong1 { $$.str1 = PGate::STRONG; }
661 | K_pull1 { $$.str1 = PGate::PULL; }
662 | K_weak1 { $$.str1 = PGate::WEAK; }
665 event_control
666 : '@' heirarchy_identifier
667 { PEIdent*tmpi = new PEIdent(*$2);
668 PEEvent*tmpe = new PEEvent(PEEvent::ANYEDGE, tmpi);
669 PEventStatement*tmps = new PEventStatement(tmpe);
670 tmps->set_file(@1.text);
671 tmps->set_lineno(@1.first_line);
672 $$ = tmps;
673 delete $2;
675 | '@' '(' event_expression_list ')'
676 { PEventStatement*tmp = new PEventStatement(*$3);
677 tmp->set_file(@1.text);
678 tmp->set_lineno(@1.first_line);
679 delete $3;
680 $$ = tmp;
682 | '@' '(' error ')'
683 { yyerror(@1, "error: Malformed event control expression.");
684 $$ = 0;
688 event_expression_list
689 : event_expression
690 { $$ = $1; }
691 | event_expression_list K_or event_expression
692 { svector<PEEvent*>*tmp = new svector<PEEvent*>(*$1, *$3);
693 delete $1;
694 delete $3;
695 $$ = tmp;
697 | event_expression_list ',' event_expression
698 { svector<PEEvent*>*tmp = new svector<PEEvent*>(*$1, *$3);
699 delete $1;
700 delete $3;
701 $$ = tmp;
705 event_expression
706 : K_posedge expression
707 { PEEvent*tmp = new PEEvent(PEEvent::POSEDGE, $2);
708 tmp->set_file(@1.text);
709 tmp->set_lineno(@1.first_line);
710 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
711 (*tl)[0] = tmp;
712 $$ = tl;
714 | K_negedge expression
715 { PEEvent*tmp = new PEEvent(PEEvent::NEGEDGE, $2);
716 tmp->set_file(@1.text);
717 tmp->set_lineno(@1.first_line);
718 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
719 (*tl)[0] = tmp;
720 $$ = tl;
722 | expression
723 { PEEvent*tmp = new PEEvent(PEEvent::ANYEDGE, $1);
724 tmp->set_file(@1.text);
725 tmp->set_lineno(@1.first_line);
726 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
727 (*tl)[0] = tmp;
728 $$ = tl;
732 expression
733 : expr_primary
734 { $$ = $1; }
735 | '+' expr_primary %prec UNARY_PREC
736 { $$ = $2; }
737 | '-' expr_primary %prec UNARY_PREC
738 { PEUnary*tmp = new PEUnary('-', $2);
739 tmp->set_file(@2.text);
740 tmp->set_lineno(@2.first_line);
741 $$ = tmp;
743 | '~' expr_primary %prec UNARY_PREC
744 { PEUnary*tmp = new PEUnary('~', $2);
745 tmp->set_file(@2.text);
746 tmp->set_lineno(@2.first_line);
747 $$ = tmp;
749 | '&' expr_primary %prec UNARY_PREC
750 { PEUnary*tmp = new PEUnary('&', $2);
751 tmp->set_file(@2.text);
752 tmp->set_lineno(@2.first_line);
753 $$ = tmp;
755 | '!' expr_primary %prec UNARY_PREC
756 { PEUnary*tmp = new PEUnary('!', $2);
757 tmp->set_file(@2.text);
758 tmp->set_lineno(@2.first_line);
759 $$ = tmp;
761 | '|' expr_primary %prec UNARY_PREC
762 { PEUnary*tmp = new PEUnary('|', $2);
763 tmp->set_file(@2.text);
764 tmp->set_lineno(@2.first_line);
765 $$ = tmp;
767 | '^' expr_primary %prec UNARY_PREC
768 { PEUnary*tmp = new PEUnary('^', $2);
769 tmp->set_file(@2.text);
770 tmp->set_lineno(@2.first_line);
771 $$ = tmp;
773 | K_NAND expr_primary %prec UNARY_PREC
774 { PEUnary*tmp = new PEUnary('A', $2);
775 tmp->set_file(@2.text);
776 tmp->set_lineno(@2.first_line);
777 $$ = tmp;
779 | K_NOR expr_primary %prec UNARY_PREC
780 { PEUnary*tmp = new PEUnary('N', $2);
781 tmp->set_file(@2.text);
782 tmp->set_lineno(@2.first_line);
783 $$ = tmp;
785 | K_NXOR expr_primary %prec UNARY_PREC
786 { PEUnary*tmp = new PEUnary('X', $2);
787 tmp->set_file(@2.text);
788 tmp->set_lineno(@2.first_line);
789 $$ = tmp;
791 | '!' error %prec UNARY_PREC
792 { yyerror(@1, "error: Operand of unary ! "
793 "is not a primary expression.");
794 $$ = 0;
796 | '^' error %prec UNARY_PREC
797 { yyerror(@1, "error: Operand of reduction ^ "
798 "is not a primary expression.");
799 $$ = 0;
801 | expression '^' expression
802 { PEBinary*tmp = new PEBinary('^', $1, $3);
803 tmp->set_file(@2.text);
804 tmp->set_lineno(@2.first_line);
805 $$ = tmp;
807 | expression K_POW expression
808 { PEBinary*tmp = new PEBinary('p', $1, $3);
809 tmp->set_file(@2.text);
810 tmp->set_lineno(@2.first_line);
811 $$ = tmp;
813 | expression '*' expression
814 { PEBinary*tmp = new PEBinary('*', $1, $3);
815 tmp->set_file(@2.text);
816 tmp->set_lineno(@2.first_line);
817 $$ = tmp;
819 | expression '/' expression
820 { PEBinary*tmp = new PEBinary('/', $1, $3);
821 tmp->set_file(@2.text);
822 tmp->set_lineno(@2.first_line);
823 $$ = tmp;
825 | expression '%' expression
826 { PEBinary*tmp = new PEBinary('%', $1, $3);
827 tmp->set_file(@2.text);
828 tmp->set_lineno(@2.first_line);
829 $$ = tmp;
831 | expression '+' expression
832 { PEBinary*tmp = new PEBinary('+', $1, $3);
833 tmp->set_file(@2.text);
834 tmp->set_lineno(@2.first_line);
835 $$ = tmp;
837 | expression '-' expression
838 { PEBinary*tmp = new PEBinary('-', $1, $3);
839 tmp->set_file(@2.text);
840 tmp->set_lineno(@2.first_line);
841 $$ = tmp;
843 | expression '&' expression
844 { PEBinary*tmp = new PEBinary('&', $1, $3);
845 tmp->set_file(@2.text);
846 tmp->set_lineno(@2.first_line);
847 $$ = tmp;
849 | expression '|' expression
850 { PEBinary*tmp = new PEBinary('|', $1, $3);
851 tmp->set_file(@2.text);
852 tmp->set_lineno(@2.first_line);
853 $$ = tmp;
855 | expression K_NAND expression
856 { PEBinary*tmp = new PEBinary('A', $1, $3);
857 tmp->set_file(@2.text);
858 tmp->set_lineno(@2.first_line);
859 $$ = tmp;
861 | expression K_NOR expression
862 { PEBinary*tmp = new PEBinary('O', $1, $3);
863 tmp->set_file(@2.text);
864 tmp->set_lineno(@2.first_line);
865 $$ = tmp;
867 | expression K_NXOR expression
868 { PEBinary*tmp = new PEBinary('X', $1, $3);
869 tmp->set_file(@2.text);
870 tmp->set_lineno(@2.first_line);
871 $$ = tmp;
873 | expression '<' expression
874 { PEBinary*tmp = new PEBComp('<', $1, $3);
875 tmp->set_file(@2.text);
876 tmp->set_lineno(@2.first_line);
877 $$ = tmp;
879 | expression '>' expression
880 { PEBinary*tmp = new PEBComp('>', $1, $3);
881 tmp->set_file(@2.text);
882 tmp->set_lineno(@2.first_line);
883 $$ = tmp;
885 | expression K_LS expression
886 { PEBinary*tmp = new PEBShift('l', $1, $3);
887 tmp->set_file(@2.text);
888 tmp->set_lineno(@2.first_line);
889 $$ = tmp;
891 | expression K_RS expression
892 { PEBinary*tmp = new PEBShift('r', $1, $3);
893 tmp->set_file(@2.text);
894 tmp->set_lineno(@2.first_line);
895 $$ = tmp;
897 | expression K_RSS expression
898 { PEBinary*tmp = new PEBShift('R', $1, $3);
899 tmp->set_file(@2.text);
900 tmp->set_lineno(@2.first_line);
901 $$ = tmp;
903 | expression K_EQ expression
904 { PEBinary*tmp = new PEBComp('e', $1, $3);
905 tmp->set_file(@2.text);
906 tmp->set_lineno(@2.first_line);
907 $$ = tmp;
909 | expression K_CEQ expression
910 { PEBinary*tmp = new PEBComp('E', $1, $3);
911 tmp->set_file(@2.text);
912 tmp->set_lineno(@2.first_line);
913 $$ = tmp;
915 | expression K_LE expression
916 { PEBinary*tmp = new PEBComp('L', $1, $3);
917 tmp->set_file(@2.text);
918 tmp->set_lineno(@2.first_line);
919 $$ = tmp;
921 | expression K_GE expression
922 { PEBinary*tmp = new PEBComp('G', $1, $3);
923 tmp->set_file(@2.text);
924 tmp->set_lineno(@2.first_line);
925 $$ = tmp;
927 | expression K_NE expression
928 { PEBinary*tmp = new PEBComp('n', $1, $3);
929 tmp->set_file(@2.text);
930 tmp->set_lineno(@2.first_line);
931 $$ = tmp;
933 | expression K_CNE expression
934 { PEBinary*tmp = new PEBComp('N', $1, $3);
935 tmp->set_file(@2.text);
936 tmp->set_lineno(@2.first_line);
937 $$ = tmp;
939 | expression K_LOR expression
940 { PEBinary*tmp = new PEBinary('o', $1, $3);
941 tmp->set_file(@2.text);
942 tmp->set_lineno(@2.first_line);
943 $$ = tmp;
945 | expression K_LAND expression
946 { PEBinary*tmp = new PEBinary('a', $1, $3);
947 tmp->set_file(@2.text);
948 tmp->set_lineno(@2.first_line);
949 $$ = tmp;
951 | expression '?' expression ':' expression
952 { PETernary*tmp = new PETernary($1, $3, $5);
953 tmp->set_file(@2.text);
954 tmp->set_lineno(@2.first_line);
955 $$ = tmp;
959 expr_mintypmax
960 : expression
961 { $$ = $1; }
962 | expression ':' expression ':' expression
963 { switch (min_typ_max_flag) {
964 case MIN:
965 $$ = $1;
966 delete $3;
967 delete $5;
968 break;
969 case TYP:
970 delete $1;
971 $$ = $3;
972 delete $5;
973 break;
974 case MAX:
975 delete $1;
976 delete $3;
977 $$ = $5;
978 break;
980 if (min_typ_max_warn > 0) {
981 cerr << $$->get_line() << ": warning: choosing ";
982 switch (min_typ_max_flag) {
983 case MIN:
984 cerr << "min";
985 break;
986 case TYP:
987 cerr << "typ";
988 break;
989 case MAX:
990 cerr << "max";
991 break;
993 cerr << " expression." << endl;
994 min_typ_max_warn -= 1;
1000 /* Many contexts take a comma separated list of expressions. Null
1001 expressions can happen anywhere in the list, so there are two
1002 extra rules in expression_list_with_nuls for parsing and
1003 installing those nulls.
1005 The expression_list_proper rules do not allow null items in the
1006 expression list, so can be used where nul expressions are not allowed. */
1008 expression_list_with_nuls
1009 : expression_list_with_nuls ',' expression
1010 { svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
1011 delete $1;
1012 $$ = tmp;
1014 | expression
1015 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
1016 (*tmp)[0] = $1;
1017 $$ = tmp;
1020 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
1021 (*tmp)[0] = 0;
1022 $$ = tmp;
1025 | expression_list_with_nuls ','
1026 { svector<PExpr*>*tmp = new svector<PExpr*>(*$1, 0);
1027 delete $1;
1028 $$ = tmp;
1032 expression_list_proper
1033 : expression_list_proper ',' expression
1034 { svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
1035 delete $1;
1036 $$ = tmp;
1038 | expression
1039 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
1040 (*tmp)[0] = $1;
1041 $$ = tmp;
1045 expr_primary
1046 : number
1047 { assert($1);
1048 PENumber*tmp = new PENumber($1);
1049 tmp->set_file(@1.text);
1050 tmp->set_lineno(@1.first_line);
1051 $$ = tmp;
1053 | REALTIME
1054 { PEFNumber*tmp = new PEFNumber($1);
1055 tmp->set_file(@1.text);
1056 tmp->set_lineno(@1.first_line);
1057 $$ = tmp;
1059 | STRING
1060 { PEString*tmp = new PEString($1);
1061 tmp->set_file(@1.text);
1062 tmp->set_lineno(@1.first_line);
1063 $$ = tmp;
1065 | SYSTEM_IDENTIFIER
1066 { perm_string tn = lex_strings.make($1);
1067 PECallFunction*tmp = new PECallFunction(tn);
1068 tmp->set_file(@1.text);
1069 tmp->set_lineno(@1.first_line);
1070 $$ = tmp;
1071 delete $1;
1074 /* The heirarchy_identifier rule matches simple identifiers as well as
1075 indexed arrays and part selects */
1077 | heirarchy_identifier
1078 { PEIdent*tmp = new PEIdent(*$1);
1079 tmp->set_file(@1.text);
1080 tmp->set_lineno(@1.first_line);
1081 $$ = tmp;
1082 delete $1;
1085 /* An identifer followed by an expression list in parentheses is a
1086 function call. If a system identifier, then a system function
1087 call. */
1089 | heirarchy_identifier '(' expression_list_proper ')'
1090 { PECallFunction*tmp = new PECallFunction(*$1, *$3);
1091 tmp->set_file(@1.text);
1092 tmp->set_lineno(@1.first_line);
1093 delete $1;
1094 $$ = tmp;
1096 | SYSTEM_IDENTIFIER '(' expression_list_proper ')'
1097 { perm_string tn = lex_strings.make($1);
1098 PECallFunction*tmp = new PECallFunction(tn, *$3);
1099 tmp->set_file(@1.text);
1100 tmp->set_lineno(@1.first_line);
1101 $$ = tmp;
1104 /* Parenthesized expressions are primaries. */
1106 | '(' expr_mintypmax ')'
1107 { $$ = $2; }
1109 /* Various kinds of concatenation expressions. */
1111 | '{' expression_list_proper '}'
1112 { PEConcat*tmp = new PEConcat(*$2);
1113 tmp->set_file(@1.text);
1114 tmp->set_lineno(@1.first_line);
1115 delete $2;
1116 $$ = tmp;
1118 | '{' expression '{' expression_list_proper '}' '}'
1119 { PExpr*rep = $2;
1120 PEConcat*tmp = new PEConcat(*$4, rep);
1121 tmp->set_file(@1.text);
1122 tmp->set_lineno(@1.first_line);
1123 delete $4;
1124 $$ = tmp;
1126 | '{' expression '{' expression_list_proper '}' error '}'
1127 { PExpr*rep = $2;
1128 PEConcat*tmp = new PEConcat(*$4, rep);
1129 tmp->set_file(@1.text);
1130 tmp->set_lineno(@1.first_line);
1131 delete $4;
1132 $$ = tmp;
1133 yyerror(@5, "error: Syntax error between internal '}' "
1134 "and closing '}' of repeat concatenation.");
1135 yyerrok;
1139 /* A function_item is either a block item (i.e. a reg or integer
1140 declaration) or an input declaration. There are no output or
1141 inout ports. */
1142 function_item
1143 : K_input signed_opt range_opt list_of_identifiers ';'
1144 { svector<PWire*>*tmp
1145 = pform_make_task_ports(NetNet::PINPUT,
1146 IVL_VT_NO_TYPE, $2,
1147 $3, $4,
1148 @1.text, @1.first_line);
1149 $$ = tmp;
1151 | K_output signed_opt range_opt list_of_identifiers ';'
1152 { svector<PWire*>*tmp
1153 = pform_make_task_ports(NetNet::PINPUT,
1154 IVL_VT_NO_TYPE, $2,
1155 $3, $4,
1156 @1.text, @1.first_line);
1157 $$ = tmp;
1158 yyerror(@1, "Functions may not have output ports.");
1160 | K_inout signed_opt range_opt list_of_identifiers ';'
1161 { svector<PWire*>*tmp
1162 = pform_make_task_ports(NetNet::PINPUT,
1163 IVL_VT_NO_TYPE, $2,
1164 $3, $4,
1165 @1.text, @1.first_line);
1166 $$ = tmp;
1167 yyerror(@1, "Functions may not have inout ports.");
1170 /* When the port is an integer, infer a signed vector of the integer
1171 shape. Generate a range to make it work. */
1173 | K_input K_integer list_of_identifiers ';'
1174 { svector<PExpr*>*range_stub
1175 = new svector<PExpr*>(2);
1176 PExpr*re;
1177 re = new PENumber(new verinum(integer_width-1,
1178 integer_width));
1179 (*range_stub)[0] = re;
1180 re = new PENumber(new verinum((uint64_t)0, integer_width));
1181 (*range_stub)[1] = re;
1182 svector<PWire*>*tmp
1183 = pform_make_task_ports(NetNet::PINPUT,
1184 IVL_VT_LOGIC, true,
1185 range_stub, $3,
1186 @1.text, @1.first_line);
1187 $$ = tmp;
1190 /* Ports can be real. */
1192 | K_input K_real list_of_identifiers ';'
1193 { svector<PWire*>*tmp
1194 = pform_make_task_ports(NetNet::PINPUT,
1195 IVL_VT_REAL, false,
1196 0, $3,
1197 @1.text, @1.first_line);
1198 $$ = tmp;
1201 | block_item_decl
1202 { $$ = 0; }
1205 /* A function_item_list only lists the input/output/inout
1206 declarations. The integer and reg declarations are handled in
1207 place, so are not listed. The list builder needs to account for
1208 the possibility that the various parts may be NULL. */
1209 function_item_list
1210 : function_item
1211 { $$ = $1; }
1212 | function_item_list function_item
1213 { if ($1 && $2) {
1214 svector<PWire*>*tmp = new svector<PWire*>(*$1, *$2);
1215 delete $1;
1216 delete $2;
1217 $$ = tmp;
1218 } else if ($1) {
1219 $$ = $1;
1220 } else {
1221 $$ = $2;
1226 /* A gate_instance is a module instantiation or a built in part
1227 type. In any case, the gate has a set of connections to ports. */
1228 gate_instance
1229 : IDENTIFIER '(' expression_list_with_nuls ')'
1230 { lgate*tmp = new lgate;
1231 tmp->name = $1;
1232 tmp->parms = $3;
1233 tmp->file = @1.text;
1234 tmp->lineno = @1.first_line;
1235 delete $1;
1236 $$ = tmp;
1239 | IDENTIFIER range '(' expression_list_with_nuls ')'
1240 { lgate*tmp = new lgate;
1241 svector<PExpr*>*rng = $2;
1242 tmp->name = $1;
1243 tmp->parms = $4;
1244 tmp->range[0] = (*rng)[0];
1245 tmp->range[1] = (*rng)[1];
1246 tmp->file = @1.text;
1247 tmp->lineno = @1.first_line;
1248 delete $1;
1249 delete rng;
1250 $$ = tmp;
1252 | '(' expression_list_with_nuls ')'
1253 { lgate*tmp = new lgate;
1254 tmp->name = "";
1255 tmp->parms = $2;
1256 tmp->file = @1.text;
1257 tmp->lineno = @1.first_line;
1258 $$ = tmp;
1261 /* Degenerate modules can have no ports. */
1263 | IDENTIFIER range
1264 { lgate*tmp = new lgate;
1265 svector<PExpr*>*rng = $2;
1266 tmp->name = $1;
1267 tmp->parms = 0;
1268 tmp->parms_by_name = 0;
1269 tmp->range[0] = (*rng)[0];
1270 tmp->range[1] = (*rng)[1];
1271 tmp->file = @1.text;
1272 tmp->lineno = @1.first_line;
1273 delete $1;
1274 delete rng;
1275 $$ = tmp;
1278 /* Modules can also take ports by port-name expressions. */
1280 | IDENTIFIER '(' port_name_list ')'
1281 { lgate*tmp = new lgate;
1282 tmp->name = $1;
1283 tmp->parms = 0;
1284 tmp->parms_by_name = $3;
1285 tmp->file = @1.text;
1286 tmp->lineno = @1.first_line;
1287 delete $1;
1288 $$ = tmp;
1291 | IDENTIFIER range '(' port_name_list ')'
1292 { lgate*tmp = new lgate;
1293 svector<PExpr*>*rng = $2;
1294 tmp->name = $1;
1295 tmp->parms = 0;
1296 tmp->parms_by_name = $4;
1297 tmp->range[0] = (*rng)[0];
1298 tmp->range[1] = (*rng)[1];
1299 tmp->file = @1.text;
1300 tmp->lineno = @1.first_line;
1301 delete $1;
1302 delete rng;
1303 $$ = tmp;
1307 gate_instance_list
1308 : gate_instance_list ',' gate_instance
1309 { svector<lgate>*tmp1 = $1;
1310 lgate*tmp2 = $3;
1311 svector<lgate>*out = new svector<lgate> (*tmp1, *tmp2);
1312 delete tmp1;
1313 delete tmp2;
1314 $$ = out;
1316 | gate_instance
1317 { svector<lgate>*tmp = new svector<lgate>(1);
1318 (*tmp)[0] = *$1;
1319 delete $1;
1320 $$ = tmp;
1324 gatetype
1325 : K_and { $$ = PGBuiltin::AND; }
1326 | K_nand { $$ = PGBuiltin::NAND; }
1327 | K_or { $$ = PGBuiltin::OR; }
1328 | K_nor { $$ = PGBuiltin::NOR; }
1329 | K_xor { $$ = PGBuiltin::XOR; }
1330 | K_xnor { $$ = PGBuiltin::XNOR; }
1331 | K_buf { $$ = PGBuiltin::BUF; }
1332 | K_bufif0 { $$ = PGBuiltin::BUFIF0; }
1333 | K_bufif1 { $$ = PGBuiltin::BUFIF1; }
1334 | K_not { $$ = PGBuiltin::NOT; }
1335 | K_notif0 { $$ = PGBuiltin::NOTIF0; }
1336 | K_notif1 { $$ = PGBuiltin::NOTIF1; }
1337 | K_nmos { $$ = PGBuiltin::NMOS; }
1338 | K_rnmos { $$ = PGBuiltin::RNMOS; }
1339 | K_pmos { $$ = PGBuiltin::PMOS; }
1340 | K_rpmos { $$ = PGBuiltin::RPMOS; }
1341 | K_cmos { $$ = PGBuiltin::CMOS; }
1342 | K_rcmos { $$ = PGBuiltin::RCMOS; }
1343 | K_tran { $$ = PGBuiltin::TRAN; }
1344 | K_rtran { $$ = PGBuiltin::RTRAN; }
1345 | K_tranif0 { $$ = PGBuiltin::TRANIF0; }
1346 | K_tranif1 { $$ = PGBuiltin::TRANIF1; }
1347 | K_rtranif0 { $$ = PGBuiltin::RTRANIF0; }
1348 | K_rtranif1 { $$ = PGBuiltin::RTRANIF1; }
1352 /* A general identifier is a hierarchical name, with the right most
1353 name the base of the identifier. This rule builds up a
1354 hierarchical name from the left to the right, forming a list of
1355 names. */
1357 heirarchy_identifier
1358 : IDENTIFIER
1359 { $$ = new pform_name_t;
1360 $$->push_back(name_component_t(lex_strings.make($1)));
1361 delete $1;
1363 | heirarchy_identifier '.' IDENTIFIER
1364 { pform_name_t * tmp = $1;
1365 tmp->push_back(name_component_t(lex_strings.make($3)));
1366 delete $3;
1367 $$ = tmp;
1369 | heirarchy_identifier '[' expression ']'
1370 { pform_name_t * tmp = $1;
1371 name_component_t&tail = tmp->back();
1372 index_component_t itmp;
1373 itmp.sel = index_component_t::SEL_BIT;
1374 itmp.msb = $3;
1375 tail.index.push_back(itmp);
1376 $$ = tmp;
1378 | heirarchy_identifier '[' expression ':' expression ']'
1379 { pform_name_t * tmp = $1;
1380 name_component_t&tail = tmp->back();
1381 index_component_t itmp;
1382 itmp.sel = index_component_t::SEL_PART;
1383 itmp.msb = $3;
1384 itmp.lsb = $5;
1385 tail.index.push_back(itmp);
1386 $$ = tmp;
1388 | heirarchy_identifier '[' expression K_PO_POS expression ']'
1389 { pform_name_t * tmp = $1;
1390 name_component_t&tail = tmp->back();
1391 index_component_t itmp;
1392 itmp.sel = index_component_t::SEL_IDX_UP;
1393 itmp.msb = $3;
1394 itmp.lsb = $5;
1395 tail.index.push_back(itmp);
1396 $$ = tmp;
1398 | heirarchy_identifier '[' expression K_PO_NEG expression ']'
1399 { pform_name_t * tmp = $1;
1400 name_component_t&tail = tmp->back();
1401 index_component_t itmp;
1402 itmp.sel = index_component_t::SEL_IDX_DO;
1403 itmp.msb = $3;
1404 itmp.lsb = $5;
1405 tail.index.push_back(itmp);
1406 $$ = tmp;
1410 /* This is a list of identifiers. The result is a list of strings,
1411 each one of the identifiers in the list. These are simple,
1412 non-hierarchical names separated by ',' characters. */
1413 list_of_identifiers
1414 : IDENTIFIER
1415 { $$ = list_from_identifier($1); }
1416 | list_of_identifiers ',' IDENTIFIER
1417 { $$ = list_from_identifier($1, $3); }
1421 /* The list_of_ports and list_of_port_declarations rules are the
1422 port list formats for module ports. The list_of_ports_opt rule is
1423 only used by the module start rule.
1425 The first, the list_of_ports, is the 1364-1995 format, a list of
1426 port names, including .name() syntax.
1428 The list_of_port_declarations the 1364-2001 format, an in-line
1429 declaration of the ports.
1431 In both cases, the list_of_ports and list_of_port_declarations
1432 returns an array of Module::port_t* items that include the name
1433 of the port internally and externally. The actual creation of the
1434 nets/variables is done in the declaration, whether internal to
1435 the port list or in amongst the module items. */
1437 list_of_ports
1438 : port_opt
1439 { svector<Module::port_t*>*tmp
1440 = new svector<Module::port_t*>(1);
1441 (*tmp)[0] = $1;
1442 $$ = tmp;
1444 | list_of_ports ',' port_opt
1445 { svector<Module::port_t*>*tmp
1446 = new svector<Module::port_t*>(*$1, $3);
1447 delete $1;
1448 $$ = tmp;
1452 list_of_port_declarations
1453 : port_declaration
1454 { svector<Module::port_t*>*tmp
1455 = new svector<Module::port_t*>(1);
1456 (*tmp)[0] = $1;
1458 * Uncommenting this makes lopd always fully specified.
1459 * Some wanted an implicit net to not be fully defined.
1461 * pform_set_net_range($1[0].name);
1463 $$ = tmp;
1465 | list_of_port_declarations ',' port_declaration
1466 { svector<Module::port_t*>*tmp
1467 = new svector<Module::port_t*>(*$1, $3);
1468 delete $1;
1470 * Same as above.
1472 * pform_set_net_range($3[0].name);
1474 $$ = tmp;
1476 | list_of_port_declarations ',' IDENTIFIER
1477 { Module::port_t*ptmp;
1478 ptmp = pform_module_port_reference($3, @3.text,
1479 @3.first_line);
1480 svector<Module::port_t*>*tmp
1481 = new svector<Module::port_t*>(*$1, ptmp);
1483 /* Get the port declaration details, the port type
1484 and what not, from context data stored by the
1485 last port_declaration rule. */
1486 pform_module_define_port(@3, $3,
1487 port_declaration_context.port_type,
1488 port_declaration_context.port_net_type,
1489 port_declaration_context.sign_flag,
1490 port_declaration_context.range, 0);
1491 delete $1;
1493 * Same as above.
1495 * pform_set_net_range($3);
1497 $$ = tmp;
1501 port_declaration
1502 : attribute_list_opt
1503 K_input net_type_opt signed_opt range_opt IDENTIFIER
1504 { Module::port_t*ptmp;
1505 ptmp = pform_module_port_reference($6, @2.text,
1506 @2.first_line);
1507 pform_module_define_port(@2, $6, NetNet::PINPUT,
1508 $3, $4, $5, $1);
1509 port_declaration_context.port_type = NetNet::PINPUT;
1510 port_declaration_context.port_net_type = $3;
1511 port_declaration_context.sign_flag = $4;
1512 port_declaration_context.range = $5;
1513 delete $1;
1514 delete $6;
1515 $$ = ptmp;
1517 | attribute_list_opt
1518 K_inout net_type_opt signed_opt range_opt IDENTIFIER
1519 { Module::port_t*ptmp;
1520 ptmp = pform_module_port_reference($6, @2.text,
1521 @2.first_line);
1522 pform_module_define_port(@2, $6, NetNet::PINOUT,
1523 $3, $4, $5, $1);
1524 port_declaration_context.port_type = NetNet::PINOUT;
1525 port_declaration_context.port_net_type = $3;
1526 port_declaration_context.sign_flag = $4;
1527 port_declaration_context.range = $5;
1528 delete $1;
1529 delete $6;
1530 $$ = ptmp;
1532 | attribute_list_opt
1533 K_output net_type_opt signed_opt range_opt IDENTIFIER
1534 { Module::port_t*ptmp;
1535 ptmp = pform_module_port_reference($6, @2.text,
1536 @2.first_line);
1537 pform_module_define_port(@2, $6, NetNet::POUTPUT,
1538 $3, $4, $5, $1);
1539 port_declaration_context.port_type = NetNet::POUTPUT;
1540 port_declaration_context.port_net_type = $3;
1541 port_declaration_context.sign_flag = $4;
1542 port_declaration_context.range = $5;
1543 delete $1;
1544 delete $6;
1545 $$ = ptmp;
1547 | attribute_list_opt
1548 K_output var_type signed_opt range_opt IDENTIFIER
1549 { Module::port_t*ptmp;
1550 ptmp = pform_module_port_reference($6, @2.text,
1551 @2.first_line);
1552 pform_module_define_port(@2, $6, NetNet::POUTPUT,
1553 $3, $4, $5, $1);
1554 port_declaration_context.port_type = NetNet::POUTPUT;
1555 port_declaration_context.port_net_type = $3;
1556 port_declaration_context.sign_flag = $4;
1557 port_declaration_context.range = $5;
1558 delete $1;
1559 delete $6;
1560 $$ = ptmp;
1562 | attribute_list_opt
1563 K_output var_type signed_opt range_opt IDENTIFIER '=' expression
1564 { Module::port_t*ptmp;
1565 ptmp = pform_module_port_reference($6, @2.text,
1566 @2.first_line);
1567 pform_module_define_port(@2, $6, NetNet::POUTPUT,
1568 $3, $4, $5, $1);
1569 port_declaration_context.port_type = NetNet::POUTPUT;
1570 port_declaration_context.port_net_type = $3;
1571 port_declaration_context.sign_flag = $4;
1572 port_declaration_context.range = $5;
1574 if (! pform_expression_is_constant($8))
1575 yyerror(@8, "error: register declaration assignment"
1576 " value must be a constant expression.");
1577 pform_make_reginit(@6, $6, $8);
1579 delete $1;
1580 delete $6;
1581 $$ = ptmp;
1587 net_type_opt
1588 : net_type { $$ = $1; }
1589 | { $$ = NetNet::IMPLICIT; }
1592 signed_opt : K_signed { $$ = true; } | {$$ = false; } ;
1594 /* An lpvalue is the expression that can go on the left side of a
1595 procedural assignment. This rule handles only procedural
1596 assignments. It is more limited then the general expr_primary
1597 rule to reflect the rules for assignment l-values. */
1598 lpvalue
1599 : heirarchy_identifier
1600 { PEIdent*tmp = new PEIdent(*$1);
1601 tmp->set_file(@1.text);
1602 tmp->set_lineno(@1.first_line);
1603 $$ = tmp;
1604 delete $1;
1606 | '{' expression_list_proper '}'
1607 { PEConcat*tmp = new PEConcat(*$2);
1608 tmp->set_file(@1.text);
1609 tmp->set_lineno(@1.first_line);
1610 delete $2;
1611 $$ = tmp;
1616 /* Continuous assignments have a list of individual assignments. */
1618 cont_assign
1619 : lpvalue '=' expression
1620 { svector<PExpr*>*tmp = new svector<PExpr*>(2);
1621 (*tmp)[0] = $1;
1622 (*tmp)[1] = $3;
1623 $$ = tmp;
1627 cont_assign_list
1628 : cont_assign_list ',' cont_assign
1629 { svector<PExpr*>*tmp = new svector<PExpr*>(*$1, *$3);
1630 delete $1;
1631 delete $3;
1632 $$ = tmp;
1634 | cont_assign
1635 { $$ = $1; }
1639 /* This is the global structure of a module. A module in a start
1640 section, with optional ports, then an optional list of module
1641 items, and finally an end marker. */
1643 module : attribute_list_opt module_start IDENTIFIER
1644 { pform_startmodule($3, @2.text, @2.first_line, $1); }
1645 module_parameter_port_list_opt
1646 module_port_list_opt ';'
1647 { pform_module_set_ports($6); }
1648 module_item_list_opt
1649 K_endmodule
1650 { pform_endmodule($3);
1651 delete $3;
1656 module_start : K_module | K_macromodule ;
1658 module_port_list_opt
1659 : '(' list_of_ports ')' { $$ = $2; }
1660 | '(' list_of_port_declarations ')' { $$ = $2; }
1661 | { $$ = 0; }
1664 /* Module declarations include optional ANSII style module parameter
1665 ports. These are simply advance ways to declare parameters, so
1666 that the port declarations may use them. */
1667 module_parameter_port_list_opt
1669 | '#' '(' module_parameter_port_list ')'
1672 module_parameter_port_list
1673 : K_parameter parameter_assign
1674 | module_parameter_port_list ',' parameter_assign
1675 | module_parameter_port_list ',' K_parameter parameter_assign
1678 module_item
1680 /* This rule detects net declarations that possibly include a
1681 primitive type, an optional vector range and signed flag. This
1682 also includes an optional delay set. The values are then applied
1683 to a list of names. If the primitive type is not specified, then
1684 resort to the default type LOGIC. */
1686 : attribute_list_opt net_type
1687 primitive_type_opt signed_opt range_opt
1688 delay3_opt
1689 net_variable_list ';'
1691 { ivl_variable_type_t dtype = $3;
1692 if (dtype == IVL_VT_NO_TYPE)
1693 dtype = IVL_VT_LOGIC;
1694 pform_makewire(@2, $5, $4, $7, $2,
1695 NetNet::NOT_A_PORT, dtype, $1);
1696 if ($6 != 0) {
1697 yyerror(@6, "sorry: net delays not supported.");
1698 delete $6;
1700 if ($1) delete $1;
1703 /* Very similar to the rule above, but this takes a list of
1704 net_decl_assigns, which are <name> = <expr> assignment
1705 declarations. */
1707 | attribute_list_opt net_type
1708 primitive_type_opt signed_opt range_opt
1709 delay3_opt net_decl_assigns ';'
1711 { ivl_variable_type_t dtype = $3;
1712 if (dtype == IVL_VT_NO_TYPE)
1713 dtype = IVL_VT_LOGIC;
1714 pform_makewire(@2, $5, $4, $6,
1715 str_strength, $7, $2, dtype);
1716 if ($1) {
1717 yyerror(@2, "sorry: Attributes not supported "
1718 "on net declaration assignments.");
1719 delete $1;
1723 /* This form doesn't have the range, but does have strengths. This
1724 gives strength to the assignment drivers. */
1726 | attribute_list_opt net_type
1727 primitive_type_opt signed_opt
1728 drive_strength net_decl_assigns ';'
1730 { ivl_variable_type_t dtype = $3;
1731 if (dtype == IVL_VT_NO_TYPE)
1732 dtype = IVL_VT_LOGIC;
1733 pform_makewire(@2, 0, $4, 0, $5, $6, $2, dtype);
1734 if ($1) {
1735 yyerror(@2, "sorry: Attributes not supported "
1736 "on net declaration assignments.");
1737 delete $1;
1741 | K_trireg charge_strength_opt range_opt delay3_opt list_of_identifiers ';'
1742 { yyerror(@1, "sorry: trireg nets not supported.");
1743 delete $3;
1744 delete $4;
1747 | port_type signed_opt range_opt delay3_opt list_of_identifiers ';'
1748 { pform_set_port_type(@1, $5, $3, $2, $1);
1751 /* The next two rules handle Verilog 2001 statements of the form:
1752 input wire signed [h:l] <list>;
1753 This creates the wire and sets the port type all at once. */
1755 | port_type net_type signed_opt range_opt list_of_identifiers ';'
1756 { pform_makewire(@1, $4, $3, $5, $2, $1, IVL_VT_NO_TYPE, 0,
1757 SR_BOTH);
1760 | K_output var_type signed_opt range_opt list_of_identifiers ';'
1761 { pform_makewire(@1, $4, $3, $5, $2, NetNet::POUTPUT,
1762 IVL_VT_NO_TYPE, 0, SR_BOTH);
1765 /* var_type declaration (reg variables) cannot be input or output,
1766 because the port declaration implies an external driver, which
1767 cannot be attached to a reg. These rules catch that error early. */
1769 | K_input var_type signed_opt range_opt list_of_identifiers ';'
1770 { pform_makewire(@1, $4, $3, $5, $2, NetNet::PINPUT,
1771 IVL_VT_NO_TYPE, 0);
1772 yyerror(@2, "error: reg variables cannot be inputs.");
1775 | K_inout var_type signed_opt range_opt list_of_identifiers ';'
1776 { pform_makewire(@1, $4, $3, $5, $2, NetNet::PINOUT,
1777 IVL_VT_NO_TYPE, 0);
1778 yyerror(@2, "error: reg variables cannot be inouts.");
1781 | port_type signed_opt range_opt delay3_opt error ';'
1782 { yyerror(@1, "error: Invalid variable list"
1783 " in port declaration.");
1784 if ($3) delete $3;
1785 if ($4) delete $4;
1786 yyerrok;
1789 /* block_item_decl rule is shared with task blocks and named
1790 begin/end. */
1792 | block_item_decl
1794 /* */
1796 | K_defparam defparam_assign_list ';'
1797 | K_event list_of_identifiers ';'
1798 { pform_make_events($2, @1.text, @1.first_line);
1801 /* Most gate types have an optional drive strength and optional
1802 three-value delay. These rules handle the different cases. */
1804 | attribute_list_opt gatetype gate_instance_list ';'
1805 { pform_makegates($2, str_strength, 0, $3, $1);
1808 | attribute_list_opt gatetype delay3 gate_instance_list ';'
1809 { pform_makegates($2, str_strength, $3, $4, $1);
1812 | attribute_list_opt gatetype drive_strength gate_instance_list ';'
1813 { pform_makegates($2, $3, 0, $4, $1);
1816 | attribute_list_opt gatetype drive_strength delay3 gate_instance_list ';'
1817 { pform_makegates($2, $3, $4, $5, $1);
1820 /* Pullup and pulldown devices cannot have delays, and their
1821 strengths are limited. */
1823 | K_pullup gate_instance_list ';'
1824 { pform_makegates(PGBuiltin::PULLUP, pull_strength, 0,
1825 $2, 0);
1827 | K_pulldown gate_instance_list ';'
1828 { pform_makegates(PGBuiltin::PULLDOWN, pull_strength,
1829 0, $2, 0);
1832 | K_pullup '(' dr_strength1 ')' gate_instance_list ';'
1833 { pform_makegates(PGBuiltin::PULLUP, $3, 0, $5, 0);
1836 | K_pulldown '(' dr_strength0 ')' gate_instance_list ';'
1837 { pform_makegates(PGBuiltin::PULLDOWN, $3, 0, $5, 0);
1840 /* This rule handles instantiations of modules and user defined
1841 primitives. These devices to not have delay lists or strengths,
1842 but then can have parameter lists. */
1844 | attribute_list_opt
1845 IDENTIFIER parameter_value_opt gate_instance_list ';'
1846 { perm_string tmp1 = lex_strings.make($2);
1847 pform_make_modgates(tmp1, $3, $4);
1848 delete $2;
1849 if ($1) delete $1;
1852 | attribute_list_opt
1853 IDENTIFIER parameter_value_opt error ';'
1854 { yyerror(@2, "error: Invalid module instantiation");
1855 if ($1) delete $1;
1858 /* Continuous assignment can have an optional drive strength, then
1859 an optional delay3 that applies to all the assignments in the
1860 cont_assign_list. */
1862 | K_assign drive_strength_opt delay3_opt cont_assign_list ';'
1863 { pform_make_pgassign_list($4, $3, $2, @1.text, @1.first_line); }
1865 /* Always and initial items are behavioral processes. */
1867 | attribute_list_opt K_always statement
1868 { PProcess*tmp = pform_make_behavior(PProcess::PR_ALWAYS,
1869 $3, $1);
1870 tmp->set_file(@2.text);
1871 tmp->set_lineno(@2.first_line);
1873 | attribute_list_opt K_initial statement
1874 { PProcess*tmp = pform_make_behavior(PProcess::PR_INITIAL,
1875 $3, $1);
1876 tmp->set_file(@2.text);
1877 tmp->set_lineno(@2.first_line);
1880 /* The task declaration rule matches the task declaration
1881 header, then pushes the function scope. This causes the
1882 definitions in the task_body to take on the scope of the task
1883 instead of the module. Note that these runs accept for the task
1884 body statement_or_null, although the standard does not allow null
1885 statements in the task body. But we continue to accept it as an
1886 extension. */
1888 | K_task IDENTIFIER ';'
1889 { pform_push_scope($2); }
1890 task_item_list_opt
1891 statement_or_null
1892 K_endtask
1893 { PTask*tmp = new PTask;
1894 perm_string tmp2 = lex_strings.make($2);
1895 tmp->set_file(@1.text);
1896 tmp->set_lineno(@1.first_line);
1897 tmp->set_ports($5);
1898 tmp->set_statement($6);
1899 pform_set_task(tmp2, tmp);
1900 pform_pop_scope();
1901 delete $2;
1904 | K_task IDENTIFIER
1905 { pform_push_scope($2); }
1906 '(' task_port_decl_list ')' ';'
1907 task_item_list_opt
1908 statement_or_null
1909 K_endtask
1910 { PTask*tmp = new PTask;
1911 perm_string tmp2 = lex_strings.make($2);
1912 tmp->set_file(@1.text);
1913 tmp->set_lineno(@1.first_line);
1914 tmp->set_ports($5);
1915 tmp->set_statement($9);
1916 pform_set_task(tmp2, tmp);
1917 pform_pop_scope();
1918 delete $2;
1921 /* The function declaration rule matches the function declaration
1922 header, then pushes the function scope. This causes the
1923 definitions in the func_body to take on the scope of the function
1924 instead of the module. */
1926 | K_function function_range_or_type_opt IDENTIFIER ';'
1927 { pform_push_scope($3); }
1928 function_item_list statement
1929 K_endfunction
1930 { perm_string name = lex_strings.make($3);
1931 PFunction *tmp = new PFunction(name);
1932 tmp->set_file(@1.text);
1933 tmp->set_lineno(@1.first_line);
1934 tmp->set_ports($6);
1935 tmp->set_statement($7);
1936 tmp->set_return($2);
1937 pform_set_function(name, tmp);
1938 pform_pop_scope();
1939 delete $3;
1942 /* A generate region can contain further module items. Actually, it
1943 is supposed to be limited to certain kinds of module items, but
1944 the semantic tests will check that for us. */
1946 | K_generate module_item_list_opt K_endgenerate
1948 | K_genvar list_of_identifiers ';'
1949 { pform_genvars($2); }
1951 | K_for '(' IDENTIFIER '=' expression ';'
1952 expression ';'
1953 IDENTIFIER '=' expression ')'
1954 { pform_start_generate_for(@1, $3, $5, $7, $9, $11); }
1955 generate_block
1956 { pform_endgenerate(); }
1958 | generate_if
1959 generate_block_opt
1960 K_else
1961 { pform_start_generate_else(@1); }
1962 generate_block
1963 { pform_endgenerate(); }
1965 | generate_if
1966 generate_block_opt %prec less_than_K_else
1967 { pform_endgenerate(); }
1969 /* specify blocks are parsed but ignored. */
1971 | K_specify K_endspecify
1972 { /* empty lists are legal syntax. */ }
1974 | K_specify specify_item_list K_endspecify
1978 | K_specify error K_endspecify
1979 { yyerror(@1, "error: syntax error in specify block");
1980 yyerrok;
1983 /* These rules match various errors that the user can type into
1984 module items. These rules try to catch them at a point where a
1985 reasonable error message can be produced. */
1987 | K_module error ';'
1988 { yyerror(@2, "error: missing endmodule or attempt to "
1989 "nest modules.");
1990 pform_error_nested_modules();
1991 yyerrok;
1994 | error ';'
1995 { yyerror(@2, "error: invalid module item.");
1996 yyerrok;
1999 | K_assign error '=' expression ';'
2000 { yyerror(@1, "error: syntax error in left side "
2001 "of continuous assignment.");
2002 yyerrok;
2005 | K_assign error ';'
2006 { yyerror(@1, "error: syntax error in "
2007 "continuous assignment");
2008 yyerrok;
2011 | K_function error K_endfunction
2012 { yyerror(@1, "error: I give up on this "
2013 "function definition.");
2014 yyerrok;
2017 /* These rules are for the Icarus Verilog specific $attribute
2018 extensions. Then catch the parameters of the $attribute keyword. */
2020 | KK_attribute '(' IDENTIFIER ',' STRING ',' STRING ')' ';'
2021 { perm_string tmp3 = lex_strings.make($3);
2022 perm_string tmp5 = lex_strings.make($5);
2023 pform_set_attrib(tmp3, tmp5, $7);
2024 delete $3;
2025 delete $5;
2027 | KK_attribute '(' error ')' ';'
2028 { yyerror(@1, "error: Malformed $attribute parameter list."); }
2031 generate_if : K_if '(' expression ')' { pform_start_generate_if(@1, $3); }
2033 module_item_list
2034 : module_item_list module_item
2035 | module_item
2038 module_item_list_opt
2039 : module_item_list
2043 /* A generate block is the thing within a generate scheme. It may be
2044 a single module item, an anonymous block of module items, or a
2045 named module item. In all cases, the meat is in the module items
2046 inside, and the processing is done by the module_item rules. We
2047 only need to take note here of the scope name, if any. */
2049 generate_block
2050 : module_item
2051 | K_begin module_item_list_opt K_end
2052 | K_begin ':' IDENTIFIER module_item_list_opt K_end
2053 { pform_generate_block_name($3); }
2056 generate_block_opt : generate_block | ';' ;
2059 /* A net declaration assignment allows the programmer to combine the
2060 net declaration and the continuous assignment into a single
2061 statement.
2063 Note that the continuous assignment statement is generated as a
2064 side effect, and all I pass up is the name of the l-value. */
2066 net_decl_assign
2067 : IDENTIFIER '=' expression
2068 { net_decl_assign_t*tmp = new net_decl_assign_t;
2069 tmp->next = tmp;
2070 tmp->name = $1;
2071 tmp->expr = $3;
2072 $$ = tmp;
2076 net_decl_assigns
2077 : net_decl_assigns ',' net_decl_assign
2078 { net_decl_assign_t*tmp = $1;
2079 $3->next = tmp->next;
2080 tmp->next = $3;
2081 $$ = tmp;
2083 | net_decl_assign
2084 { $$ = $1;
2088 primitive_type
2089 : K_logic { $$ = IVL_VT_LOGIC; }
2090 | K_bool { $$ = IVL_VT_BOOL; }
2091 | K_real { $$ = IVL_VT_REAL; }
2094 primitive_type_opt : primitive_type { $$ = $1; } | { $$ = IVL_VT_NO_TYPE; } ;
2096 net_type
2097 : K_wire { $$ = NetNet::WIRE; }
2098 | K_tri { $$ = NetNet::TRI; }
2099 | K_tri1 { $$ = NetNet::TRI1; }
2100 | K_supply0 { $$ = NetNet::SUPPLY0; }
2101 | K_wand { $$ = NetNet::WAND; }
2102 | K_triand { $$ = NetNet::TRIAND; }
2103 | K_tri0 { $$ = NetNet::TRI0; }
2104 | K_supply1 { $$ = NetNet::SUPPLY1; }
2105 | K_wor { $$ = NetNet::WOR; }
2106 | K_trior { $$ = NetNet::TRIOR; }
2107 | K_wone { $$ = NetNet::WONE; }
2110 var_type
2111 : K_reg { $$ = NetNet::REG; }
2114 /* In this rule we have matched the "parameter" keyword. The rule
2115 generates a type (optional) and a list of assignments. */
2117 parameter_assign_decl
2118 : parameter_assign_list
2119 | range { active_range = $1; active_signed = false; }
2120 parameter_assign_list
2121 { active_range = 0;
2122 active_signed = false;
2124 | K_signed range { active_range = $2; active_signed = true; }
2125 parameter_assign_list
2126 { active_range = 0;
2127 active_signed = false;
2129 | K_integer { active_range = 0; active_signed = true; }
2130 parameter_assign_list
2131 { active_range = 0;
2132 active_signed = false;
2136 parameter_assign_list
2137 : parameter_assign
2138 | parameter_assign_list ',' parameter_assign
2141 parameter_assign
2142 : IDENTIFIER '=' expression
2143 { PExpr*tmp = $3;
2144 if (!pform_expression_is_constant(tmp)) {
2145 yyerror(@3, "error: parameter value "
2146 "must be a constant expression.");
2147 delete tmp;
2148 tmp = 0;
2149 } else {
2150 pform_set_parameter(lex_strings.make($1),
2151 active_signed,
2152 active_range, tmp);
2154 delete $1;
2158 /* Localparam assignments and assignment lists are broken into
2159 separate BNF so that I can call slightly different parameter
2160 handling code. They parse the same as parameters, they just
2161 behave differently when someone tries to override them. */
2163 localparam_assign
2164 : IDENTIFIER '=' expression
2165 { PExpr*tmp = $3;
2166 if (!pform_expression_is_constant(tmp)) {
2167 yyerror(@3, "error: parameter value "
2168 "must be constant.");
2169 delete tmp;
2170 tmp = 0;
2171 } else {
2172 pform_set_localparam(lex_strings.make($1),
2173 active_signed,
2174 active_range, tmp);
2176 delete $1;
2180 localparam_assign_decl
2181 : localparam_assign_list
2182 | range { active_range = $1; active_signed = false; }
2183 localparam_assign_list
2184 { active_range = 0;
2185 active_signed = false;
2187 | K_signed range { active_range = $2; active_signed = true; }
2188 localparam_assign_list
2189 { active_range = 0;
2190 active_signed = false;
2194 localparam_assign_list
2195 : localparam_assign
2196 | localparam_assign_list ',' localparam_assign
2201 /* The parameters of a module instance can be overridden by writing
2202 a list of expressions in a syntax much like a delay list. (The
2203 difference being the list can have any length.) The pform that
2204 attaches the expression list to the module checks that the
2205 expressions are constant.
2207 Although the BNF in IEEE1364-1995 implies that parameter value
2208 lists must be in parentheses, in practice most compilers will
2209 accept simple expressions outside of parentheses if there is only
2210 one value, so I'll accept simple numbers here.
2212 The parameter value by name syntax is OVI enhancement BTF-B06 as
2213 approved by WG1364 on 6/28/1998. */
2215 parameter_value_opt
2216 : '#' '(' expression_list_with_nuls ')'
2217 { struct parmvalue_t*tmp = new struct parmvalue_t;
2218 tmp->by_order = $3;
2219 tmp->by_name = 0;
2220 $$ = tmp;
2222 | '#' '(' parameter_value_byname_list ')'
2223 { struct parmvalue_t*tmp = new struct parmvalue_t;
2224 tmp->by_order = 0;
2225 tmp->by_name = $3;
2226 $$ = tmp;
2228 | '#' DEC_NUMBER
2229 { assert($2);
2230 PENumber*tmp = new PENumber($2);
2231 tmp->set_file(@1.text);
2232 tmp->set_lineno(@1.first_line);
2234 struct parmvalue_t*lst = new struct parmvalue_t;
2235 lst->by_order = new svector<PExpr*>(1);
2236 (*lst->by_order)[0] = tmp;
2237 lst->by_name = 0;
2238 $$ = lst;
2240 | '#' error
2241 { yyerror(@1, "error: syntax error in parameter value "
2242 "assignment list.");
2243 $$ = 0;
2246 { $$ = 0; }
2249 parameter_value_byname
2250 : '.' IDENTIFIER '(' expression ')'
2251 { named_pexpr_t*tmp = new named_pexpr_t;
2252 tmp->name = lex_strings.make($2);
2253 tmp->parm = $4;
2254 free($2);
2255 $$ = tmp;
2257 | '.' IDENTIFIER '(' ')'
2258 { named_pexpr_t*tmp = new named_pexpr_t;
2259 tmp->name = lex_strings.make($2);
2260 tmp->parm = 0;
2261 free($2);
2262 $$ = tmp;
2266 parameter_value_byname_list
2267 : parameter_value_byname
2268 { svector<named_pexpr_t*>*tmp = new svector<named_pexpr_t*>(1);
2269 (*tmp)[0] = $1;
2270 $$ = tmp;
2272 | parameter_value_byname_list ',' parameter_value_byname
2273 { svector<named_pexpr_t*>*tmp =
2274 new svector<named_pexpr_t*>(*$1,$3);
2275 delete $1;
2276 $$ = tmp;
2281 /* The port (of a module) is a fairly complex item. Each port is
2282 handled as a Module::port_t object. A simple port reference has a
2283 name and a PExpr object, but more complex constructs are possible
2284 where the name can be attached to a list of PWire objects.
2286 The port_reference returns a Module::port_t, and so does the
2287 port_reference_list. The port_reference_list may have built up a
2288 list of PWires in the port_t object, but it is still a single
2289 Module::port_t object.
2291 The port rule below takes the built up Module::port_t object and
2292 tweaks its name as needed. */
2294 port
2295 : port_reference
2296 { $$ = $1; }
2298 /* This syntax attaches an external name to the port reference so
2299 that the caller can bind by name to non-trivial port
2300 references. The port_t object gets its PWire from the
2301 port_reference, but its name from the IDENTIFIER. */
2303 | '.' IDENTIFIER '(' port_reference ')'
2304 { Module::port_t*tmp = $4;
2305 tmp->name = lex_strings.make($2);
2306 delete $2;
2307 $$ = tmp;
2310 /* A port can also be a concatenation of port references. In this
2311 case the port does not have a name available to the outside, only
2312 positional parameter passing is possible here. */
2314 | '{' port_reference_list '}'
2315 { Module::port_t*tmp = $2;
2316 tmp->name = perm_string();
2317 $$ = tmp;
2320 /* This attaches a name to a port reference concatenation list so
2321 that parameter passing be name is possible. */
2323 | '.' IDENTIFIER '(' '{' port_reference_list '}' ')'
2324 { Module::port_t*tmp = $5;
2325 tmp->name = lex_strings.make($2);
2326 delete $2;
2327 $$ = tmp;
2331 port_opt
2332 : port { $$ = $1; }
2333 | { $$ = 0; }
2337 /* A port reference is an internal (to the module) name of the port,
2338 possibly with a part of bit select to attach it to specific bits
2339 of a signal fully declared inside the module.
2341 The parser creates a PEIdent for every port reference, even if the
2342 signal is bound to different ports. The elaboration figures out
2343 the mess that this creates. The port_reference (and the
2344 port_reference_list below) puts the port reference PEIdent into the
2345 port_t object to pass it up to the module declaration code. */
2347 port_reference
2349 : IDENTIFIER
2350 { Module::port_t*ptmp;
2351 ptmp = pform_module_port_reference($1, @1.text, @1.first_line);
2352 delete $1;
2353 $$ = ptmp;
2356 | IDENTIFIER '[' expression ':' expression ']'
2357 { if (!pform_expression_is_constant($3)) {
2358 yyerror(@3, "error: msb expression of "
2359 "port part select must be constant.");
2361 if (!pform_expression_is_constant($5)) {
2362 yyerror(@5, "error: lsb expression of "
2363 "port part select must be constant.");
2365 index_component_t itmp;
2366 itmp.sel = index_component_t::SEL_PART;
2367 itmp.msb = $3;
2368 itmp.lsb = $5;
2370 name_component_t ntmp (lex_strings.make($1));
2371 ntmp.index.push_back(itmp);
2373 pform_name_t pname;
2374 pname.push_back(ntmp);
2376 PEIdent*wtmp = new PEIdent(pname);
2377 wtmp->set_file(@1.text);
2378 wtmp->set_lineno(@1.first_line);
2380 Module::port_t*ptmp = new Module::port_t;
2381 ptmp->name = perm_string();
2382 ptmp->expr = svector<PEIdent*>(1);
2383 ptmp->expr[0] = wtmp;
2385 delete $1;
2386 $$ = ptmp;
2389 | IDENTIFIER '[' expression ']'
2390 { if (!pform_expression_is_constant($3)) {
2391 yyerror(@3, "error: port bit select "
2392 "must be constant.");
2394 index_component_t itmp;
2395 itmp.sel = index_component_t::SEL_BIT;
2396 itmp.msb = $3;
2397 itmp.lsb = 0;
2399 name_component_t ntmp (lex_strings.make($1));
2400 ntmp.index.push_back(itmp);
2402 pform_name_t pname;
2403 pname.push_back(ntmp);
2405 PEIdent*tmp = new PEIdent(pname);
2406 tmp->set_file(@1.text);
2407 tmp->set_lineno(@1.first_line);
2409 Module::port_t*ptmp = new Module::port_t;
2410 ptmp->name = perm_string();
2411 ptmp->expr = svector<PEIdent*>(1);
2412 ptmp->expr[0] = tmp;
2413 delete $1;
2414 $$ = ptmp;
2417 | IDENTIFIER '[' error ']'
2418 { yyerror(@1, "error: invalid port bit select");
2419 Module::port_t*ptmp = new Module::port_t;
2420 PEIdent*wtmp = new PEIdent(lex_strings.make($1));
2421 wtmp->set_file(@1.text);
2422 wtmp->set_lineno(@1.first_line);
2423 ptmp->name = lex_strings.make($1);
2424 ptmp->expr = svector<PEIdent*>(1);
2425 ptmp->expr[0] = wtmp;
2426 delete $1;
2427 $$ = ptmp;
2432 port_reference_list
2433 : port_reference
2434 { $$ = $1; }
2435 | port_reference_list ',' port_reference
2436 { Module::port_t*tmp = $1;
2437 tmp->expr = svector<PEIdent*>(tmp->expr, $3->expr);
2438 delete $3;
2439 $$ = tmp;
2443 /* The port_name rule is used with a module is being *instantiated*,
2444 and not when it is being declared. See the port rule if you are
2445 looking for the ports of a module declaration. */
2447 port_name
2448 : '.' IDENTIFIER '(' expression ')'
2449 { named_pexpr_t*tmp = new named_pexpr_t;
2450 tmp->name = lex_strings.make($2);
2451 tmp->parm = $4;
2452 delete $2;
2453 $$ = tmp;
2455 | '.' IDENTIFIER '(' error ')'
2456 { yyerror(@4, "error: invalid port connection expression.");
2457 named_pexpr_t*tmp = new named_pexpr_t;
2458 tmp->name = lex_strings.make($2);
2459 tmp->parm = 0;
2460 delete $2;
2461 $$ = tmp;
2463 | '.' IDENTIFIER '(' ')'
2464 { named_pexpr_t*tmp = new named_pexpr_t;
2465 tmp->name = lex_strings.make($2);
2466 tmp->parm = 0;
2467 delete $2;
2468 $$ = tmp;
2472 port_name_list
2473 : port_name_list ',' port_name
2474 { svector<named_pexpr_t*>*tmp;
2475 tmp = new svector<named_pexpr_t*>(*$1, $3);
2476 delete $1;
2477 $$ = tmp;
2479 | port_name
2480 { svector<named_pexpr_t*>*tmp = new svector<named_pexpr_t*>(1);
2481 (*tmp)[0] = $1;
2482 $$ = tmp;
2486 port_type
2487 : K_input { $$ = NetNet::PINPUT; }
2488 | K_output { $$ = NetNet::POUTPUT; }
2489 | K_inout { $$ = NetNet::PINOUT; }
2492 range
2493 : '[' expression ':' expression ']'
2494 { svector<PExpr*>*tmp = new svector<PExpr*> (2);
2495 if (!pform_expression_is_constant($2))
2496 yyerror(@2, "error: msb of range must be constant.");
2498 (*tmp)[0] = $2;
2500 if (!pform_expression_is_constant($4))
2501 yyerror(@4, "error: lsb of range must be constant.");
2503 (*tmp)[1] = $4;
2505 $$ = tmp;
2509 range_opt
2510 : range
2511 | { $$ = 0; }
2513 dimensions_opt
2514 : { $$ = 0; }
2515 | dimensions { $$ = $1; }
2517 dimensions
2518 : '[' expression ':' expression ']'
2519 { list<index_component_t> *tmp = new list<index_component_t>;
2520 index_component_t index;
2521 if (!pform_expression_is_constant($2))
2522 yyerror(@2, "error: left array address must be "
2523 "constant.");
2524 index.msb = $2;
2525 if (!pform_expression_is_constant($4))
2526 yyerror(@4, "error: right array address must be "
2527 "constant.");
2528 index.lsb = $4;
2529 tmp->push_back(index);
2530 $$ = tmp;
2532 | dimensions '[' expression ':' expression ']'
2533 { list<index_component_t> *tmp = $1;
2534 index_component_t index;
2535 if (!pform_expression_is_constant($3))
2536 yyerror(@3, "error: left array address must be "
2537 "constant.");
2538 index.msb = $3;
2539 if (!pform_expression_is_constant($5))
2540 yyerror(@5, "error: right array address must be "
2541 "constant.");
2542 index.lsb = $5;
2543 tmp->push_back(index);
2544 $$ = tmp;
2547 /* This is used to express the return type of a function. */
2548 function_range_or_type_opt
2549 : range { $$.range = $1; $$.type = PTF_REG; }
2550 | K_signed range { $$.range = $2; $$.type = PTF_REG_S; }
2551 | K_integer { $$.range = 0; $$.type = PTF_INTEGER; }
2552 | K_real { $$.range = 0; $$.type = PTF_REAL; }
2553 | K_realtime { $$.range = 0; $$.type = PTF_REALTIME; }
2554 | K_time { $$.range = 0; $$.type = PTF_TIME; }
2555 | { $$.range = 0; $$.type = PTF_REG; }
2558 /* The register_variable rule is matched only when I am parsing
2559 variables in a "reg" definition. I therefore know that I am
2560 creating registers and I do not need to let the containing rule
2561 handle it. The register variable list simply packs them together
2562 so that bit ranges can be assigned. */
2563 register_variable
2564 : IDENTIFIER dimensions_opt
2565 { pform_makewire(@1, $1, NetNet::REG,
2566 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
2567 if ($2 != 0) {
2568 index_component_t index;
2569 if ($2->size() > 1) {
2570 yyerror(@2, "sorry: only 1 dimensional arrays "
2571 "are currently supported.");
2573 index = $2->front();
2574 pform_set_reg_idx($1, index.msb, index.lsb);
2575 delete $2;
2577 $$ = $1;
2579 | IDENTIFIER '=' expression
2580 { pform_makewire(@1, $1, NetNet::REG,
2581 NetNet::NOT_A_PORT,
2582 IVL_VT_NO_TYPE, 0);
2583 if (! pform_expression_is_constant($3))
2584 yyerror(@3, "error: register declaration assignment"
2585 " value must be a constant expression.");
2586 pform_make_reginit(@1, $1, $3);
2587 $$ = $1;
2591 register_variable_list
2592 : register_variable
2593 { list<perm_string>*tmp = new list<perm_string>;
2594 tmp->push_back(lex_strings.make($1));
2595 $$ = tmp;
2596 delete[]$1;
2598 | register_variable_list ',' register_variable
2599 { list<perm_string>*tmp = $1;
2600 tmp->push_back(lex_strings.make($3));
2601 $$ = tmp;
2602 delete[]$3;
2606 real_variable
2607 : IDENTIFIER dimensions_opt
2608 { pform_makewire(@1, $1, NetNet::REG, NetNet::NOT_A_PORT, IVL_VT_REAL, 0);
2609 if ($2 != 0) {
2610 yyerror(@2, "sorry: real variables do not currently support arrays.");
2611 delete $2;
2613 $$ = $1;
2615 | IDENTIFIER '=' expression
2616 { pform_makewire(@1, $1, NetNet::REG, NetNet::NOT_A_PORT, IVL_VT_REAL, 0);
2617 pform_make_reginit(@1, $1, $3);
2618 $$ = $1;
2622 real_variable_list
2623 : real_variable
2624 { list<perm_string>*tmp = new list<perm_string>;
2625 tmp->push_back(lex_strings.make($1));
2626 $$ = tmp;
2627 delete[]$1;
2629 | real_variable_list ',' real_variable
2630 { list<perm_string>*tmp = $1;
2631 tmp->push_back(lex_strings.make($3));
2632 $$ = tmp;
2633 delete[]$3;
2637 net_variable
2638 : IDENTIFIER dimensions_opt
2639 { pform_makewire(@1, $1, NetNet::IMPLICIT,
2640 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
2641 if ($2 != 0) {
2642 index_component_t index;
2643 if ($2->size() > 1) {
2644 yyerror(@2, "sorry: only 1 dimensional arrays "
2645 "are currently supported.");
2647 index = $2->front();
2648 pform_set_reg_idx($1, index.msb, index.lsb);
2649 delete $2;
2651 $$ = $1;
2654 net_variable_list
2655 : net_variable
2656 { list<perm_string>*tmp = new list<perm_string>;
2657 tmp->push_back(lex_strings.make($1));
2658 $$ = tmp;
2659 delete[]$1;
2661 | net_variable_list ',' net_variable
2662 { list<perm_string>*tmp = $1;
2663 tmp->push_back(lex_strings.make($3));
2664 $$ = tmp;
2665 delete[]$3;
2669 specify_item
2670 : K_specparam specparam_list ';'
2671 | specify_simple_path_decl ';'
2672 { pform_module_specify_path($1);
2674 | specify_edge_path_decl ';'
2675 { pform_module_specify_path($1);
2677 | K_if '(' expression ')' specify_simple_path_decl ';'
2678 { PSpecPath*tmp = $5;
2679 if (tmp) {
2680 tmp->conditional = true;
2681 tmp->condition = $3;
2683 pform_module_specify_path(tmp);
2685 | K_if '(' expression ')' specify_edge_path_decl ';'
2686 { PSpecPath*tmp = $5;
2687 if (tmp) {
2688 tmp->conditional = true;
2689 tmp->condition = $3;
2691 pform_module_specify_path(tmp);
2693 | K_ifnone specify_simple_path_decl ';'
2694 { PSpecPath*tmp = $2;
2695 if (tmp) {
2696 tmp->conditional = true;
2697 tmp->condition = 0;
2699 pform_module_specify_path(tmp);
2701 | K_Shold '(' spec_reference_event ',' spec_reference_event
2702 ',' delay_value spec_notifier_opt ')' ';'
2703 { delete $7;
2705 | K_Speriod '(' spec_reference_event ',' delay_value
2706 spec_notifier_opt ')' ';'
2707 { delete $5;
2709 | K_Srecovery '(' spec_reference_event ',' spec_reference_event
2710 ',' delay_value spec_notifier_opt ')' ';'
2711 { delete $7;
2713 | K_Ssetup '(' spec_reference_event ',' spec_reference_event
2714 ',' delay_value spec_notifier_opt ')' ';'
2715 { delete $7;
2717 | K_Ssetuphold '(' spec_reference_event ',' spec_reference_event
2718 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
2719 { delete $7;
2720 delete $9;
2722 | K_Srecrem '(' spec_reference_event ',' spec_reference_event
2723 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
2724 { delete $7;
2725 delete $9;
2727 | K_Swidth '(' spec_reference_event ',' delay_value ',' expression
2728 spec_notifier_opt ')' ';'
2729 { delete $5;
2730 delete $7;
2732 | K_Swidth '(' spec_reference_event ',' delay_value ')' ';'
2733 { delete $5;
2737 specify_item_list
2738 : specify_item
2739 | specify_item_list specify_item
2742 specify_edge_path_decl
2743 : specify_edge_path '=' '(' delay_value_list ')'
2744 { $$ = pform_assign_path_delay($1, $4); }
2745 | specify_edge_path '=' delay_value_simple
2746 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
2747 (*tmp)[0] = $3;
2748 $$ = pform_assign_path_delay($1, tmp);
2752 edge_operator : K_posedge { $$ = true; } | K_negedge { $$ = false; } ;
2754 specify_edge_path
2755 : '(' specify_path_identifiers spec_polarity
2756 K_EG '(' specify_path_identifiers polarity_operator expression ')' ')'
2757 { int edge_flag = 0;
2758 $$ = pform_make_specify_edge_path(@1, edge_flag, $2, $3, false, $6, $8); }
2759 | '(' edge_operator specify_path_identifiers spec_polarity
2760 K_EG '(' specify_path_identifiers polarity_operator expression ')' ')'
2761 { int edge_flag = $2? 1 : -1;
2762 $$ = pform_make_specify_edge_path(@1, edge_flag, $3, $4, false, $7, $9);}
2763 | '(' specify_path_identifiers spec_polarity
2764 K_SG '(' specify_path_identifiers polarity_operator expression ')' ')'
2765 { int edge_flag = 0;
2766 $$ = pform_make_specify_edge_path(@1, edge_flag, $2, $3, true, $6, $8); }
2767 | '(' edge_operator specify_path_identifiers spec_polarity
2768 K_SG '(' specify_path_identifiers polarity_operator expression ')' ')'
2769 { int edge_flag = $2? 1 : -1;
2770 $$ = pform_make_specify_edge_path(@1, edge_flag, $3, $4, true, $7, $9); }
2773 polarity_operator
2774 : K_PO_POS
2775 | K_PO_NEG
2776 | ':'
2779 specify_simple_path_decl
2780 : specify_simple_path '=' '(' delay_value_list ')'
2781 { $$ = pform_assign_path_delay($1, $4); }
2782 | specify_simple_path '=' delay_value_simple
2783 { svector<PExpr*>*tmp = new svector<PExpr*>(1);
2784 (*tmp)[0] = $3;
2785 $$ = pform_assign_path_delay($1, tmp);
2787 | specify_simple_path '=' '(' error ')'
2788 { yyerror(@2, "Syntax error in delay value list.");
2789 yyerrok;
2790 $$ = 0;
2794 specify_simple_path
2795 : '(' specify_path_identifiers spec_polarity
2796 K_EG specify_path_identifiers ')'
2797 { $$ = pform_make_specify_path(@1, $2, $3, false, $5); }
2798 | '(' specify_path_identifiers spec_polarity
2799 K_SG specify_path_identifiers ')'
2800 { $$ = pform_make_specify_path(@1, $2, $3, true, $5); }
2801 | '(' error ')'
2802 { yyerror(@2, "Invalid simple path");
2803 yyerrok;
2807 specify_path_identifiers
2808 : IDENTIFIER
2809 { list<perm_string>*tmp = new list<perm_string>;
2810 tmp->push_back(lex_strings.make($1));
2811 $$ = tmp;
2812 delete[]$1;
2814 | IDENTIFIER '[' expr_primary ']'
2815 { list<perm_string>*tmp = new list<perm_string>;
2816 tmp->push_back(lex_strings.make($1));
2817 $$ = tmp;
2818 delete[]$1;
2820 | specify_path_identifiers ',' IDENTIFIER
2821 { list<perm_string>*tmp = $1;
2822 tmp->push_back(lex_strings.make($3));
2823 $$ = tmp;
2824 delete[]$3;
2826 | specify_path_identifiers ',' IDENTIFIER '[' expr_primary ']'
2827 { list<perm_string>*tmp = $1;
2828 tmp->push_back(lex_strings.make($3));
2829 $$ = tmp;
2830 delete[]$3;
2834 specparam
2835 : IDENTIFIER '=' expression
2836 { PExpr*tmp = $3;
2837 pform_set_specparam(lex_strings.make($1), tmp);
2838 delete $1;
2840 | IDENTIFIER '=' expression ':' expression ':' expression
2841 { PExpr*tmp = 0;
2842 switch (min_typ_max_flag) {
2843 case MIN:
2844 tmp = $3;
2845 delete $5;
2846 delete $7;
2847 break;
2848 case TYP:
2849 delete $3;
2850 tmp = $5;
2851 delete $7;
2852 break;
2853 case MAX:
2854 delete $3;
2855 delete $5;
2856 tmp = $7;
2857 break;
2859 if (min_typ_max_warn > 0) {
2860 cerr << tmp->get_line() << ": warning: choosing ";
2861 switch (min_typ_max_flag) {
2862 case MIN:
2863 cerr << "min";
2864 break;
2865 case TYP:
2866 cerr << "typ";
2867 break;
2868 case MAX:
2869 cerr << "max";
2870 break;
2872 cerr << " expression." << endl;
2873 min_typ_max_warn -= 1;
2875 pform_set_specparam(lex_strings.make($1), tmp);
2876 delete $1;
2878 | PATHPULSE_IDENTIFIER '=' expression
2879 { delete $1;
2880 delete $3;
2882 | PATHPULSE_IDENTIFIER '=' '(' expression ',' expression ')'
2883 { delete $1;
2884 delete $4;
2885 delete $6;
2889 specparam_list
2890 : specparam
2891 | specparam_list ',' specparam
2894 spec_polarity
2895 : '+' { $$ = '+'; }
2896 | '-' { $$ = '-'; }
2897 | { $$ = 0; }
2900 spec_reference_event
2901 : K_posedge expression
2902 { delete $2; }
2903 | K_negedge expression
2904 { delete $2; }
2905 | K_posedge expr_primary K_TAND expression
2906 { delete $2;
2907 delete $4;
2909 | K_negedge expr_primary K_TAND expression
2910 { delete $2;
2911 delete $4;
2913 | K_edge '[' edge_descriptor_list ']' expr_primary K_TAND expression
2914 { delete $5;
2915 delete $7;
2917 | expr_primary K_TAND expression
2918 { delete $1;
2919 delete $3;
2921 | expr_primary
2922 { delete $1; }
2925 /* The edge_descriptor is detected by the lexor as the various
2926 2-letter edge sequences that are supported here. For now, we
2927 don't care what they are, because we do not yet support specify
2928 edge events. */
2929 edge_descriptor_list
2930 : edge_descriptor_list ',' K_edge_descriptor
2931 | K_edge_descriptor
2934 spec_notifier_opt
2935 : /* empty */
2937 | spec_notifier
2940 spec_notifier
2941 : ','
2943 | ',' heirarchy_identifier
2944 { delete $2; }
2945 | spec_notifier ','
2947 | spec_notifier ',' heirarchy_identifier
2948 { delete $3; }
2949 | IDENTIFIER
2950 { delete $1; }
2954 statement
2956 /* assign and deassign statements are procedural code to do
2957 structural assignments, and to turn that structural assignment
2958 off. This stronger then any other assign, but weaker then the
2959 force assignments. */
2961 : K_assign lpvalue '=' expression ';'
2962 { PCAssign*tmp = new PCAssign($2, $4);
2963 tmp->set_file(@1.text);
2964 tmp->set_lineno(@1.first_line);
2965 $$ = tmp;
2968 | K_deassign lpvalue ';'
2969 { PDeassign*tmp = new PDeassign($2);
2970 tmp->set_file(@1.text);
2971 tmp->set_lineno(@1.first_line);
2972 $$ = tmp;
2976 /* Force and release statements are similar to assignments,
2977 syntactically, but they will be elaborated differently. */
2979 | K_force lpvalue '=' expression ';'
2980 { PForce*tmp = new PForce($2, $4);
2981 tmp->set_file(@1.text);
2982 tmp->set_lineno(@1.first_line);
2983 $$ = tmp;
2985 | K_release lpvalue ';'
2986 { PRelease*tmp = new PRelease($2);
2987 tmp->set_file(@1.text);
2988 tmp->set_lineno(@1.first_line);
2989 $$ = tmp;
2992 /* begin-end blocks come in a variety of forms, including named and
2993 anonymous. The named blocks can also carry their own reg
2994 variables, which are placed in the scope created by the block
2995 name. These are handled by pushing the scope name then matching
2996 the declarations. The scope is popped at the end of the block. */
2998 | K_begin statement_list K_end
2999 { PBlock*tmp = new PBlock(PBlock::BL_SEQ, *$2);
3000 tmp->set_file(@1.text);
3001 tmp->set_lineno(@1.first_line);
3002 delete $2;
3003 $$ = tmp;
3005 | K_begin ':' IDENTIFIER
3006 { pform_push_scope($3); }
3007 block_item_decls_opt
3008 statement_list K_end
3009 { pform_pop_scope();
3010 PBlock*tmp = new PBlock(lex_strings.make($3),
3011 PBlock::BL_SEQ, *$6);
3012 tmp->set_file(@1.text);
3013 tmp->set_lineno(@1.first_line);
3014 delete $3;
3015 delete $6;
3016 $$ = tmp;
3018 | K_begin K_end
3019 { PBlock*tmp = new PBlock(PBlock::BL_SEQ);
3020 tmp->set_file(@1.text);
3021 tmp->set_lineno(@1.first_line);
3022 $$ = tmp;
3024 | K_begin ':' IDENTIFIER K_end
3025 { PBlock*tmp = new PBlock(PBlock::BL_SEQ);
3026 tmp->set_file(@1.text);
3027 tmp->set_lineno(@1.first_line);
3028 $$ = tmp;
3030 | K_begin error K_end
3031 { yyerrok; }
3033 /* fork-join blocks are very similar to begin-end blocks. In fact,
3034 from the parser's perspective there is no real difference. All we
3035 need to do is remember that this is a parallel block so that the
3036 code generator can do the right thing. */
3038 | K_fork ':' IDENTIFIER
3039 { pform_push_scope($3); }
3040 block_item_decls_opt
3041 statement_list K_join
3042 { pform_pop_scope();
3043 PBlock*tmp = new PBlock(lex_strings.make($3),
3044 PBlock::BL_PAR, *$6);
3045 tmp->set_file(@1.text);
3046 tmp->set_lineno(@1.first_line);
3047 delete $3;
3048 delete $6;
3049 $$ = tmp;
3051 | K_fork K_join
3052 { PBlock*tmp = new PBlock(PBlock::BL_PAR);
3053 tmp->set_file(@1.text);
3054 tmp->set_lineno(@1.first_line);
3055 $$ = tmp;
3057 | K_fork ':' IDENTIFIER K_join
3058 { PBlock*tmp = new PBlock(PBlock::BL_PAR);
3059 tmp->set_file(@1.text);
3060 tmp->set_lineno(@1.first_line);
3061 delete $3;
3062 $$ = tmp;
3065 | K_disable heirarchy_identifier ';'
3066 { PDisable*tmp = new PDisable(*$2);
3067 tmp->set_file(@1.text);
3068 tmp->set_lineno(@1.first_line);
3069 delete $2;
3070 $$ = tmp;
3072 | K_TRIGGER heirarchy_identifier ';'
3073 { PTrigger*tmp = new PTrigger(*$2);
3074 tmp->set_file(@2.text);
3075 tmp->set_lineno(@2.first_line);
3076 delete $2;
3077 $$ = tmp;
3079 | K_forever statement
3080 { PForever*tmp = new PForever($2);
3081 tmp->set_file(@1.text);
3082 tmp->set_lineno(@1.first_line);
3083 $$ = tmp;
3085 | K_fork statement_list K_join
3086 { PBlock*tmp = new PBlock(PBlock::BL_PAR, *$2);
3087 tmp->set_file(@1.text);
3088 tmp->set_lineno(@1.first_line);
3089 delete $2;
3090 $$ = tmp;
3092 | K_repeat '(' expression ')' statement
3093 { PRepeat*tmp = new PRepeat($3, $5);
3094 tmp->set_file(@1.text);
3095 tmp->set_lineno(@1.first_line);
3096 $$ = tmp;
3098 | K_case '(' expression ')' case_items K_endcase
3099 { PCase*tmp = new PCase(NetCase::EQ, $3, $5);
3100 tmp->set_file(@1.text);
3101 tmp->set_lineno(@1.first_line);
3102 $$ = tmp;
3104 | K_casex '(' expression ')' case_items K_endcase
3105 { PCase*tmp = new PCase(NetCase::EQX, $3, $5);
3106 tmp->set_file(@1.text);
3107 tmp->set_lineno(@1.first_line);
3108 $$ = tmp;
3110 | K_casez '(' expression ')' case_items K_endcase
3111 { PCase*tmp = new PCase(NetCase::EQZ, $3, $5);
3112 tmp->set_file(@1.text);
3113 tmp->set_lineno(@1.first_line);
3114 $$ = tmp;
3116 | K_case '(' expression ')' error K_endcase
3117 { yyerrok; }
3118 | K_casex '(' expression ')' error K_endcase
3119 { yyerrok; }
3120 | K_casez '(' expression ')' error K_endcase
3121 { yyerrok; }
3122 | K_if '(' expression ')' statement_or_null %prec less_than_K_else
3123 { PCondit*tmp = new PCondit($3, $5, 0);
3124 tmp->set_file(@1.text);
3125 tmp->set_lineno(@1.first_line);
3126 $$ = tmp;
3128 | K_if '(' expression ')' statement_or_null K_else statement_or_null
3129 { PCondit*tmp = new PCondit($3, $5, $7);
3130 tmp->set_file(@1.text);
3131 tmp->set_lineno(@1.first_line);
3132 $$ = tmp;
3134 | K_if '(' error ')' statement_or_null %prec less_than_K_else
3135 { yyerror(@1, "error: Malformed conditional expression.");
3136 $$ = $5;
3138 | K_if '(' error ')' statement_or_null K_else statement_or_null
3139 { yyerror(@1, "error: Malformed conditional expression.");
3140 $$ = $5;
3142 | K_for '(' lpvalue '=' expression ';' expression ';'
3143 lpvalue '=' expression ')' statement
3144 { PForStatement*tmp = new PForStatement($3, $5, $7, $9, $11, $13);
3145 tmp->set_file(@1.text);
3146 tmp->set_lineno(@1.first_line);
3147 $$ = tmp;
3149 | K_for '(' lpvalue '=' expression ';' expression ';'
3150 error ')' statement
3151 { $$ = 0;
3152 yyerror(@9, "error: Error in for loop step assignment.");
3154 | K_for '(' lpvalue '=' expression ';' error ';'
3155 lpvalue '=' expression ')' statement
3156 { $$ = 0;
3157 yyerror(@7, "error: Error in for loop condition expression.");
3159 | K_for '(' error ')' statement
3160 { $$ = 0;
3161 yyerror(@3, "error: Incomprehensible for loop.");
3163 | K_while '(' expression ')' statement
3164 { PWhile*tmp = new PWhile($3, $5);
3165 $$ = tmp;
3167 | K_while '(' error ')' statement
3168 { $$ = 0;
3169 yyerror(@3, "error: Error in while loop condition.");
3171 | delay1 statement_or_null
3172 { PExpr*del = (*$1)[0];
3173 assert($1->count() == 1);
3174 PDelayStatement*tmp = new PDelayStatement(del, $2);
3175 tmp->set_file(@1.text);
3176 tmp->set_lineno(@1.first_line);
3177 $$ = tmp;
3179 | event_control statement_or_null
3180 { PEventStatement*tmp = $1;
3181 if (tmp == 0) {
3182 yyerror(@1, "error: Invalid event control.");
3183 $$ = 0;
3184 } else {
3185 tmp->set_statement($2);
3186 $$ = tmp;
3189 | '@' '*' statement_or_null
3190 { PEventStatement*tmp = new PEventStatement;
3191 tmp->set_file(@1.text);
3192 tmp->set_lineno(@1.first_line);
3193 tmp->set_statement($3);
3194 $$ = tmp;
3196 | '@' '(' '*' ')' statement_or_null
3197 { PEventStatement*tmp = new PEventStatement;
3198 tmp->set_file(@1.text);
3199 tmp->set_lineno(@1.first_line);
3200 tmp->set_statement($5);
3201 $$ = tmp;
3203 | lpvalue '=' expression ';'
3204 { PAssign*tmp = new PAssign($1,$3);
3205 tmp->set_file(@1.text);
3206 tmp->set_lineno(@1.first_line);
3207 $$ = tmp;
3209 | error '=' expression ';'
3210 { yyerror(@1, "Syntax in assignment statement l-value.");
3211 yyerrok;
3212 $$ = new PNoop;
3214 | lpvalue K_LE expression ';'
3215 { PAssignNB*tmp = new PAssignNB($1,$3);
3216 tmp->set_file(@1.text);
3217 tmp->set_lineno(@1.first_line);
3218 $$ = tmp;
3220 | error K_LE expression ';'
3221 { yyerror(@1, "Syntax in assignment statement l-value.");
3222 yyerrok;
3223 $$ = new PNoop;
3225 | lpvalue '=' delay1 expression ';'
3226 { assert($3->count() == 1);
3227 PExpr*del = (*$3)[0];
3228 PAssign*tmp = new PAssign($1,del,$4);
3229 tmp->set_file(@1.text);
3230 tmp->set_lineno(@1.first_line);
3231 $$ = tmp;
3233 | lpvalue K_LE delay1 expression ';'
3234 { assert($3->count() == 1);
3235 PExpr*del = (*$3)[0];
3236 PAssignNB*tmp = new PAssignNB($1,del,$4);
3237 tmp->set_file(@1.text);
3238 tmp->set_lineno(@1.first_line);
3239 $$ = tmp;
3241 | lpvalue '=' event_control expression ';'
3242 { PAssign*tmp = new PAssign($1,$3,$4);
3243 tmp->set_file(@1.text);
3244 tmp->set_lineno(@1.first_line);
3245 $$ = tmp;
3247 | lpvalue '=' K_repeat '(' expression ')' event_control expression ';'
3248 { PAssign*tmp = new PAssign($1,$7,$8);
3249 tmp->set_file(@1.text);
3250 tmp->set_lineno(@1.first_line);
3251 yyerror(@3, "sorry: repeat event control not supported.");
3252 delete $5;
3253 $$ = tmp;
3255 | lpvalue K_LE event_control expression ';'
3256 { yyerror(@1, "sorry: Event controls not supported here.");
3257 PAssignNB*tmp = new PAssignNB($1,$4);
3258 tmp->set_file(@1.text);
3259 tmp->set_lineno(@1.first_line);
3260 $$ = tmp;
3262 | lpvalue K_LE K_repeat '(' expression ')' event_control expression ';'
3263 { yyerror(@1, "sorry: Event controls not supported here.");
3264 delete $5;
3265 PAssignNB*tmp = new PAssignNB($1,$8);
3266 tmp->set_file(@1.text);
3267 tmp->set_lineno(@1.first_line);
3268 $$ = tmp;
3270 | K_wait '(' expression ')' statement_or_null
3271 { PEventStatement*tmp;
3272 PEEvent*etmp = new PEEvent(PEEvent::POSITIVE, $3);
3273 tmp = new PEventStatement(etmp);
3274 tmp->set_file(@1.text);
3275 tmp->set_lineno(@1.first_line);
3276 tmp->set_statement($5);
3277 $$ = tmp;
3279 | SYSTEM_IDENTIFIER '(' expression_list_with_nuls ')' ';'
3280 { PCallTask*tmp = new PCallTask(lex_strings.make($1), *$3);
3281 tmp->set_file(@1.text);
3282 tmp->set_lineno(@1.first_line);
3283 delete $1;
3284 delete $3;
3285 $$ = tmp;
3287 | SYSTEM_IDENTIFIER ';'
3288 { svector<PExpr*>pt (0);
3289 PCallTask*tmp = new PCallTask(lex_strings.make($1), pt);
3290 tmp->set_file(@1.text);
3291 tmp->set_lineno(@1.first_line);
3292 delete $1;
3293 $$ = tmp;
3295 | heirarchy_identifier '(' expression_list_proper ')' ';'
3296 { PCallTask*tmp = new PCallTask(*$1, *$3);
3297 tmp->set_file(@1.text);
3298 tmp->set_lineno(@1.first_line);
3299 delete $1;
3300 delete $3;
3301 $$ = tmp;
3304 /* NOTE: The standard doesn't really support an empty argument list
3305 between parentheses, but it seems natural, and people commonly
3306 want it. So accept it explicitly. */
3308 | heirarchy_identifier '(' ')' ';'
3309 { svector<PExpr*>pt (0);
3310 PCallTask*tmp = new PCallTask(*$1, pt);
3311 tmp->set_file(@1.text);
3312 tmp->set_lineno(@1.first_line);
3313 delete $1;
3314 $$ = tmp;
3316 | heirarchy_identifier ';'
3317 { svector<PExpr*>pt (0);
3318 PCallTask*tmp = new PCallTask(*$1, pt);
3319 tmp->set_file(@1.text);
3320 tmp->set_lineno(@1.first_line);
3321 delete $1;
3322 $$ = tmp;
3324 | error ';'
3325 { yyerror(@1, "error: malformed statement");
3326 yyerrok;
3327 $$ = new PNoop;
3331 statement_list
3332 : statement_list statement
3333 { svector<Statement*>*tmp = new svector<Statement*>(*$1, $2);
3334 delete $1;
3335 $$ = tmp;
3337 | statement
3338 { svector<Statement*>*tmp = new svector<Statement*>(1);
3339 (*tmp)[0] = $1;
3340 $$ = tmp;
3344 statement_or_null
3345 : statement
3346 | ';' { $$ = 0; }
3349 /* Task items are, other than the statement, task port items and
3350 other block items. */
3351 task_item
3352 : block_item_decl { $$ = new svector<PWire*>(0); }
3353 | task_port_item { $$ = $1; }
3356 task_port_item
3358 : K_input signed_opt range_opt list_of_identifiers ';'
3359 { svector<PWire*>*tmp
3360 = pform_make_task_ports(NetNet::PINPUT,
3361 IVL_VT_LOGIC, $2,
3362 $3, $4,
3363 @1.text, @1.first_line);
3364 $$ = tmp;
3366 | K_output signed_opt range_opt list_of_identifiers ';'
3367 { svector<PWire*>*tmp
3368 = pform_make_task_ports(NetNet::POUTPUT,
3369 IVL_VT_LOGIC, $2,
3370 $3, $4,
3371 @1.text, @1.first_line);
3372 $$ = tmp;
3374 | K_inout signed_opt range_opt list_of_identifiers ';'
3375 { svector<PWire*>*tmp
3376 = pform_make_task_ports(NetNet::PINOUT,
3377 IVL_VT_LOGIC, $2,
3378 $3, $4,
3379 @1.text, @1.first_line);
3380 $$ = tmp;
3383 /* When the port is an integer, infer a signed vector of the integer
3384 shape. Generate a range to make it work. */
3386 | K_input K_integer list_of_identifiers ';'
3387 { svector<PExpr*>*range_stub
3388 = new svector<PExpr*>(2);
3389 PExpr*re;
3390 re = new PENumber(new verinum(integer_width-1,
3391 integer_width));
3392 (*range_stub)[0] = re;
3393 re = new PENumber(new verinum((uint64_t)0, integer_width));
3394 (*range_stub)[1] = re;
3395 svector<PWire*>*tmp
3396 = pform_make_task_ports(NetNet::PINPUT,
3397 IVL_VT_LOGIC, true,
3398 range_stub, $3,
3399 @1.text, @1.first_line);
3400 $$ = tmp;
3402 | K_output K_integer list_of_identifiers ';'
3403 { svector<PExpr*>*range_stub
3404 = new svector<PExpr*>(2);
3405 PExpr*re;
3406 re = new PENumber(new verinum(integer_width-1,
3407 integer_width));
3408 (*range_stub)[0] = re;
3409 re = new PENumber(new verinum((uint64_t)0, integer_width));
3410 (*range_stub)[1] = re;
3411 svector<PWire*>*tmp
3412 = pform_make_task_ports(NetNet::POUTPUT,
3413 IVL_VT_LOGIC, true,
3414 range_stub, $3,
3415 @1.text, @1.first_line);
3416 $$ = tmp;
3418 | K_inout K_integer list_of_identifiers ';'
3419 { svector<PExpr*>*range_stub
3420 = new svector<PExpr*>(2);
3421 PExpr*re;
3422 re = new PENumber(new verinum(integer_width-1,
3423 integer_width));
3424 (*range_stub)[0] = re;
3425 re = new PENumber(new verinum((uint64_t)0, integer_width));
3426 (*range_stub)[1] = re;
3427 svector<PWire*>*tmp
3428 = pform_make_task_ports(NetNet::PINOUT,
3429 IVL_VT_LOGIC, true,
3430 range_stub, $3,
3431 @1.text, @1.first_line);
3432 $$ = tmp;
3435 /* Ports can be real. */
3437 | K_input K_real list_of_identifiers ';'
3438 { svector<PWire*>*tmp
3439 = pform_make_task_ports(NetNet::PINPUT,
3440 IVL_VT_REAL, false,
3441 0, $3,
3442 @1.text, @1.first_line);
3443 $$ = tmp;
3445 | K_output K_real list_of_identifiers ';'
3446 { svector<PWire*>*tmp
3447 = pform_make_task_ports(NetNet::POUTPUT,
3448 IVL_VT_REAL, true,
3449 0, $3,
3450 @1.text, @1.first_line);
3451 $$ = tmp;
3453 | K_inout K_real list_of_identifiers ';'
3454 { svector<PWire*>*tmp
3455 = pform_make_task_ports(NetNet::PINOUT,
3456 IVL_VT_REAL, true,
3457 0, $3,
3458 @1.text, @1.first_line);
3459 $$ = tmp;
3463 task_item_list
3464 : task_item_list task_item
3465 { svector<PWire*>*tmp = new svector<PWire*>(*$1, *$2);
3466 delete $1;
3467 delete $2;
3468 $$ = tmp;
3470 | task_item
3471 { $$ = $1; }
3474 task_item_list_opt
3475 : task_item_list
3476 { $$ = $1; }
3478 { $$ = 0; }
3481 task_port_decl
3483 : K_input signed_opt range_opt IDENTIFIER
3484 { svector<PWire*>*tmp
3485 = pform_make_task_ports(NetNet::PINPUT,
3486 IVL_VT_LOGIC, $2,
3487 $3, list_from_identifier($4),
3488 @1.text, @1.first_line);
3489 $$ = tmp;
3492 | K_output signed_opt range_opt IDENTIFIER
3493 { svector<PWire*>*tmp
3494 = pform_make_task_ports(NetNet::POUTPUT,
3495 IVL_VT_LOGIC, $2,
3496 $3, list_from_identifier($4),
3497 @1.text, @1.first_line);
3498 $$ = tmp;
3500 | K_inout signed_opt range_opt IDENTIFIER
3501 { svector<PWire*>*tmp
3502 = pform_make_task_ports(NetNet::PINOUT,
3503 IVL_VT_LOGIC, $2,
3504 $3, list_from_identifier($4),
3505 @1.text, @1.first_line);
3506 $$ = tmp;
3509 | K_input K_integer IDENTIFIER
3510 { svector<PExpr*>*range_stub
3511 = new svector<PExpr*>(2);
3512 PExpr*re;
3513 re = new PENumber(new verinum(integer_width-1,
3514 integer_width));
3515 (*range_stub)[0] = re;
3516 re = new PENumber(new verinum((uint64_t)0, integer_width));
3517 (*range_stub)[1] = re;
3518 svector<PWire*>*tmp
3519 = pform_make_task_ports(NetNet::PINPUT,
3520 IVL_VT_LOGIC, true,
3521 range_stub,
3522 list_from_identifier($3),
3523 @1.text, @1.first_line);
3524 $$ = tmp;
3526 | K_output K_integer IDENTIFIER
3527 { svector<PExpr*>*range_stub
3528 = new svector<PExpr*>(2);
3529 PExpr*re;
3530 re = new PENumber(new verinum(integer_width-1,
3531 integer_width));
3532 (*range_stub)[0] = re;
3533 re = new PENumber(new verinum((uint64_t)0, integer_width));
3534 (*range_stub)[1] = re;
3535 svector<PWire*>*tmp
3536 = pform_make_task_ports(NetNet::POUTPUT,
3537 IVL_VT_LOGIC, true,
3538 range_stub,
3539 list_from_identifier($3),
3540 @1.text, @1.first_line);
3541 $$ = tmp;
3543 | K_inout K_integer IDENTIFIER
3544 { svector<PExpr*>*range_stub
3545 = new svector<PExpr*>(2);
3546 PExpr*re;
3547 re = new PENumber(new verinum(integer_width-1,
3548 integer_width));
3549 (*range_stub)[0] = re;
3550 re = new PENumber(new verinum((uint64_t)0, integer_width));
3551 (*range_stub)[1] = re;
3552 svector<PWire*>*tmp
3553 = pform_make_task_ports(NetNet::PINOUT,
3554 IVL_VT_LOGIC, true,
3555 range_stub,
3556 list_from_identifier($3),
3557 @1.text, @1.first_line);
3558 $$ = tmp;
3561 /* Ports can be real. */
3563 | K_input K_real IDENTIFIER
3564 { svector<PWire*>*tmp
3565 = pform_make_task_ports(NetNet::PINPUT,
3566 IVL_VT_REAL, false,
3567 0, list_from_identifier($3),
3568 @1.text, @1.first_line);
3569 $$ = tmp;
3571 | K_output K_real IDENTIFIER
3572 { svector<PWire*>*tmp
3573 = pform_make_task_ports(NetNet::POUTPUT,
3574 IVL_VT_REAL, false,
3575 0, list_from_identifier($3),
3576 @1.text, @1.first_line);
3577 $$ = tmp;
3579 | K_inout K_real IDENTIFIER
3580 { svector<PWire*>*tmp
3581 = pform_make_task_ports(NetNet::PINOUT,
3582 IVL_VT_REAL, false,
3583 0, list_from_identifier($3),
3584 @1.text, @1.first_line);
3585 $$ = tmp;
3589 task_port_decl_list
3590 : task_port_decl_list ',' task_port_decl
3591 { svector<PWire*>*tmp = new svector<PWire*>(*$1, *$3);
3592 delete $1;
3593 delete $3;
3594 $$ = tmp;
3596 | task_port_decl
3597 { $$ = $1; }
3600 udp_body
3601 : K_table { lex_start_table(); }
3602 udp_entry_list
3603 K_endtable { lex_end_table(); $$ = $3; }
3606 udp_entry_list
3607 : udp_comb_entry_list
3608 | udp_sequ_entry_list
3611 udp_comb_entry
3612 : udp_input_list ':' udp_output_sym ';'
3613 { char*tmp = new char[strlen($1)+3];
3614 strcpy(tmp, $1);
3615 char*tp = tmp+strlen(tmp);
3616 *tp++ = ':';
3617 *tp++ = $3;
3618 *tp++ = 0;
3619 delete[]$1;
3620 $$ = tmp;
3624 udp_comb_entry_list
3625 : udp_comb_entry
3626 { list<string>*tmp = new list<string>;
3627 tmp->push_back($1);
3628 delete $1;
3629 $$ = tmp;
3631 | udp_comb_entry_list udp_comb_entry
3632 { list<string>*tmp = $1;
3633 tmp->push_back($2);
3634 delete $2;
3635 $$ = tmp;
3639 udp_sequ_entry_list
3640 : udp_sequ_entry
3641 { list<string>*tmp = new list<string>;
3642 tmp->push_back($1);
3643 delete $1;
3644 $$ = tmp;
3646 | udp_sequ_entry_list udp_sequ_entry
3647 { list<string>*tmp = $1;
3648 tmp->push_back($2);
3649 delete $2;
3650 $$ = tmp;
3654 udp_sequ_entry
3655 : udp_input_list ':' udp_input_sym ':' udp_output_sym ';'
3656 { char*tmp = new char[strlen($1)+5];
3657 strcpy(tmp, $1);
3658 char*tp = tmp+strlen(tmp);
3659 *tp++ = ':';
3660 *tp++ = $3;
3661 *tp++ = ':';
3662 *tp++ = $5;
3663 *tp++ = 0;
3664 $$ = tmp;
3668 udp_initial
3669 : K_initial IDENTIFIER '=' number ';'
3670 { PExpr*etmp = new PENumber($4);
3671 PEIdent*itmp = new PEIdent(lex_strings.make($2));
3672 PAssign*atmp = new PAssign(itmp, etmp);
3673 atmp->set_file(@2.text);
3674 atmp->set_lineno(@2.first_line);
3675 delete $2;
3676 $$ = atmp;
3680 udp_init_opt
3681 : udp_initial { $$ = $1; }
3682 | { $$ = 0; }
3685 udp_input_list
3686 : udp_input_sym
3687 { char*tmp = new char[2];
3688 tmp[0] = $1;
3689 tmp[1] = 0;
3690 $$ = tmp;
3692 | udp_input_list udp_input_sym
3693 { char*tmp = new char[strlen($1)+2];
3694 strcpy(tmp, $1);
3695 char*tp = tmp+strlen(tmp);
3696 *tp++ = $2;
3697 *tp++ = 0;
3698 delete[]$1;
3699 $$ = tmp;
3703 udp_input_sym
3704 : '0' { $$ = '0'; }
3705 | '1' { $$ = '1'; }
3706 | 'x' { $$ = 'x'; }
3707 | '?' { $$ = '?'; }
3708 | 'b' { $$ = 'b'; }
3709 | '*' { $$ = '*'; }
3710 | '%' { $$ = '%'; }
3711 | 'f' { $$ = 'f'; }
3712 | 'F' { $$ = 'F'; }
3713 | 'l' { $$ = 'l'; }
3714 | 'h' { $$ = 'H'; }
3715 | 'B' { $$ = 'B'; }
3716 | 'r' { $$ = 'r'; }
3717 | 'R' { $$ = 'R'; }
3718 | 'M' { $$ = 'M'; }
3719 | 'n' { $$ = 'n'; }
3720 | 'N' { $$ = 'N'; }
3721 | 'p' { $$ = 'p'; }
3722 | 'P' { $$ = 'P'; }
3723 | 'Q' { $$ = 'Q'; }
3724 | 'q' { $$ = 'q'; }
3725 | '_' { $$ = '_'; }
3726 | '+' { $$ = '+'; }
3729 udp_output_sym
3730 : '0' { $$ = '0'; }
3731 | '1' { $$ = '1'; }
3732 | 'x' { $$ = 'x'; }
3733 | '-' { $$ = '-'; }
3736 /* Port declarations create wires for the inputs and the output. The
3737 makes for these ports are scoped within the UDP, so there is no
3738 heirarchy involved. */
3739 udp_port_decl
3740 : K_input list_of_identifiers ';'
3741 { $$ = pform_make_udp_input_ports($2); }
3742 | K_output IDENTIFIER ';'
3743 { pform_name_t pname;
3744 pname.push_back(name_component_t(lex_strings.make($2)));
3745 PWire*pp = new PWire(pname, NetNet::IMPLICIT, NetNet::POUTPUT, IVL_VT_LOGIC);
3746 svector<PWire*>*tmp = new svector<PWire*>(1);
3747 (*tmp)[0] = pp;
3748 $$ = tmp;
3749 delete $2;
3751 | K_reg IDENTIFIER ';'
3752 { pform_name_t pname;
3753 pname.push_back(name_component_t(lex_strings.make($2)));
3754 PWire*pp = new PWire(pname, NetNet::REG, NetNet::PIMPLICIT, IVL_VT_LOGIC);
3755 svector<PWire*>*tmp = new svector<PWire*>(1);
3756 (*tmp)[0] = pp;
3757 $$ = tmp;
3758 delete $2;
3760 | K_reg K_output IDENTIFIER ';'
3761 { pform_name_t pname;
3762 pname.push_back(name_component_t(lex_strings.make($3)));
3763 PWire*pp = new PWire(pname, NetNet::REG, NetNet::POUTPUT, IVL_VT_LOGIC);
3764 svector<PWire*>*tmp = new svector<PWire*>(1);
3765 (*tmp)[0] = pp;
3766 $$ = tmp;
3767 delete $3;
3771 udp_port_decls
3772 : udp_port_decl
3773 { $$ = $1; }
3774 | udp_port_decls udp_port_decl
3775 { svector<PWire*>*tmp = new svector<PWire*>(*$1, *$2);
3776 delete $1;
3777 delete $2;
3778 $$ = tmp;
3782 udp_port_list
3783 : IDENTIFIER
3784 { list<string>*tmp = new list<string>;
3785 tmp->push_back($1);
3786 delete $1;
3787 $$ = tmp;
3789 | udp_port_list ',' IDENTIFIER
3790 { list<string>*tmp = $1;
3791 tmp->push_back($3);
3792 delete $3;
3793 $$ = tmp;
3797 udp_reg_opt: K_reg { $$ = true; } | { $$ = false; };
3799 udp_initial_expr_opt
3800 : '=' expression { $$ = $2; }
3801 | { $$ = 0; }
3804 udp_input_declaration_list
3805 : K_input IDENTIFIER
3806 { list<perm_string>*tmp = new list<perm_string>;
3807 tmp->push_back(lex_strings.make($2));
3808 $$ = tmp;
3809 delete[]$2;
3811 | udp_input_declaration_list ',' K_input IDENTIFIER
3812 { list<perm_string>*tmp = $1;
3813 tmp->push_back(lex_strings.make($4));
3814 $$ = tmp;
3815 delete[]$4;
3819 udp_primitive
3820 /* This is the syntax for primitives that uses the IEEE1364-1995
3821 format. The ports are simply names in the port list, and the
3822 declarations are in the body. */
3824 : K_primitive IDENTIFIER '(' udp_port_list ')' ';'
3825 udp_port_decls
3826 udp_init_opt
3827 udp_body
3828 K_endprimitive
3830 { perm_string tmp2 = lex_strings.make($2);
3831 pform_make_udp(tmp2, $4, $7, $9, $8,
3832 @2.text, @2.first_line);
3833 delete[]$2;
3836 /* This is the syntax for IEEE1364-2001 format definitions. The port
3837 names and declarations are all in the parameter list. */
3839 | K_primitive IDENTIFIER
3840 '(' K_output udp_reg_opt IDENTIFIER udp_initial_expr_opt ','
3841 udp_input_declaration_list ')' ';'
3842 udp_body
3843 K_endprimitive
3845 { perm_string tmp2 = lex_strings.make($2);
3846 perm_string tmp6 = lex_strings.make($6);
3847 pform_make_udp(tmp2, $5, tmp6, $7, $9, $12,
3848 @2.text, @2.first_line);
3849 delete[]$2;
3850 delete[]$6;