1 /* Optimized memcpy implementation for PowerPC64/POWER7.
2 Copyright (C) 2010 Free Software Foundation, Inc.
3 Contributed by Luis Machado <luisgpm@br.ibm.com>.
4 This file is part of the GNU C Library.
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, write to the Free
18 Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA
26 /* __ptr_t [r3] memcpy (__ptr_t dst [r3], __ptr_t src [r4], size_t len [r5]);
30 EALIGN (BP_SYM (memcpy), 5, 0)
38 ble cr1, L(copy_LT_32) /* If move < 32 bytes use short move
41 andi. 11,3,7 /* Check alignment of DST. */
44 clrldi 10,4,61 /* Check alignment of SRC. */
45 cmpld cr6,10,11 /* SRC and DST alignments match? */
48 bne cr6,L(copy_GE_32_unaligned)
50 srdi 9,5,3 /* Number of full quadwords remaining. */
52 beq L(copy_GE_32_aligned_cont)
58 /* Get the SRC aligned to 8 bytes. */
76 clrldi 10,12,61 /* Check alignment of SRC again. */
77 srdi 9,31,3 /* Number of full doublewords remaining. */
79 L(copy_GE_32_aligned_cont):
89 /* Copy 1~3 doublewords so the main loop starts
90 at a multiple of 32 bytes. */
109 1: /* Copy 1 doubleword and set the counter. */
118 /* Main aligned copy loop. Copies 32-bytes at a time. */
135 /* Check for tail bytes. */
144 /* At this point we have a tail of 0-7 bytes and we know that the
145 destination is doubleword-aligned. */
146 4: /* Copy 4 bytes. */
153 2: /* Copy 2 bytes. */
160 1: /* Copy 1 byte. */
165 0: /* Return original DST pointer. */
170 /* Handle copies of 0~31 bytes. */
178 /* At least 9 bytes to go. */
184 beq L(copy_LT_32_aligned)
186 /* Force 4-bytes alignment for SRC. */
195 1: bf 31,L(end_4bytes_alignment)
203 L(end_4bytes_alignment):
207 L(copy_LT_32_aligned):
208 /* At least 6 bytes to go, and SRC is word-aligned. */
222 8: /* Copy 8 bytes. */
231 4: /* Copy 4 bytes. */
238 2: /* Copy 2-3 bytes. */
250 1: /* Copy 1 byte. */
255 0: /* Return original DST pointer. */
259 /* Handles copies of 0~8 bytes. */
264 /* Though we could've used ld/std here, they are still
265 slow for unaligned cases. */
271 ld 3,-16(1) /* Return original DST pointers. */
275 4: /* Copies 4~7 bytes. */
290 5: /* Copy 1 byte. */
296 0: /* Return original DST pointer. */
300 /* Handle copies of 32+ bytes where DST is aligned (to quadword) but
301 SRC is not. Use aligned quadword loads from SRC, shifted to realign
302 the data, allowing for aligned DST stores. */
304 L(copy_GE_32_unaligned):
305 clrldi 0,0,60 /* Number of bytes until the 1st
307 andi. 11,3,15 /* Check alignment of DST (against
309 srdi 9,5,4 /* Number of full quadwords remaining. */
311 beq L(copy_GE_32_unaligned_cont)
313 /* SRC is not quadword aligned, get it aligned. */
318 /* Vector instructions work best when proper alignment (16-bytes)
319 is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
320 1: /* Copy 1 byte. */
327 2: /* Copy 2 bytes. */
334 4: /* Copy 4 bytes. */
341 8: /* Copy 8 bytes. */
349 clrldi 10,12,60 /* Check alignment of SRC. */
350 srdi 9,31,4 /* Number of full quadwords remaining. */
352 /* The proper alignment is present, it is OK to copy the bytes now. */
353 L(copy_GE_32_unaligned_cont):
355 /* Setup two indexes to speed up the indexed vector operations. */
357 li 6,16 /* Index for 16-bytes offsets. */
358 li 7,32 /* Index for 32-bytes offsets. */
360 srdi 8,31,5 /* Setup the loop counter. */
367 bf 31,L(setup_unaligned_loop)
369 /* Copy another 16 bytes to align to 32-bytes due to the loop . */
377 L(setup_unaligned_loop):
379 ble cr6,L(end_unaligned_loop)
381 /* Copy 32 bytes at a time using vector instructions. */
385 /* Note: vr6/vr10 may contain data that was already copied,
386 but in order to get proper alignment, we may have to copy
387 some portions again. This is faster than having unaligned
388 vector instructions though. */
390 lvx 4,11,6 /* vr4 = r11+16. */
391 vperm 6,3,4,5 /* Merge the correctly-aligned portions
392 of vr3/vr4 into vr6. */
393 lvx 3,11,7 /* vr3 = r11+32. */
394 vperm 10,4,3,5 /* Merge the correctly-aligned portions
395 of vr3/vr4 into vr10. */
401 bdnz L(unaligned_loop)
404 L(end_unaligned_loop):
406 /* Check for tail bytes. */
414 /* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
415 8: /* Copy 8 bytes. */
424 4: /* Copy 4 bytes. */
431 2: /* Copy 2~3 bytes. */
438 1: /* Copy 1 byte. */
443 0: /* Return original DST pointer. */
448 END_GEN_TB (BP_SYM (memcpy),TB_TOCLESS)
449 libc_hidden_builtin_def (memcpy)