1 /* Optimized memcpy implementation for PowerPC64/POWER7.
2 Copyright (C) 2010-2024 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
22 /* void * [r3] memcpy (void *dst [r3], void *src [r4], size_t len [r5]);
26 # define MEMCPY memcpy
29 #define dst 11 /* Use r11 so r3 kept unchanged. */
34 ENTRY_TOCLESS (MEMCPY, 5)
39 ble cr1, L(copy_LT_32) /* If move < 32 bytes use short move
42 /* Align copies using VSX instructions to quadword. It is to avoid alignment
43 traps when memcpy is used on non-cacheable memory (for instance, memory
47 cmpld cr6,10,11 /* SRC and DST alignments match? */
50 bne cr6,L(copy_GE_32_unaligned)
56 /* Get the DST and SRC aligned to 16 bytes. */
84 /* Main aligned copy loop. Copies 128 bytes at a time. */
100 /* for the 2nd + iteration of this loop. */
122 bdnz L(aligned_128head)
157 4: /* Copies 4~7 bytes. */
167 /* Return original DST pointer. */
171 /* Handle copies of 0~31 bytes. */
179 /* At least 9 bytes to go. */
183 beq L(copy_LT_32_aligned)
185 /* Force 4-byte alignment for SRC. */
195 bf 31,L(end_4bytes_alignment)
202 L(end_4bytes_alignment):
206 L(copy_LT_32_aligned):
207 /* At least 6 bytes to go, and SRC is word-aligned. */
221 8: /* Copy 8 bytes. */
231 /* Copies 4~7 bytes. */
242 /* Return original DST pointer. */
246 /* Copies 2~3 bytes. */
268 /* Return original DST pointer. */
272 /* Handles copies of 0~8 bytes. */
277 /* Though we could've used ld/std here, they are still
278 slow for unaligned cases. */
287 /* Handle copies of 32+ bytes where DST is aligned (to quadword) but
288 SRC is not. Use aligned quadword loads from SRC, shifted to realign
289 the data, allowing for aligned DST stores. */
291 L(copy_GE_32_unaligned):
292 clrldi 0,0,60 /* Number of bytes until the 1st dst quadword. */
293 srdi 9,cnt,4 /* Number of full quadwords remaining. */
295 beq L(copy_GE_32_unaligned_cont)
297 /* DST is not quadword aligned, get it aligned. */
302 /* Vector instructions work best when proper alignment (16-bytes)
303 is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
329 srdi 9,cnt,4 /* Number of full quadwords remaining. */
331 /* The proper alignment is present, it is OK to copy the bytes now. */
332 L(copy_GE_32_unaligned_cont):
334 /* Setup two indexes to speed up the indexed vector operations. */
336 li 6,16 /* Index for 16-bytes offsets. */
337 li 7,32 /* Index for 32-bytes offsets. */
339 srdi 8,cnt,5 /* Setup the loop counter. */
342 #ifdef __LITTLE_ENDIAN__
349 bf 31,L(setup_unaligned_loop)
351 /* Copy another 16 bytes to align to 32-bytes due to the loop. */
353 #ifdef __LITTLE_ENDIAN__
364 L(setup_unaligned_loop):
366 ble cr6,L(end_unaligned_loop)
368 /* Copy 32 bytes at a time using vector instructions. */
372 /* Note: vr6/vr10 may contain data that was already copied,
373 but in order to get proper alignment, we may have to copy
374 some portions again. This is faster than having unaligned
375 vector instructions though. */
378 #ifdef __LITTLE_ENDIAN__
384 #ifdef __LITTLE_ENDIAN__
393 bdnz L(unaligned_loop)
398 L(end_unaligned_loop):
400 /* Check for tail bytes. */
406 /* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
415 4: /* Copy 4~7 bytes. */
425 /* Return original DST pointer. */
428 END_GEN_TB (MEMCPY,TB_TOCLESS)
429 libc_hidden_builtin_def (memcpy)