1 /*===--- __clang_cuda_intrinsics.h - Device-side CUDA intrinsic wrappers ---===
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 *===-----------------------------------------------------------------------===
23 #ifndef __CLANG_CUDA_INTRINSICS_H__
24 #define __CLANG_CUDA_INTRINSICS_H__
26 #error "This file is for CUDA compilation only."
29 // sm_30 intrinsics: __shfl_{up,down,xor}.
31 #define __SM_30_INTRINSICS_H__
32 #define __SM_30_INTRINSICS_HPP__
34 #if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300
36 #pragma push_macro("__MAKE_SHUFFLES")
37 #define __MAKE_SHUFFLES(__FnName, __IntIntrinsic, __FloatIntrinsic, __Mask) \
38 inline __device__ int __FnName(int __in, int __offset, \
39 int __width = warpSize) { \
40 return __IntIntrinsic(__in, __offset, \
41 ((warpSize - __width) << 8) | (__Mask)); \
43 inline __device__ float __FnName(float __in, int __offset, \
44 int __width = warpSize) { \
45 return __FloatIntrinsic(__in, __offset, \
46 ((warpSize - __width) << 8) | (__Mask)); \
48 inline __device__ unsigned int __FnName(unsigned int __in, int __offset, \
49 int __width = warpSize) { \
50 return static_cast<unsigned int>( \
51 ::__FnName(static_cast<int>(__in), __offset, __width)); \
53 inline __device__ long long __FnName(long long __in, int __offset, \
54 int __width = warpSize) { \
58 _Static_assert(sizeof(__in) == sizeof(__Bits)); \
59 _Static_assert(sizeof(__Bits) == 2 * sizeof(int)); \
61 memcpy(&__in, &__tmp, sizeof(__in)); \
62 __tmp.__a = ::__FnName(__tmp.__a, __offset, __width); \
63 __tmp.__b = ::__FnName(__tmp.__b, __offset, __width); \
65 memcpy(&__out, &__tmp, sizeof(__tmp)); \
68 inline __device__ unsigned long long __FnName( \
69 unsigned long long __in, int __offset, int __width = warpSize) { \
70 return static_cast<unsigned long long>( \
71 ::__FnName(static_cast<unsigned long long>(__in), __offset, __width)); \
73 inline __device__ double __FnName(double __in, int __offset, \
74 int __width = warpSize) { \
76 _Static_assert(sizeof(__tmp) == sizeof(__in)); \
77 memcpy(&__tmp, &__in, sizeof(__in)); \
78 __tmp = ::__FnName(__tmp, __offset, __width); \
80 memcpy(&__out, &__tmp, sizeof(__out)); \
84 __MAKE_SHUFFLES(__shfl
, __nvvm_shfl_idx_i32
, __nvvm_shfl_idx_f32
, 0x1f);
85 // We use 0 rather than 31 as our mask, because shfl.up applies to lanes >=
87 __MAKE_SHUFFLES(__shfl_up
, __nvvm_shfl_up_i32
, __nvvm_shfl_up_f32
, 0);
88 __MAKE_SHUFFLES(__shfl_down
, __nvvm_shfl_down_i32
, __nvvm_shfl_down_f32
, 0x1f);
89 __MAKE_SHUFFLES(__shfl_xor
, __nvvm_shfl_bfly_i32
, __nvvm_shfl_bfly_f32
, 0x1f);
91 #pragma pop_macro("__MAKE_SHUFFLES")
93 #endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300
95 // sm_32 intrinsics: __ldg and __funnelshift_{l,lc,r,rc}.
97 // Prevent the vanilla sm_32 intrinsics header from being included.
98 #define __SM_32_INTRINSICS_H__
99 #define __SM_32_INTRINSICS_HPP__
101 #if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320
103 inline __device__
char __ldg(const char *ptr
) { return __nvvm_ldg_c(ptr
); }
104 inline __device__
short __ldg(const short *ptr
) { return __nvvm_ldg_s(ptr
); }
105 inline __device__
int __ldg(const int *ptr
) { return __nvvm_ldg_i(ptr
); }
106 inline __device__
long __ldg(const long *ptr
) { return __nvvm_ldg_l(ptr
); }
107 inline __device__
long long __ldg(const long long *ptr
) {
108 return __nvvm_ldg_ll(ptr
);
110 inline __device__
unsigned char __ldg(const unsigned char *ptr
) {
111 return __nvvm_ldg_uc(ptr
);
113 inline __device__
unsigned short __ldg(const unsigned short *ptr
) {
114 return __nvvm_ldg_us(ptr
);
116 inline __device__
unsigned int __ldg(const unsigned int *ptr
) {
117 return __nvvm_ldg_ui(ptr
);
119 inline __device__
unsigned long __ldg(const unsigned long *ptr
) {
120 return __nvvm_ldg_ul(ptr
);
122 inline __device__
unsigned long long __ldg(const unsigned long long *ptr
) {
123 return __nvvm_ldg_ull(ptr
);
125 inline __device__
float __ldg(const float *ptr
) { return __nvvm_ldg_f(ptr
); }
126 inline __device__
double __ldg(const double *ptr
) { return __nvvm_ldg_d(ptr
); }
128 inline __device__ char2
__ldg(const char2
*ptr
) {
129 typedef char c2
__attribute__((ext_vector_type(2)));
130 // We can assume that ptr is aligned at least to char2's alignment, but the
131 // load will assume that ptr is aligned to char2's alignment. This is only
132 // safe if alignof(c2) <= alignof(char2).
133 c2 rv
= __nvvm_ldg_c2(reinterpret_cast<const c2
*>(ptr
));
139 inline __device__ char4
__ldg(const char4
*ptr
) {
140 typedef char c4
__attribute__((ext_vector_type(4)));
141 c4 rv
= __nvvm_ldg_c4(reinterpret_cast<const c4
*>(ptr
));
149 inline __device__ short2
__ldg(const short2
*ptr
) {
150 typedef short s2
__attribute__((ext_vector_type(2)));
151 s2 rv
= __nvvm_ldg_s2(reinterpret_cast<const s2
*>(ptr
));
157 inline __device__ short4
__ldg(const short4
*ptr
) {
158 typedef short s4
__attribute__((ext_vector_type(4)));
159 s4 rv
= __nvvm_ldg_s4(reinterpret_cast<const s4
*>(ptr
));
167 inline __device__ int2
__ldg(const int2
*ptr
) {
168 typedef int i2
__attribute__((ext_vector_type(2)));
169 i2 rv
= __nvvm_ldg_i2(reinterpret_cast<const i2
*>(ptr
));
175 inline __device__ int4
__ldg(const int4
*ptr
) {
176 typedef int i4
__attribute__((ext_vector_type(4)));
177 i4 rv
= __nvvm_ldg_i4(reinterpret_cast<const i4
*>(ptr
));
185 inline __device__ longlong2
__ldg(const longlong2
*ptr
) {
186 typedef long long ll2
__attribute__((ext_vector_type(2)));
187 ll2 rv
= __nvvm_ldg_ll2(reinterpret_cast<const ll2
*>(ptr
));
194 inline __device__ uchar2
__ldg(const uchar2
*ptr
) {
195 typedef unsigned char uc2
__attribute__((ext_vector_type(2)));
196 uc2 rv
= __nvvm_ldg_uc2(reinterpret_cast<const uc2
*>(ptr
));
202 inline __device__ uchar4
__ldg(const uchar4
*ptr
) {
203 typedef unsigned char uc4
__attribute__((ext_vector_type(4)));
204 uc4 rv
= __nvvm_ldg_uc4(reinterpret_cast<const uc4
*>(ptr
));
212 inline __device__ ushort2
__ldg(const ushort2
*ptr
) {
213 typedef unsigned short us2
__attribute__((ext_vector_type(2)));
214 us2 rv
= __nvvm_ldg_us2(reinterpret_cast<const us2
*>(ptr
));
220 inline __device__ ushort4
__ldg(const ushort4
*ptr
) {
221 typedef unsigned short us4
__attribute__((ext_vector_type(4)));
222 us4 rv
= __nvvm_ldg_us4(reinterpret_cast<const us4
*>(ptr
));
230 inline __device__ uint2
__ldg(const uint2
*ptr
) {
231 typedef unsigned int ui2
__attribute__((ext_vector_type(2)));
232 ui2 rv
= __nvvm_ldg_ui2(reinterpret_cast<const ui2
*>(ptr
));
238 inline __device__ uint4
__ldg(const uint4
*ptr
) {
239 typedef unsigned int ui4
__attribute__((ext_vector_type(4)));
240 ui4 rv
= __nvvm_ldg_ui4(reinterpret_cast<const ui4
*>(ptr
));
248 inline __device__ ulonglong2
__ldg(const ulonglong2
*ptr
) {
249 typedef unsigned long long ull2
__attribute__((ext_vector_type(2)));
250 ull2 rv
= __nvvm_ldg_ull2(reinterpret_cast<const ull2
*>(ptr
));
257 inline __device__ float2
__ldg(const float2
*ptr
) {
258 typedef float f2
__attribute__((ext_vector_type(2)));
259 f2 rv
= __nvvm_ldg_f2(reinterpret_cast<const f2
*>(ptr
));
265 inline __device__ float4
__ldg(const float4
*ptr
) {
266 typedef float f4
__attribute__((ext_vector_type(4)));
267 f4 rv
= __nvvm_ldg_f4(reinterpret_cast<const f4
*>(ptr
));
275 inline __device__ double2
__ldg(const double2
*ptr
) {
276 typedef double d2
__attribute__((ext_vector_type(2)));
277 d2 rv
= __nvvm_ldg_d2(reinterpret_cast<const d2
*>(ptr
));
284 // TODO: Implement these as intrinsics, so the backend can work its magic on
285 // these. Alternatively, we could implement these as plain C and try to get
286 // llvm to recognize the relevant patterns.
287 inline __device__
unsigned __funnelshift_l(unsigned low32
, unsigned high32
,
288 unsigned shiftWidth
) {
290 asm("shf.l.wrap.b32 %0, %1, %2, %3;"
292 : "r"(low32
), "r"(high32
), "r"(shiftWidth
));
295 inline __device__
unsigned __funnelshift_lc(unsigned low32
, unsigned high32
,
296 unsigned shiftWidth
) {
298 asm("shf.l.clamp.b32 %0, %1, %2, %3;"
300 : "r"(low32
), "r"(high32
), "r"(shiftWidth
));
303 inline __device__
unsigned __funnelshift_r(unsigned low32
, unsigned high32
,
304 unsigned shiftWidth
) {
306 asm("shf.r.wrap.b32 %0, %1, %2, %3;"
308 : "r"(low32
), "r"(high32
), "r"(shiftWidth
));
311 inline __device__
unsigned __funnelshift_rc(unsigned low32
, unsigned high32
,
312 unsigned shiftWidth
) {
314 asm("shf.r.clamp.b32 %0, %1, %2, %3;"
316 : "r"(low32
), "r"(high32
), "r"(shiftWidth
));
320 #endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320
322 #endif // defined(__CLANG_CUDA_INTRINSICS_H__)