CORE: more debugging spew from stage IF
[yari.git] / testcases / regress / smc.c
blobec13ee31c0a89da86f7c8c4cb85fbe6ae5811c17
1 #include <stdio.h>
3 /*
4 * Test self-modifying code
5 */
7 volatile int array[20];
9 int return_const(short *p, int i)
11 // Include lots of writes to stress store buffer flushing
12 array[0] = i;
13 array[1] = i;
14 array[2] = i;
15 array[3] = i;
16 array[4] = i;
17 array[5] = i;
18 array[6] = i;
19 array[7] = i;
20 array[8] = i;
21 array[9] = i;
22 array[10] = i;
23 array[11] = i;
24 array[12] = i;
25 array[13] = i;
26 array[14] = i;
27 array[15] = i;
28 array[16] = i;
29 array[17] = i;
30 array[18] = i;
31 array[19] = i;
32 *p = i;
34 //__builtin_flush_icache(p, 2);
36 // calling __builtin_flush_icache(p, 2) is correct, but here
37 // I use synci directly to test the worst case.
38 asm(".set push;"
39 ".set mips32r2;"
40 "synci %0;"
41 ".set pop" :: "m" (*p));
43 asm(".set noreorder");
44 asm("li $2, 1729");
45 asm("jr $31");
46 asm("nop");
47 asm(".set reorder");
50 int return_const2(short *p, int i)
52 // Include lots of writes to stress store buffer flushing
53 array[0] = i;
54 array[1] = i;
55 array[2] = i;
56 array[3] = i;
57 array[4] = i;
58 array[5] = i;
59 array[6] = i;
60 array[7] = i;
61 array[8] = i;
62 array[9] = i;
63 array[10] = i;
64 array[11] = i;
65 array[12] = i;
66 array[13] = i;
67 array[14] = i;
68 array[15] = i;
69 array[16] = i;
70 array[17] = i;
71 array[18] = i;
72 array[19] = i;
73 *p = i;
75 //__builtin_flush_icache(p, 2);
77 // calling __builtin_flush_icache(p, 2) is correct, but here
78 // I use synci directly to test the worst case.
79 asm(".set push;"
80 ".set mips32r2;"
81 ".set noreorder;"
82 "b here;"
83 "synci %0" :: "m" (*p));
85 asm("loop: b loop");
87 asm("here: li $2, 1729");
88 asm("jr $31");
89 asm("nop");
90 asm(".set pop");
93 int main()
95 int i;
97 for (i = 0; i < 100; ++i) {
98 short *p = (short *) return_const2 + 53; // Magic!
99 if (return_const2(p, i) != i) {
100 printf("Failure\n");
101 return 1;
105 printf("Success\n");
107 return 0;