added base src
[xv6-db.git] / x86.h
blobe00d554ce7053b658586efba5ce2873216837832
1 // Routines to let C code use special x86 instructions.
3 static inline uchar
4 inb(ushort port)
6 uchar data;
8 asm volatile("in %1,%0" : "=a" (data) : "d" (port));
9 return data;
12 static inline void
13 insl(int port, void *addr, int cnt)
15 asm volatile("cld; rep insl" :
16 "=D" (addr), "=c" (cnt) :
17 "d" (port), "0" (addr), "1" (cnt) :
18 "memory", "cc");
21 static inline void
22 outb(ushort port, uchar data)
24 asm volatile("out %0,%1" : : "a" (data), "d" (port));
27 static inline void
28 outw(ushort port, ushort data)
30 asm volatile("out %0,%1" : : "a" (data), "d" (port));
33 static inline void
34 outsl(int port, const void *addr, int cnt)
36 asm volatile("cld; rep outsl" :
37 "=S" (addr), "=c" (cnt) :
38 "d" (port), "0" (addr), "1" (cnt) :
39 "cc");
42 static inline void
43 stosb(void *addr, int data, int cnt)
45 asm volatile("cld; rep stosb" :
46 "=D" (addr), "=c" (cnt) :
47 "0" (addr), "1" (cnt), "a" (data) :
48 "memory", "cc");
51 struct segdesc;
53 static inline void
54 lgdt(struct segdesc *p, int size)
56 volatile ushort pd[3];
58 pd[0] = size-1;
59 pd[1] = (uint)p;
60 pd[2] = (uint)p >> 16;
62 asm volatile("lgdt (%0)" : : "r" (pd));
65 struct gatedesc;
67 static inline void
68 lidt(struct gatedesc *p, int size)
70 volatile ushort pd[3];
72 pd[0] = size-1;
73 pd[1] = (uint)p;
74 pd[2] = (uint)p >> 16;
76 asm volatile("lidt (%0)" : : "r" (pd));
79 static inline void
80 ltr(ushort sel)
82 asm volatile("ltr %0" : : "r" (sel));
85 static inline uint
86 readeflags(void)
88 uint eflags;
89 asm volatile("pushfl; popl %0" : "=r" (eflags));
90 return eflags;
93 static inline void
94 loadgs(ushort v)
96 asm volatile("movw %0, %%gs" : : "r" (v));
99 static inline uint
100 rebp(void)
102 uint val;
103 asm volatile("movl %%ebp,%0" : "=r" (val));
104 return val;
107 static inline uint
108 resp(void)
110 uint val;
111 asm volatile("movl %%esp,%0" : "=r" (val));
112 return val;
115 static inline void
116 cli(void)
118 asm volatile("cli");
121 static inline void
122 sti(void)
124 asm volatile("sti");
127 static inline uint
128 xchg(volatile uint *addr, uint newval)
130 uint result;
132 // The + in "+m" denotes a read-modify-write operand.
133 asm volatile("lock; xchgl %0, %1" :
134 "+m" (*addr), "=a" (result) :
135 "1" (newval) :
136 "cc");
137 return result;
140 static inline void
141 lcr0(uint val)
143 asm volatile("movl %0,%%cr0" : : "r" (val));
146 static inline uint
147 rcr0(void)
149 uint val;
150 asm volatile("movl %%cr0,%0" : "=r" (val));
151 return val;
154 static inline uint
155 rcr2(void)
157 uint val;
158 asm volatile("movl %%cr2,%0" : "=r" (val));
159 return val;
162 static inline void
163 lcr3(uint val)
165 asm volatile("movl %0,%%cr3" : : "r" (val));
168 static inline uint
169 rcr3(void)
171 uint val;
172 asm volatile("movl %%cr3,%0" : "=r" (val));
173 return val;
176 // Layout of the trap frame built on the stack by the
177 // hardware and by trapasm.S, and passed to trap().
178 struct trapframe {
179 // registers as pushed by pusha
180 uint edi;
181 uint esi;
182 uint ebp;
183 uint oesp; // useless & ignored
184 uint ebx;
185 uint edx;
186 uint ecx;
187 uint eax;
189 // rest of trap frame
190 ushort gs;
191 ushort padding1;
192 ushort fs;
193 ushort padding2;
194 ushort es;
195 ushort padding3;
196 ushort ds;
197 ushort padding4;
198 uint trapno;
200 // below here defined by x86 hardware
201 uint err;
202 uint eip;
203 ushort cs;
204 ushort padding5;
205 uint eflags;
207 // below here only when crossing rings, such as from user to kernel
208 uint esp;
209 ushort ss;
210 ushort padding6;