include/asm-blackfin/mach-bf561/bfin_serial_5xx.h

   1 #include <linux/serial.h>
   2 #include <asm/dma.h>
   3 #include <asm/portmux.h>
   4
   5 #define NR_PORTS                1
   6
   7 #define OFFSET_THR              0x00    /* Transmit Holding register            */
   8 #define OFFSET_RBR              0x00    /* Receive Buffer register              */
   9 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
  10 #define OFFSET_IER              0x04    /* Interrupt Enable Register            */
  11 #define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
  12 #define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
  13 #define OFFSET_LCR              0x0C    /* Line Control Register                */
  14 #define OFFSET_MCR              0x10    /* Modem Control Register               */
  15 #define OFFSET_LSR              0x14    /* Line Status Register                 */
  16 #define OFFSET_MSR              0x18    /* Modem Status Register                */
  17 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
  18 #define OFFSET_GCTL             0x24    /* Global Control Register              */
  19
  20 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
  21 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
  22 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
  23 #define UART_GET_DLH(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLH))
  24 #define UART_GET_IIR(uart)      bfin_read16(((uart)->port.membase + OFFSET_IIR))
  25 #define UART_GET_LCR(uart)      bfin_read16(((uart)->port.membase + OFFSET_LCR))
  26 <<<<<<< HEAD:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  27 #define UART_GET_LSR(uart)      bfin_read16(((uart)->port.membase + OFFSET_LSR))
  28 =======
  29 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  30 #define UART_GET_GCTL(uart)     bfin_read16(((uart)->port.membase + OFFSET_GCTL))
  31
  32 #define UART_PUT_CHAR(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_THR),v)
  33 #define UART_PUT_DLL(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
  34 #define UART_PUT_IER(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_IER),v)
  35 #define UART_PUT_DLH(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
  36 #define UART_PUT_LCR(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
  37 #define UART_PUT_GCTL(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
  38
  39 #ifdef CONFIG_BFIN_UART0_CTSRTS
  40 # define CONFIG_SERIAL_BFIN_CTSRTS
  41 # ifndef CONFIG_UART0_CTS_PIN
  42 #  define CONFIG_UART0_CTS_PIN -1
  43 # endif
  44 # ifndef CONFIG_UART0_RTS_PIN
  45 #  define CONFIG_UART0_RTS_PIN -1
  46 # endif
  47 #endif
  48
  49 struct bfin_serial_port {
  50         struct uart_port        port;
  51         unsigned int            old_status;
  52 <<<<<<< HEAD:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  53 =======
  54         unsigned int lsr;
  55 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  56 #ifdef CONFIG_SERIAL_BFIN_DMA
  57         int                     tx_done;
  58         int                     tx_count;
  59         struct circ_buf         rx_dma_buf;
  60         struct timer_list       rx_dma_timer;
  61         int                     rx_dma_nrows;
  62         unsigned int            tx_dma_channel;
  63         unsigned int            rx_dma_channel;
  64         struct work_struct      tx_dma_workqueue;
  65 #else
  66 <<<<<<< HEAD:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  67         struct work_struct      cts_workqueue;
  68 =======
  69 # if ANOMALY_05000230
  70         unsigned int anomaly_threshold;
  71 # endif
  72 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  73 #endif
  74 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  75 <<<<<<< HEAD:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  76 =======
  77         struct work_struct      cts_workqueue;
  78 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  79         int                     cts_pin;
  80         int                     rts_pin;
  81 #endif
  82 };
  83
  84 <<<<<<< HEAD:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
  85 =======
  86 /* The hardware clears the LSR bits upon read, so we need to cache
  87  * some of the more fun bits in software so they don't get lost
  88  * when checking the LSR in other code paths (TX).
  89  */
  90 static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
  91 {
  92         unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
  93         uart->lsr |= (lsr & (BI|FE|PE|OE));
  94         return lsr | uart->lsr;
  95 }
  96
  97 static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
  98 {
  99         uart->lsr = 0;
 100         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 101 }
 102
 103 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
 104 struct bfin_serial_port bfin_serial_ports[NR_PORTS];
 105 struct bfin_serial_res {
 106         unsigned long   uart_base_addr;
 107         int             uart_irq;
 108 #ifdef CONFIG_SERIAL_BFIN_DMA
 109         unsigned int    uart_tx_dma_channel;
 110         unsigned int    uart_rx_dma_channel;
 111 #endif
 112 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 113         int             uart_cts_pin;
 114         int             uart_rts_pin;
 115 #endif
 116 };
 117
 118 struct bfin_serial_res bfin_serial_resource[] = {
 119         {
 120         0xFFC00400,
 121         IRQ_UART_RX,
 122 #ifdef CONFIG_SERIAL_BFIN_DMA
 123         CH_UART_TX,
 124         CH_UART_RX,
 125 #endif
 126 #ifdef CONFIG_BFIN_UART0_CTSRTS
 127         CONFIG_UART0_CTS_PIN,
 128         CONFIG_UART0_RTS_PIN,
 129 #endif
 130         }
 131 };
 132
 133 #define DRIVER_NAME "bfin-uart"
 134
 135 int nr_ports = NR_PORTS;
 136 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 137 {
 138
 139 #ifdef CONFIG_SERIAL_BFIN_UART0
 140         peripheral_request(P_UART0_TX, DRIVER_NAME);
 141         peripheral_request(P_UART0_RX, DRIVER_NAME);
 142 #endif
 143
 144 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 145         if (uart->cts_pin >= 0) {
 146                 gpio_request(uart->cts_pin, DRIVER_NAME);
 147                 gpio_direction_input(uart->cts_pin);
 148         }
 149         if (uart->rts_pin >= 0) {
 150                 gpio_request(uart->rts_pin, DRIVER_NAME);
 151                 gpio_direction_input(uart->rts_pin, 0);
 152         }
 153 #endif
 154 }