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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / video / sm501fb.c
bloba120f84f2b1ea74b9ed1d8199e84b3acfd723ac4
1 /* linux/drivers/video/sm501fb.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Vincent Sanders <vince@simtec.co.uk>
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Framebuffer driver for the Silicon Motion SM501
12 */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/tty.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/fb.h>
23 #include <linux/init.h>
24 #include <linux/vmalloc.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/wait.h>
29 #include <linux/platform_device.h>
30 #include <linux/clk.h>
31 #include <linux/console.h>
32
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35 #include <asm/div64.h>
36
37 #ifdef CONFIG_PM
38 #include <linux/pm.h>
39 #endif
40
41 #include <linux/sm501.h>
42 #include <linux/sm501-regs.h>
43
44 #define NR_PALETTE 256
45
46 enum sm501_controller {
47 HEAD_CRT = 0,
48 HEAD_PANEL = 1,
49 };
50
51 /* SM501 memory address */
52 struct sm501_mem {
53 unsigned long size;
54 unsigned long sm_addr;
55 void __iomem *k_addr;
56 };
57
58 /* private data that is shared between all frambuffers* */
59 struct sm501fb_info {
60 struct device *dev;
61 struct fb_info *fb[2]; /* fb info for both heads */
62 struct resource *fbmem_res; /* framebuffer resource */
63 struct resource *regs_res; /* registers resource */
64 struct sm501_platdata_fb *pdata; /* our platform data */
65
66 unsigned long pm_crt_ctrl; /* pm: crt ctrl save */
67
68 int irq;
69 int swap_endian; /* set to swap rgb=>bgr */
70 void __iomem *regs; /* remapped registers */
71 void __iomem *fbmem; /* remapped framebuffer */
72 size_t fbmem_len; /* length of remapped region */
73 };
74
75 /* per-framebuffer private data */
76 struct sm501fb_par {
77 u32 pseudo_palette[16];
78
79 enum sm501_controller head;
80 struct sm501_mem cursor;
81 struct sm501_mem screen;
82 struct fb_ops ops;
83
84 void *store_fb;
85 void *store_cursor;
86 void __iomem *cursor_regs;
87 struct sm501fb_info *info;
88 };
89
90 /* Helper functions */
91
92 static inline int h_total(struct fb_var_screeninfo *var)
93 {
94 return var->xres + var->left_margin +
95 var->right_margin + var->hsync_len;
96 }
97
98 static inline int v_total(struct fb_var_screeninfo *var)
99 {
100 return var->yres + var->upper_margin +
101 var->lower_margin + var->vsync_len;
102 }
103
104 /* sm501fb_sync_regs()
105 *
106 * This call is mainly for PCI bus systems where we need to
107 * ensure that any writes to the bus are completed before the
108 * next phase, or after completing a function.
109 */
110
111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
112 {
113 readl(info->regs);
114 }
115
116 /* sm501_alloc_mem
117 *
118 * This is an attempt to lay out memory for the two framebuffers and
119 * everything else
120 *
121 * |fbmem_res->start fbmem_res->end|
122 * | |
123 * |fb[0].fix.smem_start | |fb[1].fix.smem_start | 2K |
124 * |-> fb[0].fix.smem_len <-| spare |-> fb[1].fix.smem_len <-|-> cursors <-|
125 *
126 * The "spare" space is for the 2d engine data
127 * the fixed is space for the cursors (2x1Kbyte)
128 *
129 * we need to allocate memory for the 2D acceleration engine
130 * command list and the data for the engine to deal with.
131 *
132 * - all allocations must be 128bit aligned
133 * - cursors are 64x64x2 bits (1Kbyte)
134 *
135 */
136
137 #define SM501_MEMF_CURSOR (1)
138 #define SM501_MEMF_PANEL (2)
139 #define SM501_MEMF_CRT (4)
140 #define SM501_MEMF_ACCEL (8)
141
142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
143 unsigned int why, size_t size)
144 {
145 unsigned int ptr = 0;
146
147 switch (why) {
148 case SM501_MEMF_CURSOR:
149 ptr = inf->fbmem_len - size;
150 inf->fbmem_len = ptr;
151 break;
152
153 case SM501_MEMF_PANEL:
154 ptr = inf->fbmem_len - size;
155 if (ptr < inf->fb[0]->fix.smem_len)
156 return -ENOMEM;
157
158 break;
159
160 case SM501_MEMF_CRT:
161 ptr = 0;
162 break;
163
164 case SM501_MEMF_ACCEL:
165 ptr = inf->fb[0]->fix.smem_len;
166
167 if ((ptr + size) >
168 (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
169 return -ENOMEM;
170 break;
171
172 default:
173 return -EINVAL;
174 }
175
176 mem->size = size;
177 mem->sm_addr = ptr;
178 mem->k_addr = inf->fbmem + ptr;
179
180 dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
181 __func__, mem->sm_addr, mem->k_addr, why, size);
182
183 return 0;
184 }
185
186 /* sm501fb_ps_to_hz
187 *
188 * Converts a period in picoseconds to Hz.
189 *
190 * Note, we try to keep this in Hz to minimise rounding with
191 * the limited PLL settings on the SM501.
192 */
193
194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
195 {
196 unsigned long long numerator=1000000000000ULL;
197
198 /* 10^12 / picosecond period gives frequency in Hz */
199 do_div(numerator, psvalue);
200 return (unsigned long)numerator;
201 }
202
203 /* sm501fb_hz_to_ps is identical to the oposite transform */
204
205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
206
207 /* sm501fb_setup_gamma
208 *
209 * Programs a linear 1.0 gamma ramp in case the gamma
210 * correction is enabled without programming anything else.
211 */
212
213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
214 unsigned long palette)
215 {
216 unsigned long value = 0;
217 int offset;
218
219 /* set gamma values */
220 for (offset = 0; offset < 256 * 4; offset += 4) {
221 writel(value, fbi->regs + palette + offset);
222 value += 0x010101; /* Advance RGB by 1,1,1.*/
223 }
224 }
225
226 /* sm501fb_check_var
227 *
228 * check common variables for both panel and crt
229 */
230
231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
232 struct fb_info *info)
233 {
234 struct sm501fb_par *par = info->par;
235 struct sm501fb_info *sm = par->info;
236 unsigned long tmp;
237
238 /* check we can fit these values into the registers */
239
240 <<<<<<< HEAD:drivers/video/sm501fb.c
241 if (var->hsync_len > 255 || var->vsync_len > 255)
242 =======
243 if (var->hsync_len > 255 || var->vsync_len > 63)
244 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
245 return -EINVAL;
246
247 <<<<<<< HEAD:drivers/video/sm501fb.c
248 if ((var->xres + var->right_margin) >= 4096)
249 =======
250 /* hdisplay end and hsync start */
251 if ((var->xres + var->right_margin) > 4096)
252 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
253 return -EINVAL;
254
255 <<<<<<< HEAD:drivers/video/sm501fb.c
256 =======
257 /* vdisplay end and vsync start */
258 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
259 if ((var->yres + var->lower_margin) > 2048)
260 return -EINVAL;
261
262 /* hard limits of device */
263
264 if (h_total(var) > 4096 || v_total(var) > 2048)
265 return -EINVAL;
266
267 /* check our line length is going to be 128 bit aligned */
268
269 tmp = (var->xres * var->bits_per_pixel) / 8;
270 if ((tmp & 15) != 0)
271 return -EINVAL;
272
273 /* check the virtual size */
274
275 if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
276 return -EINVAL;
277
278 /* can cope with 8,16 or 32bpp */
279
280 if (var->bits_per_pixel <= 8)
281 var->bits_per_pixel = 8;
282 else if (var->bits_per_pixel <= 16)
283 var->bits_per_pixel = 16;
284 else if (var->bits_per_pixel == 24)
285 var->bits_per_pixel = 32;
286
287 /* set r/g/b positions and validate bpp */
288 switch(var->bits_per_pixel) {
289 case 8:
290 var->red.length = var->bits_per_pixel;
291 var->red.offset = 0;
292 var->green.length = var->bits_per_pixel;
293 var->green.offset = 0;
294 var->blue.length = var->bits_per_pixel;
295 var->blue.offset = 0;
296 var->transp.length = 0;
297 <<<<<<< HEAD:drivers/video/sm501fb.c
298 =======
299 var->transp.offset = 0;
300 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
301
302 break;
303
304 case 16:
305 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
306 <<<<<<< HEAD:drivers/video/sm501fb.c
307 var->red.offset = 11;
308 var->green.offset = 5;
309 var->blue.offset = 0;
310 } else {
311 =======
312 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
313 var->blue.offset = 11;
314 var->green.offset = 5;
315 var->red.offset = 0;
316 <<<<<<< HEAD:drivers/video/sm501fb.c
317 =======
318 } else {
319 var->red.offset = 11;
320 var->green.offset = 5;
321 var->blue.offset = 0;
322 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
323 }
324 <<<<<<< HEAD:drivers/video/sm501fb.c
325 =======
326 var->transp.offset = 0;
327 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
328
329 var->red.length = 5;
330 var->green.length = 6;
331 var->blue.length = 5;
332 var->transp.length = 0;
333 break;
334
335 case 32:
336 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
337 var->transp.offset = 0;
338 var->red.offset = 8;
339 var->green.offset = 16;
340 var->blue.offset = 24;
341 } else {
342 var->transp.offset = 24;
343 var->red.offset = 16;
344 var->green.offset = 8;
345 var->blue.offset = 0;
346 }
347
348 var->red.length = 8;
349 var->green.length = 8;
350 var->blue.length = 8;
351 var->transp.length = 0;
352 break;
353
354 default:
355 return -EINVAL;
356 }
357
358 return 0;
359 }
360
361 /*
362 * sm501fb_check_var_crt():
363 *
364 * check the parameters for the CRT head, and either bring them
365 * back into range, or return -EINVAL.
366 */
367
368 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
369 struct fb_info *info)
370 {
371 return sm501fb_check_var(var, info);
372 }
373
374 /* sm501fb_check_var_pnl():
375 *
376 * check the parameters for the CRT head, and either bring them
377 * back into range, or return -EINVAL.
378 */
379
380 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
381 struct fb_info *info)
382 {
383 return sm501fb_check_var(var, info);
384 }
385
386 /* sm501fb_set_par_common
387 *
388 * set common registers for framebuffers
389 */
390
391 static int sm501fb_set_par_common(struct fb_info *info,
392 struct fb_var_screeninfo *var)
393 {
394 struct sm501fb_par *par = info->par;
395 struct sm501fb_info *fbi = par->info;
396 unsigned long pixclock; /* pixelclock in Hz */
397 unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
398 unsigned int mem_type;
399 unsigned int clock_type;
400 unsigned int head_addr;
401
402 dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
403 __func__, var->xres, var->yres, var->bits_per_pixel,
404 var->xres_virtual, var->yres_virtual);
405
406 switch (par->head) {
407 case HEAD_CRT:
408 mem_type = SM501_MEMF_CRT;
409 clock_type = SM501_CLOCK_V2XCLK;
410 head_addr = SM501_DC_CRT_FB_ADDR;
411 break;
412
413 case HEAD_PANEL:
414 mem_type = SM501_MEMF_PANEL;
415 clock_type = SM501_CLOCK_P2XCLK;
416 head_addr = SM501_DC_PANEL_FB_ADDR;
417 break;
418
419 default:
420 mem_type = 0; /* stop compiler warnings */
421 head_addr = 0;
422 clock_type = 0;
423 }
424
425 switch (var->bits_per_pixel) {
426 case 8:
427 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
428 break;
429
430 case 16:
431 <<<<<<< HEAD:drivers/video/sm501fb.c
432 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
433 =======
434 info->fix.visual = FB_VISUAL_TRUECOLOR;
435 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
436 break;
437
438 case 32:
439 info->fix.visual = FB_VISUAL_TRUECOLOR;
440 break;
441 }
442
443 /* allocate fb memory within 501 */
444 info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
445 info->fix.smem_len = info->fix.line_length * var->yres_virtual;
446
447 dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
448 info->fix.line_length);
449
450 if (sm501_alloc_mem(fbi, &par->screen, mem_type,
451 info->fix.smem_len)) {
452 dev_err(fbi->dev, "no memory available\n");
453 return -ENOMEM;
454 }
455
456 info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
457
458 info->screen_base = fbi->fbmem + par->screen.sm_addr;
459 info->screen_size = info->fix.smem_len;
460
461 /* set start of framebuffer to the screen */
462
463 writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
464
465 /* program CRT clock */
466
467 pixclock = sm501fb_ps_to_hz(var->pixclock);
468
469 sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
470 pixclock);
471
472 /* update fb layer with actual clock used */
473 var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
474
475 dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz) = %lu, "
476 "sm501pixclock = %lu, error = %ld%%\n",
477 __func__, var->pixclock, pixclock, sm501pixclock,
478 ((pixclock - sm501pixclock)*100)/pixclock);
479
480 return 0;
481 }
482
483 /* sm501fb_set_par_geometry
484 *
485 * set the geometry registers for specified framebuffer.
486 */
487
488 static void sm501fb_set_par_geometry(struct fb_info *info,
489 struct fb_var_screeninfo *var)
490 {
491 struct sm501fb_par *par = info->par;
492 struct sm501fb_info *fbi = par->info;
493 void __iomem *base = fbi->regs;
494 unsigned long reg;
495
496 if (par->head == HEAD_CRT)
497 base += SM501_DC_CRT_H_TOT;
498 else
499 base += SM501_DC_PANEL_H_TOT;
500
501 /* set framebuffer width and display width */
502
503 reg = info->fix.line_length;
504 reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
505
506 writel(reg, fbi->regs + (par->head == HEAD_CRT ?
507 SM501_DC_CRT_FB_OFFSET : SM501_DC_PANEL_FB_OFFSET));
508
509 /* program horizontal total */
510
511 reg = (h_total(var) - 1) << 16;
512 reg |= (var->xres - 1);
513
514 writel(reg, base + SM501_OFF_DC_H_TOT);
515
516 /* program horizontal sync */
517
518 reg = var->hsync_len << 16;
519 reg |= var->xres + var->right_margin - 1;
520
521 writel(reg, base + SM501_OFF_DC_H_SYNC);
522
523 /* program vertical total */
524
525 reg = (v_total(var) - 1) << 16;
526 reg |= (var->yres - 1);
527
528 writel(reg, base + SM501_OFF_DC_V_TOT);
529
530 /* program vertical sync */
531 reg = var->vsync_len << 16;
532 reg |= var->yres + var->lower_margin - 1;
533
534 writel(reg, base + SM501_OFF_DC_V_SYNC);
535 }
536
537 /* sm501fb_pan_crt
538 *
539 * pan the CRT display output within an virtual framebuffer
540 */
541
542 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
543 struct fb_info *info)
544 {
545 struct sm501fb_par *par = info->par;
546 struct sm501fb_info *fbi = par->info;
547 unsigned int bytes_pixel = var->bits_per_pixel / 8;
548 unsigned long reg;
549 unsigned long xoffs;
550
551 xoffs = var->xoffset * bytes_pixel;
552
553 reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
554
555 reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
556 reg |= ((xoffs & 15) / bytes_pixel) << 4;
557 writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
558
559 reg = (par->screen.sm_addr + xoffs +
560 var->yoffset * info->fix.line_length);
561 writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
562
563 sm501fb_sync_regs(fbi);
564 return 0;
565 }
566
567 /* sm501fb_pan_pnl
568 *
569 * pan the panel display output within an virtual framebuffer
570 */
571
572 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
573 struct fb_info *info)
574 {
575 struct sm501fb_par *par = info->par;
576 struct sm501fb_info *fbi = par->info;
577 unsigned long reg;
578
579 reg = var->xoffset | (var->xres_virtual << 16);
580 writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
581
582 reg = var->yoffset | (var->yres_virtual << 16);
583 writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
584
585 sm501fb_sync_regs(fbi);
586 return 0;
587 }
588
589 /* sm501fb_set_par_crt
590 *
591 * Set the CRT video mode from the fb_info structure
592 */
593
594 static int sm501fb_set_par_crt(struct fb_info *info)
595 {
596 struct sm501fb_par *par = info->par;
597 struct sm501fb_info *fbi = par->info;
598 struct fb_var_screeninfo *var = &info->var;
599 unsigned long control; /* control register */
600 int ret;
601
602 /* activate new configuration */
603
604 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
605
606 /* enable CRT DAC - note 0 is on!*/
607 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
608
609 control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
610
611 control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
612 SM501_DC_CRT_CONTROL_GAMMA |
613 SM501_DC_CRT_CONTROL_BLANK |
614 SM501_DC_CRT_CONTROL_SEL |
615 SM501_DC_CRT_CONTROL_CP |
616 SM501_DC_CRT_CONTROL_TVP);
617
618 /* set the sync polarities before we check data source */
619
620 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
621 control |= SM501_DC_CRT_CONTROL_HSP;
622
623 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
624 control |= SM501_DC_CRT_CONTROL_VSP;
625
626 if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
627 /* the head is displaying panel data... */
628
629 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
630 goto out_update;
631 }
632
633 ret = sm501fb_set_par_common(info, var);
634 if (ret) {
635 dev_err(fbi->dev, "failed to set common parameters\n");
636 return ret;
637 }
638
639 sm501fb_pan_crt(var, info);
640 sm501fb_set_par_geometry(info, var);
641
642 control |= SM501_FIFO_3; /* fill if >3 free slots */
643
644 switch(var->bits_per_pixel) {
645 case 8:
646 control |= SM501_DC_CRT_CONTROL_8BPP;
647 break;
648
649 case 16:
650 control |= SM501_DC_CRT_CONTROL_16BPP;
651 <<<<<<< HEAD:drivers/video/sm501fb.c
652 =======
653 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
654 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
655 break;
656
657 case 32:
658 control |= SM501_DC_CRT_CONTROL_32BPP;
659 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
660 break;
661
662 default:
663 BUG();
664 }
665
666 control |= SM501_DC_CRT_CONTROL_SEL; /* CRT displays CRT data */
667 control |= SM501_DC_CRT_CONTROL_TE; /* enable CRT timing */
668 control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
669
670 out_update:
671 dev_dbg(fbi->dev, "new control is %08lx\n", control);
672
673 writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
674 sm501fb_sync_regs(fbi);
675
676 return 0;
677 }
678
679 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
680 {
681 unsigned long control;
682 void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
683 struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
684
685 control = readl(ctrl_reg);
686
687 if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
688 /* enable panel power */
689
690 control |= SM501_DC_PANEL_CONTROL_VDD; /* FPVDDEN */
691 writel(control, ctrl_reg);
692 sm501fb_sync_regs(fbi);
693 mdelay(10);
694
695 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
696 writel(control, ctrl_reg);
697 sm501fb_sync_regs(fbi);
698 mdelay(10);
699
700 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
701 control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
702 writel(control, ctrl_reg);
703 sm501fb_sync_regs(fbi);
704 mdelay(10);
705 }
706
707 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
708 control |= SM501_DC_PANEL_CONTROL_FPEN;
709 writel(control, ctrl_reg);
710 sm501fb_sync_regs(fbi);
711 mdelay(10);
712 }
713 } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
714 /* disable panel power */
715 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
716 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
717 writel(control, ctrl_reg);
718 sm501fb_sync_regs(fbi);
719 mdelay(10);
720 }
721
722 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
723 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
724 writel(control, ctrl_reg);
725 sm501fb_sync_regs(fbi);
726 mdelay(10);
727 }
728
729 control &= ~SM501_DC_PANEL_CONTROL_DATA;
730 writel(control, ctrl_reg);
731 sm501fb_sync_regs(fbi);
732 mdelay(10);
733
734 control &= ~SM501_DC_PANEL_CONTROL_VDD;
735 writel(control, ctrl_reg);
736 sm501fb_sync_regs(fbi);
737 mdelay(10);
738 }
739
740 sm501fb_sync_regs(fbi);
741 }
742
743 /* sm501fb_set_par_pnl
744 *
745 * Set the panel video mode from the fb_info structure
746 */
747
748 static int sm501fb_set_par_pnl(struct fb_info *info)
749 {
750 struct sm501fb_par *par = info->par;
751 struct sm501fb_info *fbi = par->info;
752 struct fb_var_screeninfo *var = &info->var;
753 unsigned long control;
754 unsigned long reg;
755 int ret;
756
757 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
758
759 /* activate this new configuration */
760
761 ret = sm501fb_set_par_common(info, var);
762 if (ret)
763 return ret;
764
765 sm501fb_pan_pnl(var, info);
766 sm501fb_set_par_geometry(info, var);
767
768 /* update control register */
769
770 control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
771 control &= (SM501_DC_PANEL_CONTROL_GAMMA |
772 SM501_DC_PANEL_CONTROL_VDD |
773 SM501_DC_PANEL_CONTROL_DATA |
774 SM501_DC_PANEL_CONTROL_BIAS |
775 SM501_DC_PANEL_CONTROL_FPEN |
776 SM501_DC_PANEL_CONTROL_CP |
777 SM501_DC_PANEL_CONTROL_CK |
778 SM501_DC_PANEL_CONTROL_HP |
779 SM501_DC_PANEL_CONTROL_VP |
780 SM501_DC_PANEL_CONTROL_HPD |
781 SM501_DC_PANEL_CONTROL_VPD);
782
783 control |= SM501_FIFO_3; /* fill if >3 free slots */
784
785 switch(var->bits_per_pixel) {
786 case 8:
787 control |= SM501_DC_PANEL_CONTROL_8BPP;
788 break;
789
790 case 16:
791 control |= SM501_DC_PANEL_CONTROL_16BPP;
792 <<<<<<< HEAD:drivers/video/sm501fb.c
793 =======
794 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
795 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/sm501fb.c
796 break;
797
798 case 32:
799 control |= SM501_DC_PANEL_CONTROL_32BPP;
800 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
801 break;
802
803 default:
804 BUG();
805 }
806
807 writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
808
809 /* panel plane top left and bottom right location */
810
811 writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
812
813 reg = var->xres - 1;
814 reg |= (var->yres - 1) << 16;
815
816 writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
817
818 /* program panel control register */
819
820 control |= SM501_DC_PANEL_CONTROL_TE; /* enable PANEL timing */
821 control |= SM501_DC_PANEL_CONTROL_EN; /* enable PANEL gfx plane */
822
823 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
824 control |= SM501_DC_PANEL_CONTROL_HSP;
825
826 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
827 control |= SM501_DC_PANEL_CONTROL_VSP;
828
829 writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
830 sm501fb_sync_regs(fbi);
831
832 /* ensure the panel interface is not tristated at this point */
833
834 sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
835 0, SM501_SYSCTRL_PANEL_TRISTATE);
836
837 /* power the panel up */
838 sm501fb_panel_power(fbi, 1);
839 return 0;
840 }
841
842
843 /* chan_to_field
844 *
845 * convert a colour value into a field position
846 *
847 * from pxafb.c
848 */
849
850 static inline unsigned int chan_to_field(unsigned int chan,
851 struct fb_bitfield *bf)
852 {
853 chan &= 0xffff;
854 chan >>= 16 - bf->length;
855 return chan << bf->offset;
856 }
857
858 /* sm501fb_setcolreg
859 *
860 * set the colour mapping for modes that support palettised data
861 */
862
863 static int sm501fb_setcolreg(unsigned regno,
864 unsigned red, unsigned green, unsigned blue,
865 unsigned transp, struct fb_info *info)
866 {
867 struct sm501fb_par *par = info->par;
868 struct sm501fb_info *fbi = par->info;
869 void __iomem *base = fbi->regs;
870 unsigned int val;
871
872 if (par->head == HEAD_CRT)
873 base += SM501_DC_CRT_PALETTE;
874 else
875 base += SM501_DC_PANEL_PALETTE;
876
877 switch (info->fix.visual) {
878 case FB_VISUAL_TRUECOLOR:
879 /* true-colour, use pseuo-palette */
880
881 if (regno < 16) {
882 u32 *pal = par->pseudo_palette;
883
884 val = chan_to_field(red, &info->var.red);
885 val |= chan_to_field(green, &info->var.green);
886 val |= chan_to_field(blue, &info->var.blue);
887
888 pal[regno] = val;
889 }
890 break;
891
892 case FB_VISUAL_PSEUDOCOLOR:
893 if (regno < 256) {
894 val = (red >> 8) << 16;
895 val |= (green >> 8) << 8;
896 val |= blue >> 8;
897
898 writel(val, base + (regno * 4));
899 }
900
901 break;
902
903 default:
904 return 1; /* unknown type */
905 }
906
907 return 0;
908 }
909
910 /* sm501fb_blank_pnl
911 *
912 * Blank or un-blank the panel interface
913 */
914
915 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
916 {
917 struct sm501fb_par *par = info->par;
918 struct sm501fb_info *fbi = par->info;
919
920 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
921
922 switch (blank_mode) {
923 case FB_BLANK_POWERDOWN:
924 sm501fb_panel_power(fbi, 0);
925 break;
926
927 case FB_BLANK_UNBLANK:
928 sm501fb_panel_power(fbi, 1);
929 break;
930
931 case FB_BLANK_NORMAL:
932 case FB_BLANK_VSYNC_SUSPEND:
933 case FB_BLANK_HSYNC_SUSPEND:
934 default:
935 return 1;
936 }
937
938 return 0;
939 }
940
941 /* sm501fb_blank_crt
942 *
943 * Blank or un-blank the crt interface
944 */
945
946 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
947 {
948 struct sm501fb_par *par = info->par;
949 struct sm501fb_info *fbi = par->info;
950 unsigned long ctrl;
951
952 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
953
954 ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
955
956 switch (blank_mode) {
957 case FB_BLANK_POWERDOWN:
958 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
959 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
960
961 case FB_BLANK_NORMAL:
962 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
963 break;
964
965 case FB_BLANK_UNBLANK:
966 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
967 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
968 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
969 break;
970
971 case FB_BLANK_VSYNC_SUSPEND:
972 case FB_BLANK_HSYNC_SUSPEND:
973 default:
974 return 1;
975
976 }
977
978 writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
979 sm501fb_sync_regs(fbi);
980
981 return 0;
982 }
983
984 /* sm501fb_cursor
985 *
986 * set or change the hardware cursor parameters
987 */
988
989 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
990 {
991 struct sm501fb_par *par = info->par;
992 struct sm501fb_info *fbi = par->info;
993 void __iomem *base = fbi->regs;
994 unsigned long hwc_addr;
995 unsigned long fg, bg;
996
997 dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
998
999 if (par->head == HEAD_CRT)
1000 base += SM501_DC_CRT_HWC_BASE;
1001 else
1002 base += SM501_DC_PANEL_HWC_BASE;
1003
1004 /* check not being asked to exceed capabilities */
1005
1006 if (cursor->image.width > 64)
1007 return -EINVAL;
1008
1009 if (cursor->image.height > 64)
1010 return -EINVAL;
1011
1012 if (cursor->image.depth > 1)
1013 return -EINVAL;
1014
1015 hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
1016
1017 if (cursor->enable)
1018 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1019 else
1020 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1021
1022 /* set data */
1023 if (cursor->set & FB_CUR_SETPOS) {
1024 unsigned int x = cursor->image.dx;
1025 unsigned int y = cursor->image.dy;
1026
1027 if (x >= 2048 || y >= 2048 )
1028 return -EINVAL;
1029
1030 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1031
1032 //y += cursor->image.height;
1033
1034 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1035 }
1036
1037 if (cursor->set & FB_CUR_SETCMAP) {
1038 unsigned int bg_col = cursor->image.bg_color;
1039 unsigned int fg_col = cursor->image.fg_color;
1040
1041 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1042 __func__, bg_col, fg_col);
1043
1044 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1045 ((info->cmap.green[bg_col] & 0xFC) << 3) |
1046 ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1047
1048 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1049 ((info->cmap.green[fg_col] & 0xFC) << 3) |
1050 ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1051
1052 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1053
1054 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1055 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1056 }
1057
1058 if (cursor->set & FB_CUR_SETSIZE ||
1059 cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1060 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1061 * clears it to transparent then combines the cursor
1062 * shape plane with the colour plane to set the
1063 * cursor */
1064 int x, y;
1065 const unsigned char *pcol = cursor->image.data;
1066 const unsigned char *pmsk = cursor->mask;
1067 void __iomem *dst = par->cursor.k_addr;
1068 unsigned char dcol = 0;
1069 unsigned char dmsk = 0;
1070 unsigned int op;
1071
1072 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1073 __func__, cursor->image.width, cursor->image.height);
1074
1075 for (op = 0; op < (64*64*2)/8; op+=4)
1076 writel(0x0, dst + op);
1077
1078 for (y = 0; y < cursor->image.height; y++) {
1079 for (x = 0; x < cursor->image.width; x++) {
1080 if ((x % 8) == 0) {
1081 dcol = *pcol++;
1082 dmsk = *pmsk++;
1083 } else {
1084 dcol >>= 1;
1085 dmsk >>= 1;
1086 }
1087
1088 if (dmsk & 1) {
1089 op = (dcol & 1) ? 1 : 3;
1090 op <<= ((x % 4) * 2);
1091
1092 op |= readb(dst + (x / 4));
1093 writeb(op, dst + (x / 4));
1094 }
1095 }
1096 dst += (64*2)/8;
1097 }
1098 }
1099
1100 sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1101 return 0;
1102 }
1103
1104 /* sm501fb_crtsrc_show
1105 *
1106 * device attribute code to show where the crt output is sourced from
1107 */
1108
1109 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1110 struct device_attribute *attr, char *buf)
1111 {
1112 struct sm501fb_info *info = dev_get_drvdata(dev);
1113 unsigned long ctrl;
1114
1115 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1116 ctrl &= SM501_DC_CRT_CONTROL_SEL;
1117
1118 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1119 }
1120
1121 /* sm501fb_crtsrc_show
1122 *
1123 * device attribute code to set where the crt output is sourced from
1124 */
1125
1126 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1127 struct device_attribute *attr,
1128 const char *buf, size_t len)
1129 {
1130 struct sm501fb_info *info = dev_get_drvdata(dev);
1131 enum sm501_controller head;
1132 unsigned long ctrl;
1133
1134 if (len < 1)
1135 return -EINVAL;
1136
1137 if (strnicmp(buf, "crt", 3) == 0)
1138 head = HEAD_CRT;
1139 else if (strnicmp(buf, "panel", 5) == 0)
1140 head = HEAD_PANEL;
1141 else
1142 return -EINVAL;
1143
1144 dev_info(dev, "setting crt source to head %d\n", head);
1145
1146 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1147
1148 if (head == HEAD_CRT) {
1149 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1150 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1151 ctrl |= SM501_DC_CRT_CONTROL_TE;
1152 } else {
1153 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1154 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1155 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1156 }
1157
1158 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1159 sm501fb_sync_regs(info);
1160
1161 return len;
1162 }
1163
1164 /* Prepare the device_attr for registration with sysfs later */
1165 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1166
1167 /* sm501fb_show_regs
1168 *
1169 * show the primary sm501 registers
1170 */
1171 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1172 unsigned int start, unsigned int len)
1173 {
1174 void __iomem *mem = info->regs;
1175 char *buf = ptr;
1176 unsigned int reg;
1177
1178 for (reg = start; reg < (len + start); reg += 4)
1179 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1180
1181 return ptr - buf;
1182 }
1183
1184 /* sm501fb_debug_show_crt
1185 *
1186 * show the crt control and cursor registers
1187 */
1188
1189 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1190 struct device_attribute *attr, char *buf)
1191 {
1192 struct sm501fb_info *info = dev_get_drvdata(dev);
1193 char *ptr = buf;
1194
1195 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1196 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1197
1198 return ptr - buf;
1199 }
1200
1201 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1202
1203 /* sm501fb_debug_show_pnl
1204 *
1205 * show the panel control and cursor registers
1206 */
1207
1208 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1209 struct device_attribute *attr, char *buf)
1210 {
1211 struct sm501fb_info *info = dev_get_drvdata(dev);
1212 char *ptr = buf;
1213
1214 ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1215 ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1216
1217 return ptr - buf;
1218 }
1219
1220 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1221
1222 /* framebuffer ops */
1223
1224 static struct fb_ops sm501fb_ops_crt = {
1225 .owner = THIS_MODULE,
1226 .fb_check_var = sm501fb_check_var_crt,
1227 .fb_set_par = sm501fb_set_par_crt,
1228 .fb_blank = sm501fb_blank_crt,
1229 .fb_setcolreg = sm501fb_setcolreg,
1230 .fb_pan_display = sm501fb_pan_crt,
1231 .fb_cursor = sm501fb_cursor,
1232 .fb_fillrect = cfb_fillrect,
1233 .fb_copyarea = cfb_copyarea,
1234 .fb_imageblit = cfb_imageblit,
1235 };
1236
1237 static struct fb_ops sm501fb_ops_pnl = {
1238 .owner = THIS_MODULE,
1239 .fb_check_var = sm501fb_check_var_pnl,
1240 .fb_set_par = sm501fb_set_par_pnl,
1241 .fb_pan_display = sm501fb_pan_pnl,
1242 .fb_blank = sm501fb_blank_pnl,
1243 .fb_setcolreg = sm501fb_setcolreg,
1244 .fb_cursor = sm501fb_cursor,
1245 .fb_fillrect = cfb_fillrect,
1246 .fb_copyarea = cfb_copyarea,
1247 .fb_imageblit = cfb_imageblit,
1248 };
1249
1250 /* sm501fb_info_alloc
1251 *
1252 * creates and initialises an sm501fb_info structure
1253 */
1254
1255 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1256 struct fb_info *fbinfo_pnl)
1257 {
1258 struct sm501fb_info *info;
1259 struct sm501fb_par *par;
1260
1261 info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1262 if (info) {
1263 /* set the references back */
1264
1265 par = fbinfo_crt->par;
1266 par->info = info;
1267 par->head = HEAD_CRT;
1268 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1269
1270 par = fbinfo_pnl->par;
1271 par->info = info;
1272 par->head = HEAD_PANEL;
1273 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1274
1275 /* store the two fbs into our info */
1276 info->fb[HEAD_CRT] = fbinfo_crt;
1277 info->fb[HEAD_PANEL] = fbinfo_pnl;
1278 }
1279
1280 return info;
1281 }
1282
1283 /* sm501_init_cursor
1284 *
1285 * initialise hw cursor parameters
1286 */
1287
1288 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1289 {
1290 struct sm501fb_par *par = fbi->par;
1291 struct sm501fb_info *info = par->info;
1292 int ret;
1293
1294 par->cursor_regs = info->regs + reg_base;
1295
1296 ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1297 if (ret < 0)
1298 return ret;
1299
1300 /* initialise the colour registers */
1301
1302 writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1303
1304 writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1305 writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1306 writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1307 sm501fb_sync_regs(info);
1308
1309 return 0;
1310 }
1311
1312 /* sm501fb_info_start
1313 *
1314 * fills the par structure claiming resources and remapping etc.
1315 */
1316
1317 static int sm501fb_start(struct sm501fb_info *info,
1318 struct platform_device *pdev)
1319 {
1320 struct resource *res;
1321 struct device *dev;
1322 int k;
1323 int ret;
1324
1325 info->dev = dev = &pdev->dev;
1326 platform_set_drvdata(pdev, info);
1327
1328 info->irq = ret = platform_get_irq(pdev, 0);
1329 if (ret < 0) {
1330 /* we currently do not use the IRQ */
1331 dev_warn(dev, "no irq for device\n");
1332 }
1333
1334 /* allocate, reserve and remap resources for registers */
1335 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1336 if (res == NULL) {
1337 dev_err(dev, "no resource definition for registers\n");
1338 ret = -ENOENT;
1339 goto err_release;
1340 }
1341
1342 info->regs_res = request_mem_region(res->start,
1343 res->end - res->start,
1344 pdev->name);
1345
1346 if (info->regs_res == NULL) {
1347 dev_err(dev, "cannot claim registers\n");
1348 ret = -ENXIO;
1349 goto err_release;
1350 }
1351
1352 info->regs = ioremap(res->start, (res->end - res->start)+1);
1353 if (info->regs == NULL) {
1354 dev_err(dev, "cannot remap registers\n");
1355 ret = -ENXIO;
1356 goto err_regs_res;
1357 }
1358
1359 /* allocate, reserve resources for framebuffer */
1360 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1361 if (res == NULL) {
1362 dev_err(dev, "no memory resource defined\n");
1363 ret = -ENXIO;
1364 goto err_regs_map;
1365 }
1366
1367 info->fbmem_res = request_mem_region(res->start,
1368 (res->end - res->start)+1,
1369 pdev->name);
1370 if (info->fbmem_res == NULL) {
1371 dev_err(dev, "cannot claim framebuffer\n");
1372 ret = -ENXIO;
1373 goto err_regs_map;
1374 }
1375
1376 info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1377 if (info->fbmem == NULL) {
1378 dev_err(dev, "cannot remap framebuffer\n");
1379 goto err_mem_res;
1380 }
1381
1382 info->fbmem_len = (res->end - res->start)+1;
1383
1384 /* clear framebuffer memory - avoids garbage data on unused fb */
1385 memset(info->fbmem, 0, info->fbmem_len);
1386
1387 /* clear palette ram - undefined at power on */
1388 for (k = 0; k < (256 * 3); k++)
1389 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1390
1391 /* enable display controller */
1392 sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1393
1394 /* setup cursors */
1395
1396 sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1397 sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1398
1399 return 0; /* everything is setup */
1400
1401 err_mem_res:
1402 release_resource(info->fbmem_res);
1403 kfree(info->fbmem_res);
1404
1405 err_regs_map:
1406 iounmap(info->regs);
1407
1408 err_regs_res:
1409 release_resource(info->regs_res);
1410 kfree(info->regs_res);
1411
1412 err_release:
1413 return ret;
1414 }
1415
1416 static void sm501fb_stop(struct sm501fb_info *info)
1417 {
1418 /* disable display controller */
1419 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1420
1421 iounmap(info->fbmem);
1422 release_resource(info->fbmem_res);
1423 kfree(info->fbmem_res);
1424
1425 iounmap(info->regs);
1426 release_resource(info->regs_res);
1427 kfree(info->regs_res);
1428 }
1429
1430 static void sm501fb_info_release(struct sm501fb_info *info)
1431 {
1432 kfree(info);
1433 }
1434
1435 static int sm501fb_init_fb(struct fb_info *fb,
1436 enum sm501_controller head,
1437 const char *fbname)
1438 {
1439 struct sm501_platdata_fbsub *pd;
1440 struct sm501fb_par *par = fb->par;
1441 struct sm501fb_info *info = par->info;
1442 unsigned long ctrl;
1443 unsigned int enable;
1444 int ret;
1445
1446 switch (head) {
1447 case HEAD_CRT:
1448 pd = info->pdata->fb_crt;
1449 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1450 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1451
1452 /* ensure we set the correct source register */
1453 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1454 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1455 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1456 }
1457
1458 break;
1459
1460 case HEAD_PANEL:
1461 pd = info->pdata->fb_pnl;
1462 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1463 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1464 break;
1465
1466 default:
1467 pd = NULL; /* stop compiler warnings */
1468 ctrl = 0;
1469 enable = 0;
1470 BUG();
1471 }
1472
1473 dev_info(info->dev, "fb %s %sabled at start\n",
1474 fbname, enable ? "en" : "dis");
1475
1476 /* check to see if our routing allows this */
1477
1478 if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1479 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1480 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1481 enable = 0;
1482 }
1483
1484 strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1485
1486 memcpy(&par->ops,
1487 (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1488 sizeof(struct fb_ops));
1489
1490 /* update ops dependant on what we've been passed */
1491
1492 if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1493 par->ops.fb_cursor = NULL;
1494
1495 fb->fbops = &par->ops;
1496 fb->flags = FBINFO_FLAG_DEFAULT |
1497 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1498
1499 /* fixed data */
1500
1501 fb->fix.type = FB_TYPE_PACKED_PIXELS;
1502 fb->fix.type_aux = 0;
1503 fb->fix.xpanstep = 1;
1504 fb->fix.ypanstep = 1;
1505 fb->fix.ywrapstep = 0;
1506 fb->fix.accel = FB_ACCEL_NONE;
1507
1508 /* screenmode */
1509
1510 fb->var.nonstd = 0;
1511 fb->var.activate = FB_ACTIVATE_NOW;
1512 fb->var.accel_flags = 0;
1513 fb->var.vmode = FB_VMODE_NONINTERLACED;
1514 fb->var.bits_per_pixel = 16;
1515
1516 if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1517 /* TODO read the mode from the current display */
1518
1519 } else {
1520 if (pd->def_mode) {
1521 dev_info(info->dev, "using supplied mode\n");
1522 fb_videomode_to_var(&fb->var, pd->def_mode);
1523
1524 fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1525 fb->var.xres_virtual = fb->var.xres;
1526 fb->var.yres_virtual = fb->var.yres;
1527 } else {
1528 ret = fb_find_mode(&fb->var, fb,
1529 NULL, NULL, 0, NULL, 8);
1530
1531 if (ret == 0 || ret == 4) {
1532 dev_err(info->dev,
1533 "failed to get initial mode\n");
1534 return -EINVAL;
1535 }
1536 }
1537 }
1538
1539 /* initialise and set the palette */
1540 fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1541 fb_set_cmap(&fb->cmap, fb);
1542
1543 ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1544 if (ret)
1545 dev_err(info->dev, "check_var() failed on initial setup?\n");
1546
1547 /* ensure we've activated our new configuration */
1548 (fb->fbops->fb_set_par)(fb);
1549
1550 return 0;
1551 }
1552
1553 /* default platform data if none is supplied (ie, PCI device) */
1554
1555 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1556 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1557 SM501FB_FLAG_USE_HWCURSOR |
1558 SM501FB_FLAG_USE_HWACCEL |
1559 SM501FB_FLAG_DISABLE_AT_EXIT),
1560
1561 };
1562
1563 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1564 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1565 SM501FB_FLAG_USE_HWCURSOR |
1566 SM501FB_FLAG_USE_HWACCEL |
1567 SM501FB_FLAG_DISABLE_AT_EXIT),
1568 };
1569
1570 static struct sm501_platdata_fb sm501fb_def_pdata = {
1571 .fb_route = SM501_FB_OWN,
1572 .fb_crt = &sm501fb_pdata_crt,
1573 .fb_pnl = &sm501fb_pdata_pnl,
1574 };
1575
1576 static char driver_name_crt[] = "sm501fb-crt";
1577 static char driver_name_pnl[] = "sm501fb-panel";
1578
1579 static int __init sm501fb_probe(struct platform_device *pdev)
1580 {
1581 struct sm501fb_info *info;
1582 struct device *dev = &pdev->dev;
1583 struct fb_info *fbinfo_crt;
1584 struct fb_info *fbinfo_pnl;
1585 int ret;
1586
1587 /* allocate our framebuffers */
1588
1589 fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1590 if (fbinfo_crt == NULL) {
1591 dev_err(dev, "cannot allocate crt framebuffer\n");
1592 return -ENOMEM;
1593 }
1594
1595 fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1596 if (fbinfo_pnl == NULL) {
1597 dev_err(dev, "cannot allocate panel framebuffer\n");
1598 ret = -ENOMEM;
1599 goto fbinfo_crt_alloc_fail;
1600 }
1601
1602 info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1603 if (info == NULL) {
1604 dev_err(dev, "cannot allocate par\n");
1605 ret = -ENOMEM;
1606 goto sm501fb_alloc_fail;
1607 }
1608
1609 if (dev->parent->platform_data) {
1610 struct sm501_platdata *pd = dev->parent->platform_data;
1611 info->pdata = pd->fb;
1612 }
1613
1614 if (info->pdata == NULL) {
1615 dev_info(dev, "using default configuration data\n");
1616 info->pdata = &sm501fb_def_pdata;
1617 }
1618
1619 /* start the framebuffers */
1620
1621 ret = sm501fb_start(info, pdev);
1622 if (ret) {
1623 dev_err(dev, "cannot initialise SM501\n");
1624 goto sm501fb_start_fail;
1625 }
1626
1627 /* CRT framebuffer setup */
1628
1629 ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1630 if (ret) {
1631 dev_err(dev, "cannot initialise CRT fb\n");
1632 goto sm501fb_start_fail;
1633 }
1634
1635 /* Panel framebuffer setup */
1636
1637 ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1638 if (ret) {
1639 dev_err(dev, "cannot initialise Panel fb\n");
1640 goto sm501fb_start_fail;
1641 }
1642
1643 /* register framebuffers */
1644
1645 ret = register_framebuffer(fbinfo_crt);
1646 if (ret < 0) {
1647 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1648 goto register_crt_fail;
1649 }
1650
1651 ret = register_framebuffer(fbinfo_pnl);
1652 if (ret < 0) {
1653 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1654 goto register_pnl_fail;
1655 }
1656
1657 dev_info(dev, "fb%d: %s frame buffer device\n",
1658 fbinfo_crt->node, fbinfo_crt->fix.id);
1659
1660 dev_info(dev, "fb%d: %s frame buffer device\n",
1661 fbinfo_pnl->node, fbinfo_pnl->fix.id);
1662
1663 /* create device files */
1664
1665 ret = device_create_file(dev, &dev_attr_crt_src);
1666 if (ret)
1667 goto crtsrc_fail;
1668
1669 ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1670 if (ret)
1671 goto fbregs_pnl_fail;
1672
1673 ret = device_create_file(dev, &dev_attr_fbregs_crt);
1674 if (ret)
1675 goto fbregs_crt_fail;
1676
1677 /* we registered, return ok */
1678 return 0;
1679
1680 fbregs_crt_fail:
1681 device_remove_file(dev, &dev_attr_fbregs_pnl);
1682
1683 fbregs_pnl_fail:
1684 device_remove_file(dev, &dev_attr_crt_src);
1685
1686 crtsrc_fail:
1687 unregister_framebuffer(fbinfo_pnl);
1688
1689 register_pnl_fail:
1690 unregister_framebuffer(fbinfo_crt);
1691
1692 register_crt_fail:
1693 sm501fb_stop(info);
1694
1695 sm501fb_start_fail:
1696 sm501fb_info_release(info);
1697
1698 sm501fb_alloc_fail:
1699 framebuffer_release(fbinfo_pnl);
1700
1701 fbinfo_crt_alloc_fail:
1702 framebuffer_release(fbinfo_crt);
1703
1704 return ret;
1705 }
1706
1707
1708 /*
1709 * Cleanup
1710 */
1711 static int sm501fb_remove(struct platform_device *pdev)
1712 {
1713 struct sm501fb_info *info = platform_get_drvdata(pdev);
1714 struct fb_info *fbinfo_crt = info->fb[0];
1715 struct fb_info *fbinfo_pnl = info->fb[1];
1716
1717 device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1718 device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1719 device_remove_file(&pdev->dev, &dev_attr_crt_src);
1720
1721 unregister_framebuffer(fbinfo_crt);
1722 unregister_framebuffer(fbinfo_pnl);
1723
1724 sm501fb_stop(info);
1725 sm501fb_info_release(info);
1726
1727 framebuffer_release(fbinfo_pnl);
1728 framebuffer_release(fbinfo_crt);
1729
1730 return 0;
1731 }
1732
1733 #ifdef CONFIG_PM
1734
1735 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1736 enum sm501_controller head)
1737 {
1738 struct fb_info *fbi = info->fb[head];
1739 struct sm501fb_par *par = fbi->par;
1740
1741 if (par->screen.size == 0)
1742 return 0;
1743
1744 /* blank the relevant interface to ensure unit power minimised */
1745 (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1746
1747 /* tell console/fb driver we are suspending */
1748
1749 acquire_console_sem();
1750 fb_set_suspend(fbi, 1);
1751 release_console_sem();
1752
1753 /* backup copies in case chip is powered down over suspend */
1754
1755 par->store_fb = vmalloc(par->screen.size);
1756 if (par->store_fb == NULL) {
1757 dev_err(info->dev, "no memory to store screen\n");
1758 return -ENOMEM;
1759 }
1760
1761 par->store_cursor = vmalloc(par->cursor.size);
1762 if (par->store_cursor == NULL) {
1763 dev_err(info->dev, "no memory to store cursor\n");
1764 goto err_nocursor;
1765 }
1766
1767 dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1768 dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1769
1770 memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1771 memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1772
1773 return 0;
1774
1775 err_nocursor:
1776 vfree(par->store_fb);
1777 par->store_fb = NULL;
1778
1779 return -ENOMEM;
1780 }
1781
1782 static void sm501fb_resume_fb(struct sm501fb_info *info,
1783 enum sm501_controller head)
1784 {
1785 struct fb_info *fbi = info->fb[head];
1786 struct sm501fb_par *par = fbi->par;
1787
1788 if (par->screen.size == 0)
1789 return;
1790
1791 /* re-activate the configuration */
1792
1793 (par->ops.fb_set_par)(fbi);
1794
1795 /* restore the data */
1796
1797 dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1798 dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1799
1800 if (par->store_fb)
1801 memcpy_toio(par->screen.k_addr, par->store_fb,
1802 par->screen.size);
1803
1804 if (par->store_cursor)
1805 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1806 par->cursor.size);
1807
1808 acquire_console_sem();
1809 fb_set_suspend(fbi, 0);
1810 release_console_sem();
1811
1812 vfree(par->store_fb);
1813 vfree(par->store_cursor);
1814 }
1815
1816
1817 /* suspend and resume support */
1818
1819 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1820 {
1821 struct sm501fb_info *info = platform_get_drvdata(pdev);
1822
1823 /* store crt control to resume with */
1824 info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1825
1826 sm501fb_suspend_fb(info, HEAD_CRT);
1827 sm501fb_suspend_fb(info, HEAD_PANEL);
1828
1829 /* turn off the clocks, in case the device is not powered down */
1830 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1831
1832 return 0;
1833 }
1834
1835 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP | \
1836 SM501_DC_CRT_CONTROL_SEL)
1837
1838
1839 static int sm501fb_resume(struct platform_device *pdev)
1840 {
1841 struct sm501fb_info *info = platform_get_drvdata(pdev);
1842 unsigned long crt_ctrl;
1843
1844 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1845
1846 /* restore the items we want to be saved for crt control */
1847
1848 crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1849 crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1850 crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1851 writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1852
1853 sm501fb_resume_fb(info, HEAD_CRT);
1854 sm501fb_resume_fb(info, HEAD_PANEL);
1855
1856 return 0;
1857 }
1858
1859 #else
1860 #define sm501fb_suspend NULL
1861 #define sm501fb_resume NULL
1862 #endif
1863
1864 static struct platform_driver sm501fb_driver = {
1865 .probe = sm501fb_probe,
1866 .remove = sm501fb_remove,
1867 .suspend = sm501fb_suspend,
1868 .resume = sm501fb_resume,
1869 .driver = {
1870 .name = "sm501-fb",
1871 .owner = THIS_MODULE,
1872 },
1873 };
1874
1875 static int __devinit sm501fb_init(void)
1876 {
1877 return platform_driver_register(&sm501fb_driver);
1878 }
1879
1880 static void __exit sm501fb_cleanup(void)
1881 {
1882 platform_driver_unregister(&sm501fb_driver);
1883 }
1884
1885 module_init(sm501fb_init);
1886 module_exit(sm501fb_cleanup);
1887
1888 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1889 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1890 MODULE_LICENSE("GPL v2");
WRT350N Kernel Patches