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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / video / pvr2fb.c
blob4f1edf90a18428d563486dbb60b18ce8f08bf298
1 <<<<<<< HEAD:drivers/video/pvr2fb.c
2 /* drivers/video/pvr2fb.c
3 =======
4 /*
5 * drivers/video/pvr2fb.c
6 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/pvr2fb.c
7 *
8 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
9 * Dreamcast.
10 *
11 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
12 <<<<<<< HEAD:drivers/video/pvr2fb.c
13 * Copyright (c) 2001, 2002, 2003, 2004, 2005 Paul Mundt <lethal@linux-sh.org>
14 *
15 * This file is part of the LinuxDC project (linuxdc.sourceforge.net).
16 =======
17 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
18 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/pvr2fb.c
19 *
20 <<<<<<< HEAD:drivers/video/pvr2fb.c
21 */
22
23 /*
24 =======
25 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/pvr2fb.c
26 * This driver is mostly based on the excellent amifb and vfb sources. It uses
27 * an odd scheme for converting hardware values to/from framebuffer values,
28 * here are some hacked-up formulas:
29 *
30 * The Dreamcast has screen offsets from each side of its four borders and
31 * the start offsets of the display window. I used these values to calculate
32 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
33 * that when it came time to convert these values back into their hardware
34 * values, I could just add mode- specific offsets to get the correct mode
35 * settings:
36 *
37 * left_margin = diwstart_h - borderstart_h;
38 * right_margin = borderstop_h - (diwstart_h + xres);
39 * upper_margin = diwstart_v - borderstart_v;
40 * lower_margin = borderstop_v - (diwstart_h + yres);
41 *
42 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
43 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
44 *
45 * Then, when it's time to convert back to hardware settings, the only
46 * constants are the borderstart_* offsets, all other values are derived from
47 * the fb video mode:
48 *
49 * // PAL
50 * borderstart_h = 116;
51 * borderstart_v = 44;
52 * ...
53 * borderstop_h = borderstart_h + hsync_total - hsync_len;
54 * ...
55 * diwstart_v = borderstart_v - upper_margin;
56 *
57 * However, in the current implementation, the borderstart values haven't had
58 * the benefit of being fully researched, so some modes may be broken.
59 */
60
61 #undef DEBUG
62
63 #include <linux/module.h>
64 #include <linux/kernel.h>
65 #include <linux/errno.h>
66 #include <linux/string.h>
67 #include <linux/mm.h>
68 #include <linux/slab.h>
69 #include <linux/delay.h>
70 #include <linux/interrupt.h>
71 #include <linux/fb.h>
72 #include <linux/init.h>
73 #include <linux/pci.h>
74
75 #ifdef CONFIG_SH_DREAMCAST
76 #include <asm/machvec.h>
77 #include <asm/mach/sysasic.h>
78 #endif
79
80 #ifdef CONFIG_SH_DMA
81 #include <linux/pagemap.h>
82 #include <asm/mach/dma.h>
83 #include <asm/dma.h>
84 #endif
85
86 #ifdef CONFIG_SH_STORE_QUEUES
87 #include <linux/uaccess.h>
88 #include <asm/cpu/sq.h>
89 #endif
90
91 #ifndef PCI_DEVICE_ID_NEC_NEON250
92 # define PCI_DEVICE_ID_NEC_NEON250 0x0067
93 #endif
94
95 /* 2D video registers */
96 #define DISP_BASE par->mmio_base
97 #define DISP_BRDRCOLR (DISP_BASE + 0x40)
98 #define DISP_DIWMODE (DISP_BASE + 0x44)
99 #define DISP_DIWADDRL (DISP_BASE + 0x50)
100 #define DISP_DIWADDRS (DISP_BASE + 0x54)
101 #define DISP_DIWSIZE (DISP_BASE + 0x5c)
102 #define DISP_SYNCCONF (DISP_BASE + 0xd0)
103 #define DISP_BRDRHORZ (DISP_BASE + 0xd4)
104 #define DISP_SYNCSIZE (DISP_BASE + 0xd8)
105 #define DISP_BRDRVERT (DISP_BASE + 0xdc)
106 #define DISP_DIWCONF (DISP_BASE + 0xe8)
107 #define DISP_DIWHSTRT (DISP_BASE + 0xec)
108 #define DISP_DIWVSTRT (DISP_BASE + 0xf0)
109 #define DISP_PIXDEPTH (DISP_BASE + 0x108)
110
111 /* Pixel clocks, one for TV output, doubled for VGA output */
112 #define TV_CLK 74239
113 #define VGA_CLK 37119
114
115 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
116 #define PAL_HTOTAL 863
117 #define PAL_VTOTAL 312
118 #define NTSC_HTOTAL 857
119 #define NTSC_VTOTAL 262
120
121 /* Supported cable types */
122 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
123
124 /* Supported video output types */
125 enum { VO_PAL, VO_NTSC, VO_VGA };
126
127 /* Supported palette types */
128 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
129
130 struct pvr2_params { unsigned int val; char *name; };
131 static struct pvr2_params cables[] __devinitdata = {
132 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
133 };
134
135 static struct pvr2_params outputs[] __devinitdata = {
136 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
137 };
138
139 /*
140 * This describes the current video mode
141 */
142
143 static struct pvr2fb_par {
144 unsigned int hsync_total; /* Clocks/line */
145 unsigned int vsync_total; /* Lines/field */
146 unsigned int borderstart_h;
147 unsigned int borderstop_h;
148 unsigned int borderstart_v;
149 unsigned int borderstop_v;
150 unsigned int diwstart_h; /* Horizontal offset of the display field */
151 unsigned int diwstart_v; /* Vertical offset of the display field, for
152 interlaced modes, this is the long field */
153 unsigned long disp_start; /* Address of image within VRAM */
154 unsigned char is_interlaced; /* Is the display interlaced? */
155 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
156 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
157
158 unsigned long mmio_base; /* MMIO base */
159 u32 palette[16];
160 } *currentpar;
161
162 static struct fb_info *fb_info;
163
164 static struct fb_fix_screeninfo pvr2_fix __devinitdata = {
165 .id = "NEC PowerVR2",
166 .type = FB_TYPE_PACKED_PIXELS,
167 .visual = FB_VISUAL_TRUECOLOR,
168 .ypanstep = 1,
169 .ywrapstep = 1,
170 .accel = FB_ACCEL_NONE,
171 };
172
173 static struct fb_var_screeninfo pvr2_var __devinitdata = {
174 .xres = 640,
175 .yres = 480,
176 .xres_virtual = 640,
177 .yres_virtual = 480,
178 .bits_per_pixel =16,
179 .red = { 11, 5, 0 },
180 .green = { 5, 6, 0 },
181 .blue = { 0, 5, 0 },
182 .activate = FB_ACTIVATE_NOW,
183 .height = -1,
184 .width = -1,
185 .vmode = FB_VMODE_NONINTERLACED,
186 };
187
188 static int cable_type = CT_VGA;
189 static int video_output = VO_VGA;
190
191 static int nopan = 0;
192 static int nowrap = 1;
193
194 /*
195 * We do all updating, blanking, etc. during the vertical retrace period
196 */
197 static unsigned int do_vmode_full = 0; /* Change the video mode */
198 static unsigned int do_vmode_pan = 0; /* Update the video mode */
199 static short do_blank = 0; /* (Un)Blank the screen */
200
201 static unsigned int is_blanked = 0; /* Is the screen blanked? */
202
203 #ifdef CONFIG_SH_STORE_QUEUES
204 static unsigned long pvr2fb_map;
205 #endif
206
207 #ifdef CONFIG_SH_DMA
208 static unsigned int shdma = PVR2_CASCADE_CHAN;
209 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
210 #endif
211
212 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue,
213 unsigned int transp, struct fb_info *info);
214 static int pvr2fb_blank(int blank, struct fb_info *info);
215 static unsigned long get_line_length(int xres_virtual, int bpp);
216 static void set_color_bitfields(struct fb_var_screeninfo *var);
217 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
218 static int pvr2fb_set_par(struct fb_info *info);
219 static void pvr2_update_display(struct fb_info *info);
220 static void pvr2_init_display(struct fb_info *info);
221 static void pvr2_do_blank(void);
222 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id);
223 static int pvr2_init_cable(void);
224 static int pvr2_get_param(const struct pvr2_params *p, const char *s,
225 int val, int size);
226 #ifdef CONFIG_SH_DMA
227 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
228 size_t count, loff_t *ppos);
229 #endif
230
231 static struct fb_ops pvr2fb_ops = {
232 .owner = THIS_MODULE,
233 .fb_setcolreg = pvr2fb_setcolreg,
234 .fb_blank = pvr2fb_blank,
235 .fb_check_var = pvr2fb_check_var,
236 .fb_set_par = pvr2fb_set_par,
237 #ifdef CONFIG_SH_DMA
238 .fb_write = pvr2fb_write,
239 #endif
240 .fb_fillrect = cfb_fillrect,
241 .fb_copyarea = cfb_copyarea,
242 .fb_imageblit = cfb_imageblit,
243 };
244
245 static struct fb_videomode pvr2_modedb[] __devinitdata = {
246 /*
247 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
248 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
249 * NTSC, so it shouldn't be a problem (I hope).
250 */
251
252 {
253 /* 640x480 @ 60Hz interlaced (NTSC) */
254 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
255 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
256 }, {
257 /* 640x240 @ 60Hz (NTSC) */
258 /* XXX: Broken! Don't use... */
259 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
260 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
261 }, {
262 /* 640x480 @ 60hz (VGA) */
263 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
264 0, FB_VMODE_YWRAP
265 },
266 };
267
268 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
269
270 #define DEFMODE_NTSC 0
271 #define DEFMODE_PAL 0
272 #define DEFMODE_VGA 2
273
274 static int defmode = DEFMODE_NTSC;
275 static char *mode_option __devinitdata = NULL;
276
277 static inline void pvr2fb_set_pal_type(unsigned int type)
278 {
279 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
280
281 fb_writel(type, par->mmio_base + 0x108);
282 }
283
284 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
285 unsigned int regno,
286 unsigned int val)
287 {
288 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
289 }
290
291 static int pvr2fb_blank(int blank, struct fb_info *info)
292 {
293 do_blank = blank ? blank : -1;
294 return 0;
295 }
296
297 static inline unsigned long get_line_length(int xres_virtual, int bpp)
298 {
299 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
300 }
301
302 static void set_color_bitfields(struct fb_var_screeninfo *var)
303 {
304 switch (var->bits_per_pixel) {
305 case 16: /* RGB 565 */
306 pvr2fb_set_pal_type(PAL_RGB565);
307 var->red.offset = 11; var->red.length = 5;
308 var->green.offset = 5; var->green.length = 6;
309 var->blue.offset = 0; var->blue.length = 5;
310 var->transp.offset = 0; var->transp.length = 0;
311 break;
312 case 24: /* RGB 888 */
313 var->red.offset = 16; var->red.length = 8;
314 var->green.offset = 8; var->green.length = 8;
315 var->blue.offset = 0; var->blue.length = 8;
316 var->transp.offset = 0; var->transp.length = 0;
317 break;
318 case 32: /* ARGB 8888 */
319 pvr2fb_set_pal_type(PAL_ARGB8888);
320 var->red.offset = 16; var->red.length = 8;
321 var->green.offset = 8; var->green.length = 8;
322 var->blue.offset = 0; var->blue.length = 8;
323 var->transp.offset = 24; var->transp.length = 8;
324 break;
325 }
326 }
327
328 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
329 unsigned int green, unsigned int blue,
330 unsigned int transp, struct fb_info *info)
331 {
332 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
333 unsigned int tmp;
334
335 if (regno > info->cmap.len)
336 return 1;
337
338 /*
339 * We only support the hardware palette for 16 and 32bpp. It's also
340 * expected that the palette format has been set by the time we get
341 * here, so we don't waste time setting it again.
342 */
343 switch (info->var.bits_per_pixel) {
344 case 16: /* RGB 565 */
345 tmp = (red & 0xf800) |
346 ((green & 0xfc00) >> 5) |
347 ((blue & 0xf800) >> 11);
348
349 pvr2fb_set_pal_entry(par, regno, tmp);
350 break;
351 case 24: /* RGB 888 */
352 red >>= 8; green >>= 8; blue >>= 8;
353 tmp = (red << 16) | (green << 8) | blue;
354 break;
355 case 32: /* ARGB 8888 */
356 red >>= 8; green >>= 8; blue >>= 8;
357 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
358
359 pvr2fb_set_pal_entry(par, regno, tmp);
360 break;
361 default:
362 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
363 return 1;
364 }
365
366 if (regno < 16)
367 ((u32*)(info->pseudo_palette))[regno] = tmp;
368
369 return 0;
370 }
371
372 static int pvr2fb_set_par(struct fb_info *info)
373 {
374 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
375 struct fb_var_screeninfo *var = &info->var;
376 unsigned long line_length;
377 unsigned int vtotal;
378
379 /*
380 * XXX: It's possible that a user could use a VGA box, change the cable
381 * type in hardware (i.e. switch from VGA<->composite), then change
382 * modes (i.e. switching to another VT). If that happens we should
383 * automagically change the output format to cope, but currently I
384 * don't have a VGA box to make sure this works properly.
385 */
386 cable_type = pvr2_init_cable();
387 if (cable_type == CT_VGA && video_output != VO_VGA)
388 video_output = VO_VGA;
389
390 var->vmode &= FB_VMODE_MASK;
391 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
392 par->is_interlaced = 1;
393 /*
394 * XXX: Need to be more creative with this (i.e. allow doublecan for
395 * PAL/NTSC output).
396 */
397 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
398 par->is_doublescan = 1;
399
400 par->hsync_total = var->left_margin + var->xres + var->right_margin +
401 var->hsync_len;
402 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
403 var->vsync_len;
404
405 if (var->sync & FB_SYNC_BROADCAST) {
406 vtotal = par->vsync_total;
407 if (par->is_interlaced)
408 vtotal /= 2;
409 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
410 /* XXX: Check for start values here... */
411 /* XXX: Check hardware for PAL-compatibility */
412 par->borderstart_h = 116;
413 par->borderstart_v = 44;
414 } else {
415 /* NTSC video output */
416 par->borderstart_h = 126;
417 par->borderstart_v = 18;
418 }
419 } else {
420 /* VGA mode */
421 /* XXX: What else needs to be checked? */
422 /*
423 * XXX: We have a little freedom in VGA modes, what ranges
424 * should be here (i.e. hsync/vsync totals, etc.)?
425 */
426 par->borderstart_h = 126;
427 par->borderstart_v = 40;
428 }
429
430 /* Calculate the remainding offsets */
431 par->diwstart_h = par->borderstart_h + var->left_margin;
432 par->diwstart_v = par->borderstart_v + var->upper_margin;
433 par->borderstop_h = par->diwstart_h + var->xres +
434 var->right_margin;
435 par->borderstop_v = par->diwstart_v + var->yres +
436 var->lower_margin;
437
438 if (!par->is_interlaced)
439 par->borderstop_v /= 2;
440 if (info->var.xres < 640)
441 par->is_lowres = 1;
442
443 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
444 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
445 info->fix.line_length = line_length;
446 return 0;
447 }
448
449 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
450 {
451 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
452 unsigned int vtotal, hsync_total;
453 unsigned long line_length;
454
455 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
456 pr_debug("Invalid pixclock value %d\n", var->pixclock);
457 return -EINVAL;
458 }
459
460 if (var->xres < 320)
461 var->xres = 320;
462 if (var->yres < 240)
463 var->yres = 240;
464 if (var->xres_virtual < var->xres)
465 var->xres_virtual = var->xres;
466 if (var->yres_virtual < var->yres)
467 var->yres_virtual = var->yres;
468
469 if (var->bits_per_pixel <= 16)
470 var->bits_per_pixel = 16;
471 else if (var->bits_per_pixel <= 24)
472 var->bits_per_pixel = 24;
473 else if (var->bits_per_pixel <= 32)
474 var->bits_per_pixel = 32;
475
476 set_color_bitfields(var);
477
478 if (var->vmode & FB_VMODE_YWRAP) {
479 if (var->xoffset || var->yoffset < 0 ||
480 var->yoffset >= var->yres_virtual) {
481 var->xoffset = var->yoffset = 0;
482 } else {
483 if (var->xoffset > var->xres_virtual - var->xres ||
484 var->yoffset > var->yres_virtual - var->yres ||
485 var->xoffset < 0 || var->yoffset < 0)
486 var->xoffset = var->yoffset = 0;
487 }
488 } else {
489 var->xoffset = var->yoffset = 0;
490 }
491
492 /*
493 * XXX: Need to be more creative with this (i.e. allow doublecan for
494 * PAL/NTSC output).
495 */
496 if (var->yres < 480 && video_output == VO_VGA)
497 var->vmode |= FB_VMODE_DOUBLE;
498
499 if (video_output != VO_VGA) {
500 var->sync |= FB_SYNC_BROADCAST;
501 var->vmode |= FB_VMODE_INTERLACED;
502 } else {
503 var->sync &= ~FB_SYNC_BROADCAST;
504 var->vmode &= ~FB_VMODE_INTERLACED;
505 <<<<<<< HEAD:drivers/video/pvr2fb.c
506 var->vmode |= pvr2_var.vmode;
507 =======
508 var->vmode |= FB_VMODE_NONINTERLACED;
509 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/video/pvr2fb.c
510 }
511
512 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
513 var->right_margin = par->borderstop_h -
514 (par->diwstart_h + var->xres);
515 var->left_margin = par->diwstart_h - par->borderstart_h;
516 var->hsync_len = par->borderstart_h +
517 (par->hsync_total - par->borderstop_h);
518
519 var->upper_margin = par->diwstart_v - par->borderstart_v;
520 var->lower_margin = par->borderstop_v -
521 (par->diwstart_v + var->yres);
522 var->vsync_len = par->borderstop_v +
523 (par->vsync_total - par->borderstop_v);
524 }
525
526 hsync_total = var->left_margin + var->xres + var->right_margin +
527 var->hsync_len;
528 vtotal = var->upper_margin + var->yres + var->lower_margin +
529 var->vsync_len;
530
531 if (var->sync & FB_SYNC_BROADCAST) {
532 if (var->vmode & FB_VMODE_INTERLACED)
533 vtotal /= 2;
534 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
535 /* PAL video output */
536 /* XXX: Should be using a range here ... ? */
537 if (hsync_total != PAL_HTOTAL) {
538 pr_debug("invalid hsync total for PAL\n");
539 return -EINVAL;
540 }
541 } else {
542 /* NTSC video output */
543 if (hsync_total != NTSC_HTOTAL) {
544 pr_debug("invalid hsync total for NTSC\n");
545 return -EINVAL;
546 }
547 }
548 }
549
550 /* Check memory sizes */
551 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
552 if (line_length * var->yres_virtual > info->fix.smem_len)
553 return -ENOMEM;
554
555 return 0;
556 }
557
558 static void pvr2_update_display(struct fb_info *info)
559 {
560 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
561 struct fb_var_screeninfo *var = &info->var;
562
563 /* Update the start address of the display image */
564 fb_writel(par->disp_start, DISP_DIWADDRL);
565 fb_writel(par->disp_start +
566 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
567 DISP_DIWADDRS);
568 }
569
570 /*
571 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
572 * very stable. It's probably due to the fact that a lot of the 2D video
573 * registers are still undocumented.
574 */
575
576 static void pvr2_init_display(struct fb_info *info)
577 {
578 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
579 struct fb_var_screeninfo *var = &info->var;
580 unsigned int diw_height, diw_width, diw_modulo = 1;
581 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
582
583 /* hsync and vsync totals */
584 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
585
586 /* column height, modulo, row width */
587 /* since we're "panning" within vram, we need to offset things based
588 * on the offset from the virtual x start to our real gfx. */
589 if (video_output != VO_VGA && par->is_interlaced)
590 diw_modulo += info->fix.line_length / 4;
591 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
592 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
593 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
594 DISP_DIWSIZE);
595
596 /* display address, long and short fields */
597 fb_writel(par->disp_start, DISP_DIWADDRL);
598 fb_writel(par->disp_start +
599 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
600 DISP_DIWADDRS);
601
602 /* border horizontal, border vertical, border color */
603 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
604 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
605 fb_writel(0, DISP_BRDRCOLR);
606
607 /* display window start position */
608 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
609 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
610
611 /* misc. settings */
612 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
613
614 /* clock doubler (for VGA), scan doubler, display enable */
615 fb_writel(((video_output == VO_VGA) << 23) |
616 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
617
618 /* bits per pixel */
619 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
620 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH);
621
622 /* video enable, color sync, interlace,
623 * hsync and vsync polarity (currently unused) */
624 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
625 }
626
627 /* Simulate blanking by making the border cover the entire screen */
628
629 #define BLANK_BIT (1<<3)
630
631 static void pvr2_do_blank(void)
632 {
633 struct pvr2fb_par *par = currentpar;
634 unsigned long diwconf;
635
636 diwconf = fb_readl(DISP_DIWCONF);
637 if (do_blank > 0)
638 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
639 else
640 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
641
642 is_blanked = do_blank > 0 ? do_blank : 0;
643 }
644
645 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id)
646 {
647 struct fb_info *info = dev_id;
648
649 if (do_vmode_pan || do_vmode_full)
650 pvr2_update_display(info);
651 if (do_vmode_full)
652 pvr2_init_display(info);
653 if (do_vmode_pan)
654 do_vmode_pan = 0;
655 if (do_vmode_full)
656 do_vmode_full = 0;
657 if (do_blank) {
658 pvr2_do_blank();
659 do_blank = 0;
660 }
661 return IRQ_HANDLED;
662 }
663
664 /*
665 * Determine the cable type and initialize the cable output format. Don't do
666 * anything if the cable type has been overidden (via "cable:XX").
667 */
668
669 #define PCTRA 0xff80002c
670 #define PDTRA 0xff800030
671 #define VOUTC 0xa0702c00
672
673 static int pvr2_init_cable(void)
674 {
675 if (cable_type < 0) {
676 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
677 PCTRA);
678 cable_type = (fb_readw(PDTRA) >> 8) & 3;
679 }
680
681 /* Now select the output format (either composite or other) */
682 /* XXX: Save the previous val first, as this reg is also AICA
683 related */
684 if (cable_type == CT_COMPOSITE)
685 fb_writel(3 << 8, VOUTC);
686 else if (cable_type == CT_RGB)
687 fb_writel(1 << 9, VOUTC);
688 else
689 fb_writel(0, VOUTC);
690
691 return cable_type;
692 }
693
694 #ifdef CONFIG_SH_DMA
695 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
696 size_t count, loff_t *ppos)
697 {
698 unsigned long dst, start, end, len;
699 unsigned int nr_pages;
700 struct page **pages;
701 int ret, i;
702
703 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
704
705 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
706 if (!pages)
707 return -ENOMEM;
708
709 down_read(&current->mm->mmap_sem);
710 ret = get_user_pages(current, current->mm, (unsigned long)buf,
711 nr_pages, WRITE, 0, pages, NULL);
712 up_read(&current->mm->mmap_sem);
713
714 if (ret < nr_pages) {
715 nr_pages = ret;
716 ret = -EINVAL;
717 goto out_unmap;
718 }
719
720 dma_configure_channel(shdma, 0x12c1);
721
722 dst = (unsigned long)fb_info->screen_base + *ppos;
723 start = (unsigned long)page_address(pages[0]);
724 end = (unsigned long)page_address(pages[nr_pages]);
725 len = nr_pages << PAGE_SHIFT;
726
727 /* Half-assed contig check */
728 if (start + len == end) {
729 /* As we do this in one shot, it's either all or nothing.. */
730 if ((*ppos + len) > fb_info->fix.smem_len) {
731 ret = -ENOSPC;
732 goto out_unmap;
733 }
734
735 dma_write(shdma, start, 0, len);
736 dma_write(pvr2dma, 0, dst, len);
737 dma_wait_for_completion(pvr2dma);
738
739 goto out;
740 }
741
742 /* Not contiguous, writeout per-page instead.. */
743 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
744 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
745 ret = -ENOSPC;
746 goto out_unmap;
747 }
748
749 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
750 dma_write_page(pvr2dma, 0, dst);
751 dma_wait_for_completion(pvr2dma);
752 }
753
754 out:
755 *ppos += count;
756 ret = count;
757
758 out_unmap:
759 for (i = 0; i < nr_pages; i++)
760 page_cache_release(pages[i]);
761
762 kfree(pages);
763
764 return ret;
765 }
766 #endif /* CONFIG_SH_DMA */
767
768 /**
769 * pvr2fb_common_init
770 *
771 * Common init code for the PVR2 chips.
772 *
773 * This mostly takes care of the common aspects of the fb setup and
774 * registration. It's expected that the board-specific init code has
775 * already setup pvr2_fix with something meaningful at this point.
776 *
777 * Device info reporting is also done here, as well as picking a sane
778 * default from the modedb. For board-specific modelines, simply define
779 * a per-board modedb.
780 *
781 * Also worth noting is that the cable and video output types are likely
782 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
783 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
784 * PCI-based version of these things ;-)
785 */
786 static int __devinit pvr2fb_common_init(void)
787 {
788 struct pvr2fb_par *par = currentpar;
789 unsigned long modememused, rev;
790
791 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
792 pvr2_fix.smem_len);
793
794 if (!fb_info->screen_base) {
795 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
796 goto out_err;
797 }
798
799 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
800 pvr2_fix.mmio_len);
801 if (!par->mmio_base) {
802 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
803 goto out_err;
804 }
805
806 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
807
808 pvr2_fix.ypanstep = nopan ? 0 : 1;
809 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
810
811 fb_info->fbops = &pvr2fb_ops;
812 fb_info->fix = pvr2_fix;
813 fb_info->par = currentpar;
814 fb_info->pseudo_palette = currentpar->palette;
815 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
816
817 if (video_output == VO_VGA)
818 defmode = DEFMODE_VGA;
819
820 if (!mode_option)
821 mode_option = "640x480@60";
822
823 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
824 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
825 fb_info->var = pvr2_var;
826
827 fb_alloc_cmap(&fb_info->cmap, 256, 0);
828
829 if (register_framebuffer(fb_info) < 0)
830 goto out_err;
831 /*Must write PIXDEPTH to register before anything is displayed - so force init */
832 pvr2_init_display(fb_info);
833
834 modememused = get_line_length(fb_info->var.xres_virtual,
835 fb_info->var.bits_per_pixel);
836 modememused *= fb_info->var.yres_virtual;
837
838 rev = fb_readl(par->mmio_base + 0x04);
839
840 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
841 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
842 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
843 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
844 fb_info->node, fb_info->var.xres, fb_info->var.yres,
845 fb_info->var.bits_per_pixel,
846 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
847 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
848 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
849
850 #ifdef CONFIG_SH_STORE_QUEUES
851 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
852
853 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
854 fb_info->fix.id, pgprot_val(PAGE_SHARED));
855
856 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
857 fb_info->node, pvr2fb_map);
858 #endif
859
860 return 0;
861
862 out_err:
863 if (fb_info->screen_base)
864 iounmap(fb_info->screen_base);
865 if (par->mmio_base)
866 iounmap((void *)par->mmio_base);
867
868 return -ENXIO;
869 }
870
871 #ifdef CONFIG_SH_DREAMCAST
872 static int __init pvr2fb_dc_init(void)
873 {
874 if (!mach_is_dreamcast())
875 return -ENXIO;
876
877 /* Make a guess at the monitor based on the attached cable */
878 if (pvr2_init_cable() == CT_VGA) {
879 fb_info->monspecs.hfmin = 30000;
880 fb_info->monspecs.hfmax = 70000;
881 fb_info->monspecs.vfmin = 60;
882 fb_info->monspecs.vfmax = 60;
883 } else {
884 /* Not VGA, using a TV (taken from acornfb) */
885 fb_info->monspecs.hfmin = 15469;
886 fb_info->monspecs.hfmax = 15781;
887 fb_info->monspecs.vfmin = 49;
888 fb_info->monspecs.vfmax = 51;
889 }
890
891 /*
892 * XXX: This needs to pull default video output via BIOS or other means
893 */
894 if (video_output < 0) {
895 if (cable_type == CT_VGA) {
896 video_output = VO_VGA;
897 } else {
898 video_output = VO_NTSC;
899 }
900 }
901
902 /*
903 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
904 */
905 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
906 pvr2_fix.smem_len = 8 << 20;
907
908 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
909 pvr2_fix.mmio_len = 0x2000;
910
911 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED,
912 "pvr2 VBL handler", fb_info)) {
913 return -EBUSY;
914 }
915
916 #ifdef CONFIG_SH_DMA
917 if (request_dma(pvr2dma, "pvr2") != 0) {
918 free_irq(HW_EVENT_VSYNC, 0);
919 return -EBUSY;
920 }
921 #endif
922
923 return pvr2fb_common_init();
924 }
925
926 static void __exit pvr2fb_dc_exit(void)
927 {
928 if (fb_info->screen_base) {
929 iounmap(fb_info->screen_base);
930 fb_info->screen_base = NULL;
931 }
932 if (currentpar->mmio_base) {
933 iounmap((void *)currentpar->mmio_base);
934 currentpar->mmio_base = 0;
935 }
936
937 free_irq(HW_EVENT_VSYNC, 0);
938 #ifdef CONFIG_SH_DMA
939 free_dma(pvr2dma);
940 #endif
941 }
942 #endif /* CONFIG_SH_DREAMCAST */
943
944 #ifdef CONFIG_PCI
945 static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev,
946 const struct pci_device_id *ent)
947 {
948 int ret;
949
950 ret = pci_enable_device(pdev);
951 if (ret) {
952 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
953 return ret;
954 }
955
956 ret = pci_request_regions(pdev, "pvr2fb");
957 if (ret) {
958 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
959 return ret;
960 }
961
962 /*
963 * Slightly more exciting than the DC PVR2 .. 16MiB!
964 */
965 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
966 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
967
968 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
969 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
970
971 fb_info->device = &pdev->dev;
972
973 return pvr2fb_common_init();
974 }
975
976 static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev)
977 {
978 if (fb_info->screen_base) {
979 iounmap(fb_info->screen_base);
980 fb_info->screen_base = NULL;
981 }
982 if (currentpar->mmio_base) {
983 iounmap((void *)currentpar->mmio_base);
984 currentpar->mmio_base = 0;
985 }
986
987 pci_release_regions(pdev);
988 }
989
990 static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = {
991 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
992 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
993 { 0, },
994 };
995
996 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
997
998 static struct pci_driver pvr2fb_pci_driver = {
999 .name = "pvr2fb",
1000 .id_table = pvr2fb_pci_tbl,
1001 .probe = pvr2fb_pci_probe,
1002 .remove = __devexit_p(pvr2fb_pci_remove),
1003 };
1004
1005 static int __init pvr2fb_pci_init(void)
1006 {
1007 return pci_register_driver(&pvr2fb_pci_driver);
1008 }
1009
1010 static void __exit pvr2fb_pci_exit(void)
1011 {
1012 pci_unregister_driver(&pvr2fb_pci_driver);
1013 }
1014 #endif /* CONFIG_PCI */
1015
1016 static int __devinit pvr2_get_param(const struct pvr2_params *p, const char *s,
1017 int val, int size)
1018 {
1019 int i;
1020
1021 for (i = 0 ; i < size ; i++ ) {
1022 if (s != NULL) {
1023 if (!strnicmp(p[i].name, s, strlen(s)))
1024 return p[i].val;
1025 } else {
1026 if (p[i].val == val)
1027 return (int)p[i].name;
1028 }
1029 }
1030 return -1;
1031 }
1032
1033 /*
1034 * Parse command arguments. Supported arguments are:
1035 * inverse Use inverse color maps
1036 * cable:composite|rgb|vga Override the video cable type
1037 * output:NTSC|PAL|VGA Override the video output format
1038 *
1039 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1040 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1041 */
1042
1043 #ifndef MODULE
1044 static int __init pvr2fb_setup(char *options)
1045 {
1046 char *this_opt;
1047 char cable_arg[80];
1048 char output_arg[80];
1049
1050 if (!options || !*options)
1051 return 0;
1052
1053 while ((this_opt = strsep(&options, ","))) {
1054 if (!*this_opt)
1055 continue;
1056 if (!strcmp(this_opt, "inverse")) {
1057 fb_invert_cmaps();
1058 } else if (!strncmp(this_opt, "cable:", 6)) {
1059 strcpy(cable_arg, this_opt + 6);
1060 } else if (!strncmp(this_opt, "output:", 7)) {
1061 strcpy(output_arg, this_opt + 7);
1062 } else if (!strncmp(this_opt, "nopan", 5)) {
1063 nopan = 1;
1064 } else if (!strncmp(this_opt, "nowrap", 6)) {
1065 nowrap = 1;
1066 } else {
1067 mode_option = this_opt;
1068 }
1069 }
1070
1071 if (*cable_arg)
1072 cable_type = pvr2_get_param(cables, cable_arg, 0, 3);
1073 if (*output_arg)
1074 video_output = pvr2_get_param(outputs, output_arg, 0, 3);
1075
1076 return 0;
1077 }
1078 #endif
1079
1080 static struct pvr2_board {
1081 int (*init)(void);
1082 void (*exit)(void);
1083 char name[16];
1084 } board_driver[] = {
1085 #ifdef CONFIG_SH_DREAMCAST
1086 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1087 #endif
1088 #ifdef CONFIG_PCI
1089 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1090 #endif
1091 { 0, },
1092 };
1093
1094 static int __init pvr2fb_init(void)
1095 {
1096 int i, ret = -ENODEV;
1097 int size;
1098
1099 #ifndef MODULE
1100 char *option = NULL;
1101
1102 if (fb_get_options("pvr2fb", &option))
1103 return -ENODEV;
1104 pvr2fb_setup(option);
1105 #endif
1106 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1107
1108 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL);
1109
1110 if (!fb_info) {
1111 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1112 return -ENOMEM;
1113 }
1114
1115
1116 currentpar = fb_info->par;
1117
1118 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1119 struct pvr2_board *pvr_board = board_driver + i;
1120
1121 if (!pvr_board->init)
1122 continue;
1123
1124 ret = pvr_board->init();
1125
1126 if (ret != 0) {
1127 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1128 pvr_board->name);
1129 framebuffer_release(fb_info);
1130 break;
1131 }
1132 }
1133
1134 return ret;
1135 }
1136
1137 static void __exit pvr2fb_exit(void)
1138 {
1139 int i;
1140
1141 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1142 struct pvr2_board *pvr_board = board_driver + i;
1143
1144 if (pvr_board->exit)
1145 pvr_board->exit();
1146 }
1147
1148 #ifdef CONFIG_SH_STORE_QUEUES
1149 sq_unmap(pvr2fb_map);
1150 #endif
1151
1152 unregister_framebuffer(fb_info);
1153 framebuffer_release(fb_info);
1154 }
1155
1156 module_init(pvr2fb_init);
1157 module_exit(pvr2fb_exit);
1158
1159 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1160 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1161 MODULE_LICENSE("GPL");
WRT350N Kernel Patches