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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / wireless / rtl8187_dev.c
blobf45e50157be6bc9836ee1386f344d84f465add91
1 /*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Realtek */
35 {USB_DEVICE(0x0bda, 0x8187)},
36 /* Netgear */
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
39 /* HP */
40 {USB_DEVICE(0x03f0, 0xca02)},
41 /* Sitecom */
42 {USB_DEVICE(0x0df6, 0x000d)},
43 {}
44 };
45
46 MODULE_DEVICE_TABLE(usb, rtl8187_table);
47
48 static void rtl8187_iowrite_async_cb(struct urb *urb)
49 {
50 kfree(urb->context);
51 usb_free_urb(urb);
52 }
53
54 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
55 void *data, u16 len)
56 {
57 struct usb_ctrlrequest *dr;
58 struct urb *urb;
59 struct rtl8187_async_write_data {
60 u8 data[4];
61 struct usb_ctrlrequest dr;
62 } *buf;
63
64 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
65 if (!buf)
66 return;
67
68 urb = usb_alloc_urb(0, GFP_ATOMIC);
69 if (!urb) {
70 kfree(buf);
71 return;
72 }
73
74 dr = &buf->dr;
75
76 dr->bRequestType = RTL8187_REQT_WRITE;
77 dr->bRequest = RTL8187_REQ_SET_REG;
78 dr->wValue = addr;
79 dr->wIndex = 0;
80 dr->wLength = cpu_to_le16(len);
81
82 memcpy(buf, data, len);
83
84 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
85 (unsigned char *)dr, buf, len,
86 rtl8187_iowrite_async_cb, buf);
87 usb_submit_urb(urb, GFP_ATOMIC);
88 }
89
90 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
91 __le32 *addr, u32 val)
92 {
93 __le32 buf = cpu_to_le32(val);
94
95 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
96 &buf, sizeof(buf));
97 }
98
99 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
100 {
101 struct rtl8187_priv *priv = dev->priv;
102
103 data <<= 8;
104 data |= addr | 0x80;
105
106 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
107 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
108 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
109 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
110
111 msleep(1);
112 }
113
114 static void rtl8187_tx_cb(struct urb *urb)
115 {
116 <<<<<<< HEAD:drivers/net/wireless/rtl8187_dev.c
117 struct ieee80211_tx_status status = { {0} };
118 =======
119 struct ieee80211_tx_status status;
120 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/rtl8187_dev.c
121 struct sk_buff *skb = (struct sk_buff *)urb->context;
122 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
123
124 <<<<<<< HEAD:drivers/net/wireless/rtl8187_dev.c
125 =======
126 memset(&status, 0, sizeof(status));
127
128 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/rtl8187_dev.c
129 usb_free_urb(info->urb);
130 if (info->control)
131 memcpy(&status.control, info->control, sizeof(status.control));
132 kfree(info->control);
133 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
134 status.flags |= IEEE80211_TX_STATUS_ACK;
135 ieee80211_tx_status_irqsafe(info->dev, skb, &status);
136 }
137
138 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
139 struct ieee80211_tx_control *control)
140 {
141 struct rtl8187_priv *priv = dev->priv;
142 struct rtl8187_tx_hdr *hdr;
143 struct rtl8187_tx_info *info;
144 struct urb *urb;
145 __le16 rts_dur = 0;
146 u32 flags;
147
148 urb = usb_alloc_urb(0, GFP_ATOMIC);
149 if (!urb) {
150 kfree_skb(skb);
151 return 0;
152 }
153
154 flags = skb->len;
155 flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
156 flags |= control->rts_cts_rate << 19;
157 flags |= control->tx_rate << 24;
158 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
159 flags |= RTL8187_TX_FLAG_MORE_FRAG;
160 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
161 flags |= RTL8187_TX_FLAG_RTS;
162 rts_dur = ieee80211_rts_duration(dev, priv->vif,
163 skb->len, control);
164 }
165 if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
166 flags |= RTL8187_TX_FLAG_CTS;
167
168 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
169 hdr->flags = cpu_to_le32(flags);
170 hdr->len = 0;
171 hdr->rts_duration = rts_dur;
172 hdr->retry = cpu_to_le32(control->retry_limit << 8);
173
174 info = (struct rtl8187_tx_info *)skb->cb;
175 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
176 info->urb = urb;
177 info->dev = dev;
178 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
179 hdr, skb->len, rtl8187_tx_cb, skb);
180 usb_submit_urb(urb, GFP_ATOMIC);
181
182 return 0;
183 }
184
185 static void rtl8187_rx_cb(struct urb *urb)
186 {
187 struct sk_buff *skb = (struct sk_buff *)urb->context;
188 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
189 struct ieee80211_hw *dev = info->dev;
190 struct rtl8187_priv *priv = dev->priv;
191 struct rtl8187_rx_hdr *hdr;
192 struct ieee80211_rx_status rx_status = { 0 };
193 int rate, signal;
194 u32 flags;
195
196 spin_lock(&priv->rx_queue.lock);
197 if (skb->next)
198 __skb_unlink(skb, &priv->rx_queue);
199 else {
200 spin_unlock(&priv->rx_queue.lock);
201 return;
202 }
203 spin_unlock(&priv->rx_queue.lock);
204
205 if (unlikely(urb->status)) {
206 usb_free_urb(urb);
207 dev_kfree_skb_irq(skb);
208 return;
209 }
210
211 skb_put(skb, urb->actual_length);
212 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
213 flags = le32_to_cpu(hdr->flags);
214 skb_trim(skb, flags & 0x0FFF);
215
216 signal = hdr->agc >> 1;
217 rate = (flags >> 20) & 0xF;
218 if (rate > 3) { /* OFDM rate */
219 if (signal > 90)
220 signal = 90;
221 else if (signal < 25)
222 signal = 25;
223 signal = 90 - signal;
224 } else { /* CCK rate */
225 if (signal > 95)
226 signal = 95;
227 else if (signal < 30)
228 signal = 30;
229 signal = 95 - signal;
230 }
231
232 rx_status.antenna = (hdr->signal >> 7) & 1;
233 rx_status.signal = 64 - min(hdr->noise, (u8)64);
234 rx_status.ssi = signal;
235 rx_status.rate = rate;
236 rx_status.freq = dev->conf.freq;
237 rx_status.channel = dev->conf.channel;
238 rx_status.phymode = dev->conf.phymode;
239 rx_status.mactime = le64_to_cpu(hdr->mac_time);
240 rx_status.flag |= RX_FLAG_TSFT;
241 if (flags & (1 << 13))
242 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
243 ieee80211_rx_irqsafe(dev, skb, &rx_status);
244
245 skb = dev_alloc_skb(RTL8187_MAX_RX);
246 if (unlikely(!skb)) {
247 usb_free_urb(urb);
248 /* TODO check rx queue length and refill *somewhere* */
249 return;
250 }
251
252 info = (struct rtl8187_rx_info *)skb->cb;
253 info->urb = urb;
254 info->dev = dev;
255 urb->transfer_buffer = skb_tail_pointer(skb);
256 urb->context = skb;
257 skb_queue_tail(&priv->rx_queue, skb);
258
259 usb_submit_urb(urb, GFP_ATOMIC);
260 }
261
262 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
263 {
264 struct rtl8187_priv *priv = dev->priv;
265 struct urb *entry;
266 struct sk_buff *skb;
267 struct rtl8187_rx_info *info;
268
269 while (skb_queue_len(&priv->rx_queue) < 8) {
270 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
271 if (!skb)
272 break;
273 entry = usb_alloc_urb(0, GFP_KERNEL);
274 if (!entry) {
275 kfree_skb(skb);
276 break;
277 }
278 usb_fill_bulk_urb(entry, priv->udev,
279 usb_rcvbulkpipe(priv->udev, 1),
280 skb_tail_pointer(skb),
281 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
282 info = (struct rtl8187_rx_info *)skb->cb;
283 info->urb = entry;
284 info->dev = dev;
285 skb_queue_tail(&priv->rx_queue, skb);
286 usb_submit_urb(entry, GFP_KERNEL);
287 }
288
289 return 0;
290 }
291
292 static int rtl8187_init_hw(struct ieee80211_hw *dev)
293 {
294 struct rtl8187_priv *priv = dev->priv;
295 u8 reg;
296 int i;
297
298 /* reset */
299 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
300 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
301 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
302 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
303 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
304 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
305 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
306
307 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
308
309 msleep(200);
310 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
311 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
312 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
313 msleep(200);
314
315 reg = rtl818x_ioread8(priv, &priv->map->CMD);
316 reg &= (1 << 1);
317 reg |= RTL818X_CMD_RESET;
318 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
319
320 i = 10;
321 do {
322 msleep(2);
323 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
324 RTL818X_CMD_RESET))
325 break;
326 } while (--i);
327
328 if (!i) {
329 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
330 return -ETIMEDOUT;
331 }
332
333 /* reload registers from eeprom */
334 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
335
336 i = 10;
337 do {
338 msleep(4);
339 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
340 RTL818X_EEPROM_CMD_CONFIG))
341 break;
342 } while (--i);
343
344 if (!i) {
345 printk(KERN_ERR "%s: eeprom reset timeout!\n",
346 wiphy_name(dev->wiphy));
347 return -ETIMEDOUT;
348 }
349
350 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
351 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
352 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
353 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
354 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
355 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
356 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
357
358 /* setup card */
359 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
360 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
361
362 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
363 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
364 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
365
366 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
367
368 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
369 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
370 reg &= 0x3F;
371 reg |= 0x80;
372 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
373
374 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
375
376 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
377 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
378 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
379
380 // TODO: set RESP_RATE and BRSR properly
381 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
382 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
383
384 /* host_usb_init */
385 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
386 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
387 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
388 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
389 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
390 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
391 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
392 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
393 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
394 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
395 msleep(100);
396
397 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
398 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
399 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
400 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
401 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
402 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
403 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
404 msleep(100);
405
406 priv->rf->init(dev);
407
408 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
409 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
410 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
411 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
412 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
413 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
414 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
415
416 return 0;
417 }
418
419 static int rtl8187_start(struct ieee80211_hw *dev)
420 {
421 struct rtl8187_priv *priv = dev->priv;
422 u32 reg;
423 int ret;
424
425 ret = rtl8187_init_hw(dev);
426 if (ret)
427 return ret;
428
429 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
430
431 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
432 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
433
434 rtl8187_init_urbs(dev);
435
436 reg = RTL818X_RX_CONF_ONLYERLPKT |
437 RTL818X_RX_CONF_RX_AUTORESETPHY |
438 RTL818X_RX_CONF_BSSID |
439 RTL818X_RX_CONF_MGMT |
440 RTL818X_RX_CONF_DATA |
441 (7 << 13 /* RX FIFO threshold NONE */) |
442 (7 << 10 /* MAX RX DMA */) |
443 RTL818X_RX_CONF_BROADCAST |
444 RTL818X_RX_CONF_NICMAC;
445
446 priv->rx_conf = reg;
447 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
448
449 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
450 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
451 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
452 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
453
454 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
455 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
456 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
457 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
458 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
459
460 reg = RTL818X_TX_CONF_CW_MIN |
461 (7 << 21 /* MAX TX DMA */) |
462 RTL818X_TX_CONF_NO_ICV;
463 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
464
465 reg = rtl818x_ioread8(priv, &priv->map->CMD);
466 reg |= RTL818X_CMD_TX_ENABLE;
467 reg |= RTL818X_CMD_RX_ENABLE;
468 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
469
470 return 0;
471 }
472
473 static void rtl8187_stop(struct ieee80211_hw *dev)
474 {
475 struct rtl8187_priv *priv = dev->priv;
476 struct rtl8187_rx_info *info;
477 struct sk_buff *skb;
478 u32 reg;
479
480 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
481
482 reg = rtl818x_ioread8(priv, &priv->map->CMD);
483 reg &= ~RTL818X_CMD_TX_ENABLE;
484 reg &= ~RTL818X_CMD_RX_ENABLE;
485 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
486
487 priv->rf->stop(dev);
488
489 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
490 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
491 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
492 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
493
494 while ((skb = skb_dequeue(&priv->rx_queue))) {
495 info = (struct rtl8187_rx_info *)skb->cb;
496 usb_kill_urb(info->urb);
497 kfree_skb(skb);
498 }
499 return;
500 }
501
502 static int rtl8187_add_interface(struct ieee80211_hw *dev,
503 struct ieee80211_if_init_conf *conf)
504 {
505 struct rtl8187_priv *priv = dev->priv;
506 int i;
507
508 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
509 return -EOPNOTSUPP;
510
511 switch (conf->type) {
512 case IEEE80211_IF_TYPE_STA:
513 priv->mode = conf->type;
514 break;
515 default:
516 return -EOPNOTSUPP;
517 }
518
519 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
520 for (i = 0; i < ETH_ALEN; i++)
521 rtl818x_iowrite8(priv, &priv->map->MAC[i],
522 ((u8 *)conf->mac_addr)[i]);
523 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
524
525 return 0;
526 }
527
528 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
529 struct ieee80211_if_init_conf *conf)
530 {
531 struct rtl8187_priv *priv = dev->priv;
532 priv->mode = IEEE80211_IF_TYPE_MNTR;
533 }
534
535 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
536 {
537 struct rtl8187_priv *priv = dev->priv;
538 u32 reg;
539
540 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
541 /* Enable TX loopback on MAC level to avoid TX during channel
542 * changes, as this has be seen to causes problems and the
543 * card will stop work until next reset
544 */
545 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
546 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
547 msleep(10);
548 priv->rf->set_chan(dev, conf);
549 msleep(10);
550 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
551
552 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
553
554 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
555 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
556 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
557 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
558 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
559 } else {
560 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
561 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
562 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
563 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
564 }
565
566 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
567 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
568 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
569 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
570 return 0;
571 }
572
573 static int rtl8187_config_interface(struct ieee80211_hw *dev,
574 struct ieee80211_vif *vif,
575 struct ieee80211_if_conf *conf)
576 {
577 struct rtl8187_priv *priv = dev->priv;
578 int i;
579
580 for (i = 0; i < ETH_ALEN; i++)
581 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
582
583 if (is_valid_ether_addr(conf->bssid))
584 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
585 else
586 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
587
588 return 0;
589 }
590
591 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
592 unsigned int changed_flags,
593 unsigned int *total_flags,
594 int mc_count, struct dev_addr_list *mclist)
595 {
596 struct rtl8187_priv *priv = dev->priv;
597
598 if (changed_flags & FIF_FCSFAIL)
599 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
600 if (changed_flags & FIF_CONTROL)
601 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
602 if (changed_flags & FIF_OTHER_BSS)
603 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
604 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
605 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
606 else
607 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
608
609 *total_flags = 0;
610
611 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
612 *total_flags |= FIF_FCSFAIL;
613 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
614 *total_flags |= FIF_CONTROL;
615 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
616 *total_flags |= FIF_OTHER_BSS;
617 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
618 *total_flags |= FIF_ALLMULTI;
619
620 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
621 }
622
623 static const struct ieee80211_ops rtl8187_ops = {
624 .tx = rtl8187_tx,
625 .start = rtl8187_start,
626 .stop = rtl8187_stop,
627 .add_interface = rtl8187_add_interface,
628 .remove_interface = rtl8187_remove_interface,
629 .config = rtl8187_config,
630 .config_interface = rtl8187_config_interface,
631 .configure_filter = rtl8187_configure_filter,
632 };
633
634 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
635 {
636 struct ieee80211_hw *dev = eeprom->data;
637 struct rtl8187_priv *priv = dev->priv;
638 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
639
640 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
641 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
642 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
643 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
644 }
645
646 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
647 {
648 struct ieee80211_hw *dev = eeprom->data;
649 struct rtl8187_priv *priv = dev->priv;
650 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
651
652 if (eeprom->reg_data_in)
653 reg |= RTL818X_EEPROM_CMD_WRITE;
654 if (eeprom->reg_data_out)
655 reg |= RTL818X_EEPROM_CMD_READ;
656 if (eeprom->reg_data_clock)
657 reg |= RTL818X_EEPROM_CMD_CK;
658 if (eeprom->reg_chip_select)
659 reg |= RTL818X_EEPROM_CMD_CS;
660
661 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
662 udelay(10);
663 }
664
665 static int __devinit rtl8187_probe(struct usb_interface *intf,
666 const struct usb_device_id *id)
667 {
668 struct usb_device *udev = interface_to_usbdev(intf);
669 struct ieee80211_hw *dev;
670 struct rtl8187_priv *priv;
671 struct eeprom_93cx6 eeprom;
672 struct ieee80211_channel *channel;
673 u16 txpwr, reg;
674 int err, i;
675 DECLARE_MAC_BUF(mac);
676
677 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
678 if (!dev) {
679 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
680 return -ENOMEM;
681 }
682
683 priv = dev->priv;
684
685 SET_IEEE80211_DEV(dev, &intf->dev);
686 usb_set_intfdata(intf, dev);
687 priv->udev = udev;
688
689 usb_get_dev(udev);
690
691 skb_queue_head_init(&priv->rx_queue);
692 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
693 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
694 priv->map = (struct rtl818x_csr *)0xFF00;
695 priv->modes[0].mode = MODE_IEEE80211G;
696 priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
697 priv->modes[0].rates = priv->rates;
698 priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
699 priv->modes[0].channels = priv->channels;
700 priv->modes[1].mode = MODE_IEEE80211B;
701 priv->modes[1].num_rates = 4;
702 priv->modes[1].rates = priv->rates;
703 priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
704 priv->modes[1].channels = priv->channels;
705 priv->mode = IEEE80211_IF_TYPE_MNTR;
706 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
707 IEEE80211_HW_RX_INCLUDES_FCS;
708 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
709 dev->queues = 1;
710 dev->max_rssi = 65;
711 dev->max_signal = 64;
712
713 for (i = 0; i < 2; i++)
714 if ((err = ieee80211_register_hwmode(dev, &priv->modes[i])))
715 goto err_free_dev;
716
717 eeprom.data = dev;
718 eeprom.register_read = rtl8187_eeprom_register_read;
719 eeprom.register_write = rtl8187_eeprom_register_write;
720 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
721 eeprom.width = PCI_EEPROM_WIDTH_93C66;
722 else
723 eeprom.width = PCI_EEPROM_WIDTH_93C46;
724
725 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
726 udelay(10);
727
728 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
729 (__le16 __force *)dev->wiphy->perm_addr, 3);
730 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
731 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
732 "generated MAC address\n");
733 random_ether_addr(dev->wiphy->perm_addr);
734 }
735
736 channel = priv->channels;
737 for (i = 0; i < 3; i++) {
738 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
739 &txpwr);
740 (*channel++).val = txpwr & 0xFF;
741 (*channel++).val = txpwr >> 8;
742 }
743 for (i = 0; i < 2; i++) {
744 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
745 &txpwr);
746 (*channel++).val = txpwr & 0xFF;
747 (*channel++).val = txpwr >> 8;
748 }
749 for (i = 0; i < 2; i++) {
750 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
751 &txpwr);
752 (*channel++).val = txpwr & 0xFF;
753 (*channel++).val = txpwr >> 8;
754 }
755
756 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
757 &priv->txpwr_base);
758
759 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
760 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
761 /* 0 means asic B-cut, we should use SW 3 wire
762 * bit-by-bit banging for radio. 1 means we can use
763 * USB specific request to write radio registers */
764 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
765 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
766 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
767
768 priv->rf = rtl8187_detect_rf(dev);
769
770 err = ieee80211_register_hw(dev);
771 if (err) {
772 printk(KERN_ERR "rtl8187: Cannot register device\n");
773 goto err_free_dev;
774 }
775
776 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
777 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
778 priv->asic_rev, priv->rf->name);
779
780 return 0;
781
782 err_free_dev:
783 ieee80211_free_hw(dev);
784 usb_set_intfdata(intf, NULL);
785 usb_put_dev(udev);
786 return err;
787 }
788
789 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
790 {
791 struct ieee80211_hw *dev = usb_get_intfdata(intf);
792 struct rtl8187_priv *priv;
793
794 if (!dev)
795 return;
796
797 ieee80211_unregister_hw(dev);
798
799 priv = dev->priv;
800 usb_put_dev(interface_to_usbdev(intf));
801 ieee80211_free_hw(dev);
802 }
803
804 static struct usb_driver rtl8187_driver = {
805 .name = KBUILD_MODNAME,
806 .id_table = rtl8187_table,
807 .probe = rtl8187_probe,
808 .disconnect = rtl8187_disconnect,
809 };
810
811 static int __init rtl8187_init(void)
812 {
813 return usb_register(&rtl8187_driver);
814 }
815
816 static void __exit rtl8187_exit(void)
817 {
818 usb_deregister(&rtl8187_driver);
819 }
820
821 module_init(rtl8187_init);
822 module_exit(rtl8187_exit);
WRT350N Kernel Patches