drivers/infiniband/hw/ipath/ipath_kernel.h

   1 #ifndef _IPATH_KERNEL_H
   2 #define _IPATH_KERNEL_H
   3 /*
   4  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   5  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 /*
  37  * This header file is the base header file for infinipath kernel code
  38  * ipath_user.h serves a similar purpose for user code.
  39  */
  40
  41 #include <linux/interrupt.h>
  42 #include <linux/pci.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/mutex.h>
  45 #include <asm/io.h>
  46 #include <rdma/ib_verbs.h>
  47
  48 #include "ipath_common.h"
  49 #include "ipath_debug.h"
  50 #include "ipath_registers.h"
  51
  52 /* only s/w major version of InfiniPath we can handle */
  53 #define IPATH_CHIP_VERS_MAJ 2U
  54
  55 /* don't care about this except printing */
  56 #define IPATH_CHIP_VERS_MIN 0U
  57
  58 /* temporary, maybe always */
  59 extern struct infinipath_stats ipath_stats;
  60
  61 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
  62 /*
  63  * First-cut critierion for "device is active" is
  64  * two thousand dwords combined Tx, Rx traffic per
  65  * 5-second interval. SMA packets are 64 dwords,
  66  * and occur "a few per second", presumably each way.
  67  */
  68 #define IPATH_TRAFFIC_ACTIVE_THRESHOLD (2000)
  69 /*
  70  * Struct used to indicate which errors are logged in each of the
  71  * error-counters that are logged to EEPROM. A counter is incremented
  72  * _once_ (saturating at 255) for each event with any bits set in
  73  * the error or hwerror register masks below.
  74  */
  75 #define IPATH_EEP_LOG_CNT (4)
  76 struct ipath_eep_log_mask {
  77         u64 errs_to_log;
  78         u64 hwerrs_to_log;
  79 };
  80
  81 struct ipath_portdata {
  82         void **port_rcvegrbuf;
  83         dma_addr_t *port_rcvegrbuf_phys;
  84         /* rcvhdrq base, needs mmap before useful */
  85         void *port_rcvhdrq;
  86         /* kernel virtual address where hdrqtail is updated */
  87         void *port_rcvhdrtail_kvaddr;
  88         /*
  89          * temp buffer for expected send setup, allocated at open, instead
  90          * of each setup call
  91          */
  92         void *port_tid_pg_list;
  93         /* when waiting for rcv or pioavail */
  94         wait_queue_head_t port_wait;
  95         /*
  96          * rcvegr bufs base, physical, must fit
  97          * in 44 bits so 32 bit programs mmap64 44 bit works)
  98          */
  99         dma_addr_t port_rcvegr_phys;
 100         /* mmap of hdrq, must fit in 44 bits */
 101         dma_addr_t port_rcvhdrq_phys;
 102         dma_addr_t port_rcvhdrqtailaddr_phys;
 103         /*
 104          * number of opens (including slave subports) on this instance
 105          * (ignoring forks, dup, etc. for now)
 106          */
 107         int port_cnt;
 108         /*
 109          * how much space to leave at start of eager TID entries for
 110          * protocol use, on each TID
 111          */
 112         /* instead of calculating it */
 113         unsigned port_port;
 114         /* non-zero if port is being shared. */
 115         u16 port_subport_cnt;
 116         /* non-zero if port is being shared. */
 117         u16 port_subport_id;
 118         /* chip offset of PIO buffers for this port */
 119         u32 port_piobufs;
 120         /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
 121         u32 port_rcvegrbuf_chunks;
 122         /* how many egrbufs per chunk */
 123         u32 port_rcvegrbufs_perchunk;
 124         /* order for port_rcvegrbuf_pages */
 125         size_t port_rcvegrbuf_size;
 126         /* rcvhdrq size (for freeing) */
 127         size_t port_rcvhdrq_size;
 128         /* next expected TID to check when looking for free */
 129         u32 port_tidcursor;
 130         /* next expected TID to check */
 131         unsigned long port_flag;
 132         /* what happened */
 133         unsigned long int_flag;
 134         /* WAIT_RCV that timed out, no interrupt */
 135         u32 port_rcvwait_to;
 136         /* WAIT_PIO that timed out, no interrupt */
 137         u32 port_piowait_to;
 138         /* WAIT_RCV already happened, no wait */
 139         u32 port_rcvnowait;
 140         /* WAIT_PIO already happened, no wait */
 141         u32 port_pionowait;
 142         /* total number of rcvhdrqfull errors */
 143         u32 port_hdrqfull;
 144         /*
 145          * Used to suppress multiple instances of same
 146          * port staying stuck at same point.
 147          */
 148         u32 port_lastrcvhdrqtail;
 149         /* saved total number of rcvhdrqfull errors for poll edge trigger */
 150         u32 port_hdrqfull_poll;
 151         /* total number of polled urgent packets */
 152         u32 port_urgent;
 153         /* saved total number of polled urgent packets for poll edge trigger */
 154         u32 port_urgent_poll;
 155         /* pid of process using this port */
 156         pid_t port_pid;
 157         pid_t port_subpid[INFINIPATH_MAX_SUBPORT];
 158         /* same size as task_struct .comm[] */
 159         char port_comm[16];
 160         /* pkeys set by this use of this port */
 161         u16 port_pkeys[4];
 162         /* so file ops can get at unit */
 163         struct ipath_devdata *port_dd;
 164         /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
 165         void *subport_uregbase;
 166         /* An array of pages for the eager receive buffers * N */
 167         void *subport_rcvegrbuf;
 168         /* An array of pages for the eager header queue entries * N */
 169         void *subport_rcvhdr_base;
 170         /* The version of the library which opened this port */
 171         u32 userversion;
 172         /* Bitmask of active slaves */
 173         u32 active_slaves;
 174         /* Type of packets or conditions we want to poll for */
 175         u16 poll_type;
 176         /* port rcvhdrq head offset */
 177         u32 port_head;
 178 };
 179
 180 struct sk_buff;
 181
 182 /*
 183  * control information for layered drivers
 184  */
 185 struct _ipath_layer {
 186         void *l_arg;
 187 };
 188
 189 struct ipath_skbinfo {
 190         struct sk_buff *skb;
 191         dma_addr_t phys;
 192 };
 193
 194 /*
 195  * Possible IB config parameters for ipath_f_get/set_ib_cfg()
 196  */
 197 #define IPATH_IB_CFG_LIDLMC 0 /* Get/set LID (LS16b) and Mask (MS16b) */
 198 #define IPATH_IB_CFG_HRTBT 1 /* Get/set Heartbeat off/enable/auto */
 199 #define IPATH_IB_HRTBT_ON 3 /* Heartbeat enabled, sent every 100msec */
 200 #define IPATH_IB_HRTBT_OFF 0 /* Heartbeat off */
 201 #define IPATH_IB_CFG_LWID_ENB 2 /* Get/set allowed Link-width */
 202 #define IPATH_IB_CFG_LWID 3 /* Get currently active Link-width */
 203 #define IPATH_IB_CFG_SPD_ENB 4 /* Get/set allowed Link speeds */
 204 #define IPATH_IB_CFG_SPD 5 /* Get current Link spd */
 205 #define IPATH_IB_CFG_RXPOL_ENB 6 /* Get/set Auto-RX-polarity enable */
 206 #define IPATH_IB_CFG_LREV_ENB 7 /* Get/set Auto-Lane-reversal enable */
 207 #define IPATH_IB_CFG_LINKLATENCY 8 /* Get Auto-Lane-reversal enable */
 208
 209
 210 struct ipath_devdata {
 211         struct list_head ipath_list;
 212
 213         struct ipath_kregs const *ipath_kregs;
 214         struct ipath_cregs const *ipath_cregs;
 215
 216         /* mem-mapped pointer to base of chip regs */
 217         u64 __iomem *ipath_kregbase;
 218         /* end of mem-mapped chip space; range checking */
 219         u64 __iomem *ipath_kregend;
 220         /* physical address of chip for io_remap, etc. */
 221         unsigned long ipath_physaddr;
 222         /* base of memory alloced for ipath_kregbase, for free */
 223         u64 *ipath_kregalloc;
 224         /*
 225          * virtual address where port0 rcvhdrqtail updated for this unit.
 226          * only written to by the chip, not the driver.
 227          */
 228         volatile __le64 *ipath_hdrqtailptr;
 229         /* ipath_cfgports pointers */
 230         struct ipath_portdata **ipath_pd;
 231         /* sk_buffs used by port 0 eager receive queue */
 232         struct ipath_skbinfo *ipath_port0_skbinfo;
 233         /* kvirt address of 1st 2k pio buffer */
 234         void __iomem *ipath_pio2kbase;
 235         /* kvirt address of 1st 4k pio buffer */
 236         void __iomem *ipath_pio4kbase;
 237         /*
 238          * points to area where PIOavail registers will be DMA'ed.
 239          * Has to be on a page of it's own, because the page will be
 240          * mapped into user program space.  This copy is *ONLY* ever
 241          * written by DMA, not by the driver!  Need a copy per device
 242          * when we get to multiple devices
 243          */
 244         volatile __le64 *ipath_pioavailregs_dma;
 245         /* physical address where updates occur */
 246         dma_addr_t ipath_pioavailregs_phys;
 247         struct _ipath_layer ipath_layer;
 248         /* setup intr */
 249         int (*ipath_f_intrsetup)(struct ipath_devdata *);
 250         /* fallback to alternate interrupt type if possible */
 251         int (*ipath_f_intr_fallback)(struct ipath_devdata *);
 252         /* setup on-chip bus config */
 253         int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
 254         /* hard reset chip */
 255         int (*ipath_f_reset)(struct ipath_devdata *);
 256         int (*ipath_f_get_boardname)(struct ipath_devdata *, char *,
 257                                      size_t);
 258         void (*ipath_f_init_hwerrors)(struct ipath_devdata *);
 259         void (*ipath_f_handle_hwerrors)(struct ipath_devdata *, char *,
 260                                         size_t);
 261         void (*ipath_f_quiet_serdes)(struct ipath_devdata *);
 262         int (*ipath_f_bringup_serdes)(struct ipath_devdata *);
 263         int (*ipath_f_early_init)(struct ipath_devdata *);
 264         void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
 265         void (*ipath_f_put_tid)(struct ipath_devdata *, u64 __iomem*,
 266                                 u32, unsigned long);
 267         void (*ipath_f_tidtemplate)(struct ipath_devdata *);
 268         void (*ipath_f_cleanup)(struct ipath_devdata *);
 269         void (*ipath_f_setextled)(struct ipath_devdata *, u64, u64);
 270         /* fill out chip-specific fields */
 271         int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
 272         /* free irq */
 273         void (*ipath_f_free_irq)(struct ipath_devdata *);
 274         struct ipath_message_header *(*ipath_f_get_msgheader)
 275                                         (struct ipath_devdata *, __le32 *);
 276         void (*ipath_f_config_ports)(struct ipath_devdata *, ushort);
 277         int (*ipath_f_get_ib_cfg)(struct ipath_devdata *, int);
 278         int (*ipath_f_set_ib_cfg)(struct ipath_devdata *, int, u32);
 279         void (*ipath_f_config_jint)(struct ipath_devdata *, u16 , u16);
 280         void (*ipath_f_read_counters)(struct ipath_devdata *,
 281                                         struct infinipath_counters *);
 282         void (*ipath_f_xgxs_reset)(struct ipath_devdata *);
 283         /* per chip actions needed for IB Link up/down changes */
 284         int (*ipath_f_ib_updown)(struct ipath_devdata *, int, u64);
 285
 286         struct ipath_ibdev *verbs_dev;
 287         struct timer_list verbs_timer;
 288         /* total dwords sent (summed from counter) */
 289         u64 ipath_sword;
 290         /* total dwords rcvd (summed from counter) */
 291         u64 ipath_rword;
 292         /* total packets sent (summed from counter) */
 293         u64 ipath_spkts;
 294         /* total packets rcvd (summed from counter) */
 295         u64 ipath_rpkts;
 296         /* ipath_statusp initially points to this. */
 297         u64 _ipath_status;
 298         /* GUID for this interface, in network order */
 299         __be64 ipath_guid;
 300         /*
 301          * aggregrate of error bits reported since last cleared, for
 302          * limiting of error reporting
 303          */
 304         ipath_err_t ipath_lasterror;
 305         /*
 306          * aggregrate of error bits reported since last cleared, for
 307          * limiting of hwerror reporting
 308          */
 309         ipath_err_t ipath_lasthwerror;
 310         /* errors masked because they occur too fast */
 311         ipath_err_t ipath_maskederrs;
 312         /* time in jiffies at which to re-enable maskederrs */
 313         unsigned long ipath_unmasktime;
 314         /* count of egrfull errors, combined for all ports */
 315         u64 ipath_last_tidfull;
 316         /* for ipath_qcheck() */
 317         u64 ipath_lastport0rcv_cnt;
 318         /* template for writing TIDs  */
 319         u64 ipath_tidtemplate;
 320         /* value to write to free TIDs */
 321         u64 ipath_tidinvalid;
 322         /* IBA6120 rcv interrupt setup */
 323         u64 ipath_rhdrhead_intr_off;
 324
 325         /* size of memory at ipath_kregbase */
 326         u32 ipath_kregsize;
 327         /* number of registers used for pioavail */
 328         u32 ipath_pioavregs;
 329         /* IPATH_POLL, etc. */
 330         u32 ipath_flags;
 331         /* ipath_flags driver is waiting for */
 332         u32 ipath_state_wanted;
 333         /* last buffer for user use, first buf for kernel use is this
 334          * index. */
 335         u32 ipath_lastport_piobuf;
 336         /* is a stats timer active */
 337         u32 ipath_stats_timer_active;
 338         /* number of interrupts for this device -- saturates... */
 339         u32 ipath_int_counter;
 340         /* dwords sent read from counter */
 341         u32 ipath_lastsword;
 342         /* dwords received read from counter */
 343         u32 ipath_lastrword;
 344         /* sent packets read from counter */
 345         u32 ipath_lastspkts;
 346         /* received packets read from counter */
 347         u32 ipath_lastrpkts;
 348         /* pio bufs allocated per port */
 349         u32 ipath_pbufsport;
 350         /*
 351          * number of ports configured as max; zero is set to number chip
 352          * supports, less gives more pio bufs/port, etc.
 353          */
 354         u32 ipath_cfgports;
 355         /* count of port 0 hdrqfull errors */
 356         u32 ipath_p0_hdrqfull;
 357         /* port 0 number of receive eager buffers */
 358         u32 ipath_p0_rcvegrcnt;
 359
 360         /*
 361          * index of last piobuffer we used.  Speeds up searching, by
 362          * starting at this point.  Doesn't matter if multiple cpu's use and
 363          * update, last updater is only write that matters.  Whenever it
 364          * wraps, we update shadow copies.  Need a copy per device when we
 365          * get to multiple devices
 366          */
 367         u32 ipath_lastpioindex;
 368         /* max length of freezemsg */
 369         u32 ipath_freezelen;
 370         /*
 371          * consecutive times we wanted a PIO buffer but were unable to
 372          * get one
 373          */
 374         u32 ipath_consec_nopiobuf;
 375         /*
 376          * hint that we should update ipath_pioavailshadow before
 377          * looking for a PIO buffer
 378          */
 379         u32 ipath_upd_pio_shadow;
 380         /* so we can rewrite it after a chip reset */
 381         u32 ipath_pcibar0;
 382         /* so we can rewrite it after a chip reset */
 383         u32 ipath_pcibar1;
 384
 385         /* interrupt number */
 386         int ipath_irq;
 387         /* HT/PCI Vendor ID (here for NodeInfo) */
 388         u16 ipath_vendorid;
 389         /* HT/PCI Device ID (here for NodeInfo) */
 390         u16 ipath_deviceid;
 391         /* offset in HT config space of slave/primary interface block */
 392         u8 ipath_ht_slave_off;
 393         /* for write combining settings */
 394         unsigned long ipath_wc_cookie;
 395         unsigned long ipath_wc_base;
 396         unsigned long ipath_wc_len;
 397         /* ref count for each pkey */
 398         atomic_t ipath_pkeyrefs[4];
 399         /* shadow copy of struct page *'s for exp tid pages */
 400         struct page **ipath_pageshadow;
 401         /* shadow copy of dma handles for exp tid pages */
 402         dma_addr_t *ipath_physshadow;
 403         u64 __iomem *ipath_egrtidbase;
 404         /* lock to workaround chip bug 9437 and others */
 405         spinlock_t ipath_kernel_tid_lock;
 406         spinlock_t ipath_tid_lock;
 407         spinlock_t ipath_sendctrl_lock;
 408
 409         /*
 410          * IPATH_STATUS_*,
 411          * this address is mapped readonly into user processes so they can
 412          * get status cheaply, whenever they want.
 413          */
 414         u64 *ipath_statusp;
 415         /* freeze msg if hw error put chip in freeze */
 416         char *ipath_freezemsg;
 417         /* pci access data structure */
 418         struct pci_dev *pcidev;
 419         struct cdev *user_cdev;
 420         struct cdev *diag_cdev;
 421         struct class_device *user_class_dev;
 422         struct class_device *diag_class_dev;
 423         /* timer used to prevent stats overflow, error throttling, etc. */
 424         struct timer_list ipath_stats_timer;
 425         void *ipath_dummy_hdrq; /* used after port close */
 426         dma_addr_t ipath_dummy_hdrq_phys;
 427
 428         unsigned long ipath_ureg_align; /* user register alignment */
 429
 430         /*
 431          * Shadow copies of registers; size indicates read access size.
 432          * Most of them are readonly, but some are write-only register,
 433          * where we manipulate the bits in the shadow copy, and then write
 434          * the shadow copy to infinipath.
 435          *
 436          * We deliberately make most of these 32 bits, since they have
 437          * restricted range.  For any that we read, we won't to generate 32
 438          * bit accesses, since Opteron will generate 2 separate 32 bit HT
 439          * transactions for a 64 bit read, and we want to avoid unnecessary
 440          * HT transactions.
 441          */
 442
 443         /* This is the 64 bit group */
 444
 445         /*
 446          * shadow of pioavail, check to be sure it's large enough at
 447          * init time.
 448          */
 449         unsigned long ipath_pioavailshadow[8];
 450         /* shadow of kr_gpio_out, for rmw ops */
 451         u64 ipath_gpio_out;
 452         /* shadow the gpio mask register */
 453         u64 ipath_gpio_mask;
 454         /* shadow the gpio output enable, etc... */
 455         u64 ipath_extctrl;
 456         /* kr_revision shadow */
 457         u64 ipath_revision;
 458         /*
 459          * shadow of ibcctrl, for interrupt handling of link changes,
 460          * etc.
 461          */
 462         u64 ipath_ibcctrl;
 463         /*
 464          * last ibcstatus, to suppress "duplicate" status change messages,
 465          * mostly from 2 to 3
 466          */
 467         u64 ipath_lastibcstat;
 468         /* hwerrmask shadow */
 469         ipath_err_t ipath_hwerrmask;
 470         ipath_err_t ipath_errormask; /* errormask shadow */
 471         /* interrupt config reg shadow */
 472         u64 ipath_intconfig;
 473         /* kr_sendpiobufbase value */
 474         u64 ipath_piobufbase;
 475
 476         /* these are the "32 bit" regs */
 477
 478         /*
 479          * number of GUIDs in the flash for this interface; may need some
 480          * rethinking for setting on other ifaces
 481          */
 482         u32 ipath_nguid;
 483         /*
 484          * the following two are 32-bit bitmasks, but {test,clear,set}_bit
 485          * all expect bit fields to be "unsigned long"
 486          */
 487         /* shadow kr_rcvctrl */
 488         unsigned long ipath_rcvctrl;
 489         /* shadow kr_sendctrl */
 490         unsigned long ipath_sendctrl;
 491         unsigned long ipath_lastcancel; /* to not count armlaunch after cancel */
 492
 493         /* value we put in kr_rcvhdrcnt */
 494         u32 ipath_rcvhdrcnt;
 495         /* value we put in kr_rcvhdrsize */
 496         u32 ipath_rcvhdrsize;
 497         /* value we put in kr_rcvhdrentsize */
 498         u32 ipath_rcvhdrentsize;
 499         /* offset of last entry in rcvhdrq */
 500         u32 ipath_hdrqlast;
 501         /* kr_portcnt value */
 502         u32 ipath_portcnt;
 503         /* kr_pagealign value */
 504         u32 ipath_palign;
 505         /* number of "2KB" PIO buffers */
 506         u32 ipath_piobcnt2k;
 507         /* size in bytes of "2KB" PIO buffers */
 508         u32 ipath_piosize2k;
 509         /* number of "4KB" PIO buffers */
 510         u32 ipath_piobcnt4k;
 511         /* size in bytes of "4KB" PIO buffers */
 512         u32 ipath_piosize4k;
 513         /* kr_rcvegrbase value */
 514         u32 ipath_rcvegrbase;
 515         /* kr_rcvegrcnt value */
 516         u32 ipath_rcvegrcnt;
 517         /* kr_rcvtidbase value */
 518         u32 ipath_rcvtidbase;
 519         /* kr_rcvtidcnt value */
 520         u32 ipath_rcvtidcnt;
 521         /* kr_sendregbase */
 522         u32 ipath_sregbase;
 523         /* kr_userregbase */
 524         u32 ipath_uregbase;
 525         /* kr_counterregbase */
 526         u32 ipath_cregbase;
 527         /* shadow the control register contents */
 528         u32 ipath_control;
 529         /* PCI revision register (HTC rev on FPGA) */
 530         u32 ipath_pcirev;
 531
 532         /* chip address space used by 4k pio buffers */
 533         u32 ipath_4kalign;
 534         /* The MTU programmed for this unit */
 535         u32 ipath_ibmtu;
 536         /*
 537          * The max size IB packet, included IB headers that we can send.
 538          * Starts same as ipath_piosize, but is affected when ibmtu is
 539          * changed, or by size of eager buffers
 540          */
 541         u32 ipath_ibmaxlen;
 542         /*
 543          * ibmaxlen at init time, limited by chip and by receive buffer
 544          * size.  Not changed after init.
 545          */
 546         u32 ipath_init_ibmaxlen;
 547         /* size of each rcvegrbuffer */
 548         u32 ipath_rcvegrbufsize;
 549         /* width (2,4,8,16,32) from HT config reg */
 550         u32 ipath_htwidth;
 551         /* HT speed (200,400,800,1000) from HT config */
 552         u32 ipath_htspeed;
 553         /*
 554          * number of sequential ibcstatus change for polling active/quiet
 555          * (i.e., link not coming up).
 556          */
 557         u32 ipath_ibpollcnt;
 558         /* low and high portions of MSI capability/vector */
 559         u32 ipath_msi_lo;
 560         /* saved after PCIe init for restore after reset */
 561         u32 ipath_msi_hi;
 562         /* MSI data (vector) saved for restore */
 563         u16 ipath_msi_data;
 564         /* MLID programmed for this instance */
 565         u16 ipath_mlid;
 566         /* LID programmed for this instance */
 567         u16 ipath_lid;
 568         /* list of pkeys programmed; 0 if not set */
 569         u16 ipath_pkeys[4];
 570         /*
 571          * ASCII serial number, from flash, large enough for original
 572          * all digit strings, and longer QLogic serial number format
 573          */
 574         u8 ipath_serial[16];
 575         /* human readable board version */
 576         u8 ipath_boardversion[80];
 577         /* chip major rev, from ipath_revision */
 578         u8 ipath_majrev;
 579         /* chip minor rev, from ipath_revision */
 580         u8 ipath_minrev;
 581         /* board rev, from ipath_revision */
 582         u8 ipath_boardrev;
 583
 584         u8 ipath_r_portenable_shift;
 585         u8 ipath_r_intravail_shift;
 586         u8 ipath_r_tailupd_shift;
 587         u8 ipath_r_portcfg_shift;
 588
 589         /* unit # of this chip, if present */
 590         int ipath_unit;
 591         /* saved for restore after reset */
 592         u8 ipath_pci_cacheline;
 593         /* LID mask control */
 594         u8 ipath_lmc;
 595         /* link width supported */
 596         u8 ipath_link_width_supported;
 597         /* link speed supported */
 598         u8 ipath_link_speed_supported;
 599         u8 ipath_link_width_enabled;
 600         u8 ipath_link_speed_enabled;
 601         u8 ipath_link_width_active;
 602         u8 ipath_link_speed_active;
 603         /* Rx Polarity inversion (compensate for ~tx on partner) */
 604         u8 ipath_rx_pol_inv;
 605
 606         /* local link integrity counter */
 607         u32 ipath_lli_counter;
 608         /* local link integrity errors */
 609         u32 ipath_lli_errors;
 610         /*
 611          * Above counts only cases where _successive_ LocalLinkIntegrity
 612          * errors were seen in the receive headers of kern-packets.
 613          * Below are the three (monotonically increasing) counters
 614          * maintained via GPIO interrupts on iba6120-rev2.
 615          */
 616         u32 ipath_rxfc_unsupvl_errs;
 617         u32 ipath_overrun_thresh_errs;
 618         u32 ipath_lli_errs;
 619
 620         /* status check work */
 621         struct delayed_work status_work;
 622
 623         /*
 624          * Not all devices managed by a driver instance are the same
 625          * type, so these fields must be per-device.
 626          */
 627         u64 ipath_i_bitsextant;
 628         ipath_err_t ipath_e_bitsextant;
 629         ipath_err_t ipath_hwe_bitsextant;
 630
 631         /*
 632          * Below should be computable from number of ports,
 633          * since they are never modified.
 634          */
 635         u32 ipath_i_rcvavail_mask;
 636         u32 ipath_i_rcvurg_mask;
 637         u16 ipath_i_rcvurg_shift;
 638         u16 ipath_i_rcvavail_shift;
 639
 640         /*
 641          * Register bits for selecting i2c direction and values, used for
 642          * I2C serial flash.
 643          */
 644         u16 ipath_gpio_sda_num;
 645         u16 ipath_gpio_scl_num;
 646         u64 ipath_gpio_sda;
 647         u64 ipath_gpio_scl;
 648
 649         /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
 650         spinlock_t ipath_gpio_lock;
 651
 652         /*
 653          * IB link and linktraining states and masks that vary per chip in
 654          * some way.  Set at init, to avoid each IB status change interrupt
 655          */
 656         u8 ibcs_ls_shift;
 657         u8 ibcs_lts_mask;
 658         u32 ibcs_mask;
 659         u32 ib_init;
 660         u32 ib_arm;
 661         u32 ib_active;
 662
 663         u16 ipath_rhf_offset; /* offset of RHF within receive header entry */
 664
 665         /*
 666          * shift/mask for linkcmd, linkinitcmd, maxpktlen in ibccontol
 667          * reg. Changes for IBA7220
 668          */
 669         u8 ibcc_lic_mask; /* LinkInitCmd */
 670         u8 ibcc_lc_shift; /* LinkCmd */
 671         u8 ibcc_mpl_shift; /* Maxpktlen */
 672
 673         u8 delay_mult;
 674
 675         /* used to override LED behavior */
 676         u8 ipath_led_override;  /* Substituted for normal value, if non-zero */
 677         u16 ipath_led_override_timeoff; /* delta to next timer event */
 678         u8 ipath_led_override_vals[2]; /* Alternates per blink-frame */
 679         u8 ipath_led_override_phase; /* Just counts, LSB picks from vals[] */
 680         atomic_t ipath_led_override_timer_active;
 681         /* Used to flash LEDs in override mode */
 682         struct timer_list ipath_led_override_timer;
 683
 684         /* Support (including locks) for EEPROM logging of errors and time */
 685         /* control access to actual counters, timer */
 686         spinlock_t ipath_eep_st_lock;
 687         /* control high-level access to EEPROM */
 688         struct mutex ipath_eep_lock;
 689         /* Below inc'd by ipath_snap_cntrs(), locked by ipath_eep_st_lock */
 690         uint64_t ipath_traffic_wds;
 691         /* active time is kept in seconds, but logged in hours */
 692         atomic_t ipath_active_time;
 693         /* Below are nominal shadow of EEPROM, new since last EEPROM update */
 694         uint8_t ipath_eep_st_errs[IPATH_EEP_LOG_CNT];
 695         uint8_t ipath_eep_st_new_errs[IPATH_EEP_LOG_CNT];
 696         uint16_t ipath_eep_hrs;
 697         /*
 698          * masks for which bits of errs, hwerrs that cause
 699          * each of the counters to increment.
 700          */
 701         struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT];
 702
 703         /* interrupt mitigation reload register info */
 704         u16 ipath_jint_idle_ticks;      /* idle clock ticks */
 705         u16 ipath_jint_max_packets;     /* max packets across all ports */
 706 };
 707
 708 /* Private data for file operations */
 709 struct ipath_filedata {
 710         struct ipath_portdata *pd;
 711         unsigned subport;
 712         unsigned tidcursor;
 713 };
 714 extern struct list_head ipath_dev_list;
 715 extern spinlock_t ipath_devs_lock;
 716 extern struct ipath_devdata *ipath_lookup(int unit);
 717
 718 int ipath_init_chip(struct ipath_devdata *, int);
 719 int ipath_enable_wc(struct ipath_devdata *dd);
 720 void ipath_disable_wc(struct ipath_devdata *dd);
 721 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp);
 722 void ipath_shutdown_device(struct ipath_devdata *);
 723 void ipath_clear_freeze(struct ipath_devdata *);
 724
 725 struct file_operations;
 726 int ipath_cdev_init(int minor, char *name, const struct file_operations *fops,
 727                     struct cdev **cdevp, struct class_device **class_devp);
 728 void ipath_cdev_cleanup(struct cdev **cdevp,
 729                         struct class_device **class_devp);
 730
 731 int ipath_diag_add(struct ipath_devdata *);
 732 void ipath_diag_remove(struct ipath_devdata *);
 733
 734 extern wait_queue_head_t ipath_state_wait;
 735
 736 int ipath_user_add(struct ipath_devdata *dd);
 737 void ipath_user_remove(struct ipath_devdata *dd);
 738
 739 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
 740
 741 extern int ipath_diag_inuse;
 742
 743 irqreturn_t ipath_intr(int irq, void *devid);
 744 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err);
 745 #if __IPATH_INFO || __IPATH_DBG
 746 extern const char *ipath_ibcstatus_str[];
 747 #endif
 748
 749 /* clean up any per-chip chip-specific stuff */
 750 void ipath_chip_cleanup(struct ipath_devdata *);
 751 /* clean up any chip type-specific stuff */
 752 void ipath_chip_done(void);
 753
 754 /* check to see if we have to force ordering for write combining */
 755 int ipath_unordered_wc(void);
 756
 757 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
 758                           unsigned cnt);
 759 void ipath_cancel_sends(struct ipath_devdata *, int);
 760
 761 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
 762 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
 763
 764 int ipath_parse_ushort(const char *str, unsigned short *valp);
 765
 766 void ipath_kreceive(struct ipath_portdata *);
 767 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
 768 int ipath_reset_device(int);
 769 void ipath_get_faststats(unsigned long);
 770 <<<<<<< HEAD:drivers/infiniband/hw/ipath/ipath_kernel.h
 771 =======
 772 int ipath_wait_linkstate(struct ipath_devdata *, u32, int);
 773 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/infiniband/hw/ipath/ipath_kernel.h
 774 int ipath_set_linkstate(struct ipath_devdata *, u8);
 775 int ipath_set_mtu(struct ipath_devdata *, u16);
 776 int ipath_set_lid(struct ipath_devdata *, u32, u8);
 777 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
 778 void ipath_enable_armlaunch(struct ipath_devdata *);
 779 void ipath_disable_armlaunch(struct ipath_devdata *);
 780
 781 /* for use in system calls, where we want to know device type, etc. */
 782 #define port_fp(fp) ((struct ipath_filedata *)(fp)->private_data)->pd
 783 #define subport_fp(fp) \
 784         ((struct ipath_filedata *)(fp)->private_data)->subport
 785 #define tidcursor_fp(fp) \
 786         ((struct ipath_filedata *)(fp)->private_data)->tidcursor
 787
 788 /*
 789  * values for ipath_flags
 790  */
 791 /* The chip is up and initted */
 792 #define IPATH_INITTED       0x2
 793                 /* set if any user code has set kr_rcvhdrsize */
 794 #define IPATH_RCVHDRSZ_SET  0x4
 795                 /* The chip is present and valid for accesses */
 796 #define IPATH_PRESENT       0x8
 797                 /* HT link0 is only 8 bits wide, ignore upper byte crc
 798                  * errors, etc. */
 799 #define IPATH_8BIT_IN_HT0   0x10
 800                 /* HT link1 is only 8 bits wide, ignore upper byte crc
 801                  * errors, etc. */
 802 #define IPATH_8BIT_IN_HT1   0x20
 803                 /* The link is down */
 804 #define IPATH_LINKDOWN      0x40
 805                 /* The link level is up (0x11) */
 806 #define IPATH_LINKINIT      0x80
 807                 /* The link is in the armed (0x21) state */
 808 #define IPATH_LINKARMED     0x100
 809                 /* The link is in the active (0x31) state */
 810 #define IPATH_LINKACTIVE    0x200
 811                 /* link current state is unknown */
 812 #define IPATH_LINKUNK       0x400
 813                 /* Write combining flush needed for PIO */
 814 #define IPATH_PIO_FLUSH_WC  0x1000
 815                 /* no IB cable, or no device on IB cable */
 816 #define IPATH_NOCABLE       0x4000
 817                 /* Supports port zero per packet receive interrupts via
 818                  * GPIO */
 819 #define IPATH_GPIO_INTR     0x8000
 820                 /* uses the coded 4byte TID, not 8 byte */
 821 #define IPATH_4BYTE_TID     0x10000
 822                 /* packet/word counters are 32 bit, else those 4 counters
 823                  * are 64bit */
 824 #define IPATH_32BITCOUNTERS 0x20000
 825                 /* can miss port0 rx interrupts */
 826                 /* Interrupt register is 64 bits */
 827 #define IPATH_INTREG_64     0x40000
 828 #define IPATH_DISABLED      0x80000 /* administratively disabled */
 829                 /* Use GPIO interrupts for new counters */
 830 #define IPATH_GPIO_ERRINTRS 0x100000
 831 #define IPATH_SWAP_PIOBUFS  0x200000
 832                 /* Suppress heartbeat, even if turning off loopback */
 833 #define IPATH_NO_HRTBT      0x1000000
 834 #define IPATH_HAS_MULT_IB_SPEED 0x8000000
 835
 836 /* Bits in GPIO for the added interrupts */
 837 #define IPATH_GPIO_PORT0_BIT 2
 838 #define IPATH_GPIO_RXUVL_BIT 3
 839 #define IPATH_GPIO_OVRUN_BIT 4
 840 #define IPATH_GPIO_LLI_BIT 5
 841 #define IPATH_GPIO_ERRINTR_MASK 0x38
 842
 843 /* portdata flag bit offsets */
 844                 /* waiting for a packet to arrive */
 845 #define IPATH_PORT_WAITING_RCV   2
 846                 /* master has not finished initializing */
 847 #define IPATH_PORT_MASTER_UNINIT 4
 848                 /* waiting for an urgent packet to arrive */
 849 #define IPATH_PORT_WAITING_URG 5
 850
 851 /* free up any allocated data at closes */
 852 void ipath_free_data(struct ipath_portdata *dd);
 853 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
 854 void ipath_init_iba6120_funcs(struct ipath_devdata *);
 855 void ipath_init_iba6110_funcs(struct ipath_devdata *);
 856 void ipath_get_eeprom_info(struct ipath_devdata *);
 857 int ipath_update_eeprom_log(struct ipath_devdata *dd);
 858 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
 859 u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
 860 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev);
 861
 862 /*
 863  * Set LED override, only the two LSBs have "public" meaning, but
 864  * any non-zero value substitutes them for the Link and LinkTrain
 865  * LED states.
 866  */
 867 #define IPATH_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
 868 #define IPATH_LED_LOG 2  /* Logical (link) YELLOW LED */
 869 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val);
 870
 871 /*
 872  * number of words used for protocol header if not set by ipath_userinit();
 873  */
 874 #define IPATH_DFLT_RCVHDRSIZE 9
 875
 876 int ipath_get_user_pages(unsigned long, size_t, struct page **);
 877 void ipath_release_user_pages(struct page **, size_t);
 878 void ipath_release_user_pages_on_close(struct page **, size_t);
 879 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
 880 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
 881
 882 /* these are used for the registers that vary with port */
 883 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
 884                            unsigned, u64);
 885
 886 /*
 887  * We could have a single register get/put routine, that takes a group type,
 888  * but this is somewhat clearer and cleaner.  It also gives us some error
 889  * checking.  64 bit register reads should always work, but are inefficient
 890  * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
 891  * so we use kreg32 wherever possible.  User register and counter register
 892  * reads are always 32 bit reads, so only one form of those routines.
 893  */
 894
 895 /*
 896  * At the moment, none of the s-registers are writable, so no
 897  * ipath_write_sreg(), and none of the c-registers are writable, so no
 898  * ipath_write_creg().
 899  */
 900
 901 /**
 902  * ipath_read_ureg32 - read 32-bit virtualized per-port register
 903  * @dd: device
 904  * @regno: register number
 905  * @port: port number
 906  *
 907  * Return the contents of a register that is virtualized to be per port.
 908  * Returns -1 on errors (not distinguishable from valid contents at
 909  * runtime; we may add a separate error variable at some point).
 910  */
 911 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
 912                                     ipath_ureg regno, int port)
 913 {
 914         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 915                 return 0;
 916
 917         return readl(regno + (u64 __iomem *)
 918                      (dd->ipath_uregbase +
 919                       (char __iomem *)dd->ipath_kregbase +
 920                       dd->ipath_ureg_align * port));
 921 }
 922
 923 /**
 924  * ipath_write_ureg - write 32-bit virtualized per-port register
 925  * @dd: device
 926  * @regno: register number
 927  * @value: value
 928  * @port: port
 929  *
 930  * Write the contents of a register that is virtualized to be per port.
 931  */
 932 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
 933                                     ipath_ureg regno, u64 value, int port)
 934 {
 935         u64 __iomem *ubase = (u64 __iomem *)
 936                 (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
 937                  dd->ipath_ureg_align * port);
 938         if (dd->ipath_kregbase)
 939                 writeq(value, &ubase[regno]);
 940 }
 941
 942 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
 943                                     ipath_kreg regno)
 944 {
 945         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 946                 return -1;
 947         return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
 948 }
 949
 950 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
 951                                     ipath_kreg regno)
 952 {
 953         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 954                 return -1;
 955
 956         return readq(&dd->ipath_kregbase[regno]);
 957 }
 958
 959 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
 960                                     ipath_kreg regno, u64 value)
 961 {
 962         if (dd->ipath_kregbase)
 963                 writeq(value, &dd->ipath_kregbase[regno]);
 964 }
 965
 966 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
 967                                   ipath_sreg regno)
 968 {
 969         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 970                 return 0;
 971
 972         return readq(regno + (u64 __iomem *)
 973                      (dd->ipath_cregbase +
 974                       (char __iomem *)dd->ipath_kregbase));
 975 }
 976
 977 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
 978                                          ipath_sreg regno)
 979 {
 980         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 981                 return 0;
 982         return readl(regno + (u64 __iomem *)
 983                      (dd->ipath_cregbase +
 984                       (char __iomem *)dd->ipath_kregbase));
 985 }
 986
 987 static inline void ipath_write_creg(const struct ipath_devdata *dd,
 988                                     ipath_creg regno, u64 value)
 989 {
 990         if (dd->ipath_kregbase)
 991                 writeq(value, regno + (u64 __iomem *)
 992                        (dd->ipath_cregbase +
 993                         (char __iomem *)dd->ipath_kregbase));
 994 }
 995
 996 static inline void ipath_clear_rcvhdrtail(const struct ipath_portdata *pd)
 997 {
 998         *((u64 *) pd->port_rcvhdrtail_kvaddr) = 0ULL;
 999 }
1000
1001 static inline u32 ipath_get_rcvhdrtail(const struct ipath_portdata *pd)
1002 {
1003         return (u32) le64_to_cpu(*((volatile __le64 *)
1004                                 pd->port_rcvhdrtail_kvaddr));
1005 }
1006
1007 static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
1008 {
1009         return (dd->ipath_flags & IPATH_INTREG_64) ?
1010                 ipath_read_kreg64(dd, r) : ipath_read_kreg32(dd, r);
1011 }
1012
1013 /*
1014  * from contents of IBCStatus (or a saved copy), return linkstate
1015  * Report ACTIVE_DEFER as ACTIVE, because we treat them the same
1016  * everywhere, anyway (and should be, for almost all purposes).
1017  */
1018 static inline u32 ipath_ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
1019 {
1020         u32 state = (u32)(ibcs >> dd->ibcs_ls_shift) &
1021                 INFINIPATH_IBCS_LINKSTATE_MASK;
1022         if (state == INFINIPATH_IBCS_L_STATE_ACT_DEFER)
1023                 state = INFINIPATH_IBCS_L_STATE_ACTIVE;
1024         return state;
1025 }
1026
1027 /* from contents of IBCStatus (or a saved copy), return linktrainingstate */
1028 static inline u32 ipath_ib_linktrstate(struct ipath_devdata *dd, u64 ibcs)
1029 {
1030         return (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1031                 dd->ibcs_lts_mask;
1032 }
1033
1034 /*
1035  * sysfs interface.
1036  */
1037
1038 struct device_driver;
1039
1040 extern const char ib_ipath_version[];
1041
1042 extern struct attribute_group *ipath_driver_attr_groups[];
1043
1044 int ipath_device_create_group(struct device *, struct ipath_devdata *);
1045 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
1046 int ipath_expose_reset(struct device *);
1047
1048 int ipath_init_ipathfs(void);
1049 void ipath_exit_ipathfs(void);
1050 int ipathfs_add_device(struct ipath_devdata *);
1051 int ipathfs_remove_device(struct ipath_devdata *);
1052
1053 /*
1054  * dma_addr wrappers - all 0's invalid for hw
1055  */
1056 dma_addr_t ipath_map_page(struct pci_dev *, struct page *, unsigned long,
1057                           size_t, int);
1058 dma_addr_t ipath_map_single(struct pci_dev *, void *, size_t, int);
1059
1060 /*
1061  * Flush write combining store buffers (if present) and perform a write
1062  * barrier.
1063  */
1064 #if defined(CONFIG_X86_64)
1065 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
1066 #else
1067 #define ipath_flush_wc() wmb()
1068 #endif
1069
1070 extern unsigned ipath_debug; /* debugging bit mask */
1071
1072 #define IPATH_MAX_PARITY_ATTEMPTS 10000 /* max times to try recovery */
1073
1074 const char *ipath_get_unit_name(int unit);
1075
1076 extern struct mutex ipath_mutex;
1077
1078 #define IPATH_DRV_NAME          "ib_ipath"
1079 #define IPATH_MAJOR             233
1080 #define IPATH_USER_MINOR_BASE   0
1081 #define IPATH_DIAGPKT_MINOR     127
1082 #define IPATH_DIAG_MINOR_BASE   129
1083 #define IPATH_NMINORS           255
1084
1085 #define ipath_dev_err(dd,fmt,...) \
1086         do { \
1087                 const struct ipath_devdata *__dd = (dd); \
1088                 if (__dd->pcidev) \
1089                         dev_err(&__dd->pcidev->dev, "%s: " fmt, \
1090                                 ipath_get_unit_name(__dd->ipath_unit), \
1091                                 ##__VA_ARGS__); \
1092                 else \
1093                         printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
1094                                ipath_get_unit_name(__dd->ipath_unit), \
1095                                ##__VA_ARGS__); \
1096         } while (0)
1097
1098 #if _IPATH_DEBUGGING
1099
1100 # define __IPATH_DBG_WHICH(which,fmt,...) \
1101         do { \
1102                 if(unlikely(ipath_debug&(which))) \
1103                         printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
1104                                __func__,##__VA_ARGS__); \
1105         } while(0)
1106
1107 # define ipath_dbg(fmt,...) \
1108         __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
1109 # define ipath_cdbg(which,fmt,...) \
1110         __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
1111
1112 #else /* ! _IPATH_DEBUGGING */
1113
1114 # define ipath_dbg(fmt,...)
1115 # define ipath_cdbg(which,fmt,...)
1116
1117 #endif /* _IPATH_DEBUGGING */
1118
1119 /*
1120  * this is used for formatting hw error messages...
1121  */
1122 struct ipath_hwerror_msgs {
1123         u64 mask;
1124         const char *msg;
1125 };
1126
1127 #define INFINIPATH_HWE_MSG(a, b) { .mask = INFINIPATH_HWE_##a, .msg = b }
1128
1129 /* in ipath_intr.c... */
1130 void ipath_format_hwerrors(u64 hwerrs,
1131                            const struct ipath_hwerror_msgs *hwerrmsgs,
1132                            size_t nhwerrmsgs,
1133                            char *msg, size_t lmsg);
1134
1135 #endif                          /* _IPATH_KERNEL_H */