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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / ata / pata_ali.c
blobb9cabd34099cfa8f5048cb6272c54af306397bcc
1 /*
2 * pata_ali.c - ALI 15x3 PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * based in part upon
7 * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
8 *
9 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
10 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
11 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
12 *
13 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
14 * May be copied or modified under the terms of the GNU General Public License
15 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
16 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
17 *
18 * Documentation
19 * Chipset documentation available under NDA only
20 *
21 * TODO/CHECK
22 * Cannot have ATAPI on both master & slave for rev < c2 (???) but
23 * otherwise should do atapi DMA.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/dmi.h>
35
36 #define DRV_NAME "pata_ali"
37 #define DRV_VERSION "0.7.5"
38
39 /*
40 * Cable special cases
41 */
42
43 static const struct dmi_system_id cable_dmi_table[] = {
44 {
45 .ident = "HP Pavilion N5430",
46 .matches = {
47 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
48 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
49 },
50 },
51 {
52 .ident = "Toshiba Satelite S1800-814",
53 .matches = {
54 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
55 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
56 },
57 },
58 { }
59 };
60
61 static int ali_cable_override(struct pci_dev *pdev)
62 {
63 /* Fujitsu P2000 */
64 if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
65 return 1;
66 /* Mitac 8317 (Winbook-A) and relatives */
67 if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317)
68 return 1;
69 /* Systems by DMI */
70 if (dmi_check_system(cable_dmi_table))
71 return 1;
72 return 0;
73 }
74
75 /**
76 * ali_c2_cable_detect - cable detection
77 * @ap: ATA port
78 *
79 * Perform cable detection for C2 and later revisions
80 */
81
82 static int ali_c2_cable_detect(struct ata_port *ap)
83 {
84 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
85 u8 ata66;
86
87 /* Certain laptops use short but suitable cables and don't
88 implement the detect logic */
89
90 if (ali_cable_override(pdev))
91 return ATA_CBL_PATA40_SHORT;
92
93 /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
94 Bit set for 40 pin */
95 pci_read_config_byte(pdev, 0x4A, &ata66);
96 if (ata66 & (1 << ap->port_no))
97 return ATA_CBL_PATA40;
98 else
99 return ATA_CBL_PATA80;
100 }
101
102 /**
103 * ali_20_filter - filter for earlier ALI DMA
104 * @ap: ALi ATA port
105 * @adev: attached device
106 *
107 * Ensure that we do not do DMA on CD devices. We may be able to
108 * fix that later on. Also ensure we do not do UDMA on WDC drives
109 */
110
111 static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
112 {
113 char model_num[ATA_ID_PROD_LEN + 1];
114 /* No DMA on anything but a disk for now */
115 if (adev->class != ATA_DEV_ATA)
116 mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
117 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
118 if (strstr(model_num, "WDC"))
119 return mask &= ~ATA_MASK_UDMA;
120 return ata_pci_default_filter(adev, mask);
121 }
122
123 /**
124 * ali_fifo_control - FIFO manager
125 * @ap: ALi channel to control
126 * @adev: device for FIFO control
127 * @on: 0 for off 1 for on
128 *
129 * Enable or disable the FIFO on a given device. Because of the way the
130 * ALi FIFO works it provides a boost on ATA disk but can be confused by
131 * ATAPI and we must therefore manage it.
132 */
133
134 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
135 {
136 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
137 int pio_fifo = 0x54 + ap->port_no;
138 u8 fifo;
139 int shift = 4 * adev->devno;
140
141 /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
142 0x00. Not all the docs agree but the behaviour we now use is the
143 one stated in the BIOS Programming Guide */
144
145 pci_read_config_byte(pdev, pio_fifo, &fifo);
146 fifo &= ~(0x0F << shift);
147 if (on)
148 fifo |= (on << shift);
149 pci_write_config_byte(pdev, pio_fifo, fifo);
150 }
151
152 /**
153 * ali_program_modes - load mode registers
154 * @ap: ALi channel to load
155 * @adev: Device the timing is for
156 * @cmd: Command timing
157 * @data: Data timing
158 * @ultra: UDMA timing or zero for off
159 *
160 * Loads the timing registers for cmd/data and disable UDMA if
161 * ultra is zero. If ultra is set then load and enable the UDMA
162 * timing but do not touch the command/data timing.
163 */
164
165 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
166 {
167 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
168 int cas = 0x58 + 4 * ap->port_no; /* Command timing */
169 int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
170 int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
171 int udmat = 0x56 + ap->port_no; /* UDMA timing */
172 int shift = 4 * adev->devno;
173 u8 udma;
174
175 if (t != NULL) {
176 t->setup = FIT(t->setup, 1, 8) & 7;
177 t->act8b = FIT(t->act8b, 1, 8) & 7;
178 t->rec8b = FIT(t->rec8b, 1, 16) & 15;
179 t->active = FIT(t->active, 1, 8) & 7;
180 t->recover = FIT(t->recover, 1, 16) & 15;
181
182 pci_write_config_byte(pdev, cas, t->setup);
183 pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
184 pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
185 }
186
187 /* Set up the UDMA enable */
188 pci_read_config_byte(pdev, udmat, &udma);
189 udma &= ~(0x0F << shift);
190 udma |= ultra << shift;
191 pci_write_config_byte(pdev, udmat, udma);
192 }
193
194 /**
195 * ali_set_piomode - set initial PIO mode data
196 * @ap: ATA interface
197 * @adev: ATA device
198 *
199 * Program the ALi registers for PIO mode. FIXME: add timings for
200 * PIO5.
201 */
202
203 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
204 {
205 struct ata_device *pair = ata_dev_pair(adev);
206 struct ata_timing t;
207 unsigned long T = 1000000000 / 33333; /* PCI clock based */
208
209 ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
210 if (pair) {
211 struct ata_timing p;
212 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
213 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
214 if (pair->dma_mode) {
215 ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
216 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
217 }
218 }
219
220 /* PIO FIFO is only permitted on ATA disk */
221 if (adev->class != ATA_DEV_ATA)
222 ali_fifo_control(ap, adev, 0x00);
223 ali_program_modes(ap, adev, &t, 0);
224 if (adev->class == ATA_DEV_ATA)
225 ali_fifo_control(ap, adev, 0x05);
226
227 }
228
229 /**
230 * ali_set_dmamode - set initial DMA mode data
231 * @ap: ATA interface
232 * @adev: ATA device
233 *
234 * FIXME: MWDMA timings
235 */
236
237 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
238 {
239 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
240 struct ata_device *pair = ata_dev_pair(adev);
241 struct ata_timing t;
242 unsigned long T = 1000000000 / 33333; /* PCI clock based */
243 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
244
245
246 if (adev->class == ATA_DEV_ATA)
247 ali_fifo_control(ap, adev, 0x08);
248
249 if (adev->dma_mode >= XFER_UDMA_0) {
250 ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
251 if (adev->dma_mode >= XFER_UDMA_3) {
252 u8 reg4b;
253 pci_read_config_byte(pdev, 0x4B, &reg4b);
254 reg4b |= 1;
255 pci_write_config_byte(pdev, 0x4B, reg4b);
256 }
257 } else {
258 ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
259 if (pair) {
260 struct ata_timing p;
261 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
262 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
263 if (pair->dma_mode) {
264 ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
265 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
266 }
267 }
268 ali_program_modes(ap, adev, &t, 0);
269 }
270 }
271
272 /**
273 * ali_lock_sectors - Keep older devices to 255 sector mode
274 * @adev: Device
275 *
276 * Called during the bus probe for each device that is found. We use
277 * this call to lock the sector count of the device to 255 or less on
278 * older ALi controllers. If we didn't do this then large I/O's would
279 * require LBA48 commands which the older ALi requires are issued by
280 * slower PIO methods
281 */
282
283 static void ali_lock_sectors(struct ata_device *adev)
284 {
285 adev->max_sectors = 255;
286 }
287
288 /**
289 * ali_check_atapi_dma - DMA check for most ALi controllers
290 * @adev: Device
291 *
292 * Called to decide whether commands should be sent by DMA or PIO
293 */
294
295 static int ali_check_atapi_dma(struct ata_queued_cmd *qc)
296 {
297 /* If its not a media command, its not worth it */
298 <<<<<<< HEAD:drivers/ata/pata_ali.c
299 if (qc->nbytes < 2048)
300 =======
301 if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC)
302 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/ata/pata_ali.c
303 return -EOPNOTSUPP;
304 return 0;
305 }
306
307 static struct scsi_host_template ali_sht = {
308 .module = THIS_MODULE,
309 .name = DRV_NAME,
310 .ioctl = ata_scsi_ioctl,
311 .queuecommand = ata_scsi_queuecmd,
312 .can_queue = ATA_DEF_QUEUE,
313 .this_id = ATA_SHT_THIS_ID,
314 .sg_tablesize = LIBATA_MAX_PRD,
315 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
316 .emulated = ATA_SHT_EMULATED,
317 .use_clustering = ATA_SHT_USE_CLUSTERING,
318 .proc_name = DRV_NAME,
319 .dma_boundary = ATA_DMA_BOUNDARY,
320 .slave_configure = ata_scsi_slave_config,
321 .slave_destroy = ata_scsi_slave_destroy,
322 .bios_param = ata_std_bios_param,
323 };
324
325 /*
326 * Port operations for PIO only ALi
327 */
328
329 static struct ata_port_operations ali_early_port_ops = {
330 .set_piomode = ali_set_piomode,
331 .tf_load = ata_tf_load,
332 .tf_read = ata_tf_read,
333 .check_status = ata_check_status,
334 .exec_command = ata_exec_command,
335 .dev_select = ata_std_dev_select,
336
337 .freeze = ata_bmdma_freeze,
338 .thaw = ata_bmdma_thaw,
339 .error_handler = ata_bmdma_error_handler,
340 .post_internal_cmd = ata_bmdma_post_internal_cmd,
341 .cable_detect = ata_cable_40wire,
342
343 .qc_prep = ata_qc_prep,
344 .qc_issue = ata_qc_issue_prot,
345
346 .data_xfer = ata_data_xfer,
347
348 .irq_handler = ata_interrupt,
349 .irq_clear = ata_bmdma_irq_clear,
350 .irq_on = ata_irq_on,
351
352 .port_start = ata_sff_port_start,
353 };
354
355 /*
356 * Port operations for DMA capable ALi without cable
357 * detect
358 */
359 static struct ata_port_operations ali_20_port_ops = {
360 .set_piomode = ali_set_piomode,
361 .set_dmamode = ali_set_dmamode,
362 .mode_filter = ali_20_filter,
363
364 .tf_load = ata_tf_load,
365 .tf_read = ata_tf_read,
366 .check_status = ata_check_status,
367 .exec_command = ata_exec_command,
368 .dev_select = ata_std_dev_select,
369 .dev_config = ali_lock_sectors,
370
371 .freeze = ata_bmdma_freeze,
372 .thaw = ata_bmdma_thaw,
373 .error_handler = ata_bmdma_error_handler,
374 .post_internal_cmd = ata_bmdma_post_internal_cmd,
375 .cable_detect = ata_cable_40wire,
376
377 .bmdma_setup = ata_bmdma_setup,
378 .bmdma_start = ata_bmdma_start,
379 .bmdma_stop = ata_bmdma_stop,
380 .bmdma_status = ata_bmdma_status,
381
382 .qc_prep = ata_qc_prep,
383 .qc_issue = ata_qc_issue_prot,
384
385 .data_xfer = ata_data_xfer,
386
387 .irq_handler = ata_interrupt,
388 .irq_clear = ata_bmdma_irq_clear,
389 .irq_on = ata_irq_on,
390
391 .port_start = ata_sff_port_start,
392 };
393
394 /*
395 * Port operations for DMA capable ALi with cable detect
396 */
397 static struct ata_port_operations ali_c2_port_ops = {
398 .set_piomode = ali_set_piomode,
399 .set_dmamode = ali_set_dmamode,
400 .mode_filter = ata_pci_default_filter,
401 .tf_load = ata_tf_load,
402 .tf_read = ata_tf_read,
403 .check_atapi_dma = ali_check_atapi_dma,
404 .check_status = ata_check_status,
405 .exec_command = ata_exec_command,
406 .dev_select = ata_std_dev_select,
407 .dev_config = ali_lock_sectors,
408
409 .freeze = ata_bmdma_freeze,
410 .thaw = ata_bmdma_thaw,
411 .error_handler = ata_bmdma_error_handler,
412 .post_internal_cmd = ata_bmdma_post_internal_cmd,
413 .cable_detect = ali_c2_cable_detect,
414
415 .bmdma_setup = ata_bmdma_setup,
416 .bmdma_start = ata_bmdma_start,
417 .bmdma_stop = ata_bmdma_stop,
418 .bmdma_status = ata_bmdma_status,
419
420 .qc_prep = ata_qc_prep,
421 .qc_issue = ata_qc_issue_prot,
422
423 .data_xfer = ata_data_xfer,
424
425 .irq_handler = ata_interrupt,
426 .irq_clear = ata_bmdma_irq_clear,
427 .irq_on = ata_irq_on,
428
429 .port_start = ata_sff_port_start,
430 };
431
432 /*
433 * Port operations for DMA capable ALi with cable detect and LBA48
434 */
435 static struct ata_port_operations ali_c5_port_ops = {
436 .set_piomode = ali_set_piomode,
437 .set_dmamode = ali_set_dmamode,
438 .mode_filter = ata_pci_default_filter,
439 .tf_load = ata_tf_load,
440 .tf_read = ata_tf_read,
441 .check_atapi_dma = ali_check_atapi_dma,
442 .check_status = ata_check_status,
443 .exec_command = ata_exec_command,
444 .dev_select = ata_std_dev_select,
445
446 .freeze = ata_bmdma_freeze,
447 .thaw = ata_bmdma_thaw,
448 .error_handler = ata_bmdma_error_handler,
449 .post_internal_cmd = ata_bmdma_post_internal_cmd,
450 .cable_detect = ali_c2_cable_detect,
451
452 .bmdma_setup = ata_bmdma_setup,
453 .bmdma_start = ata_bmdma_start,
454 .bmdma_stop = ata_bmdma_stop,
455 .bmdma_status = ata_bmdma_status,
456
457 .qc_prep = ata_qc_prep,
458 .qc_issue = ata_qc_issue_prot,
459
460 .data_xfer = ata_data_xfer,
461
462 .irq_handler = ata_interrupt,
463 .irq_clear = ata_bmdma_irq_clear,
464 .irq_on = ata_irq_on,
465
466 .port_start = ata_sff_port_start,
467 };
468
469
470 /**
471 * ali_init_chipset - chip setup function
472 * @pdev: PCI device of ATA controller
473 *
474 * Perform the setup on the device that must be done both at boot
475 * and at resume time.
476 */
477
478 static void ali_init_chipset(struct pci_dev *pdev)
479 {
480 u8 tmp;
481 struct pci_dev *north, *isa_bridge;
482
483 /*
484 * The chipset revision selects the driver operations and
485 * mode data.
486 */
487
488 if (pdev->revision >= 0x20 && pdev->revision < 0xC2) {
489 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
490 pci_read_config_byte(pdev, 0x4B, &tmp);
491 /* Clear CD-ROM DMA write bit */
492 tmp &= 0x7F;
493 pci_write_config_byte(pdev, 0x4B, tmp);
494 } else if (pdev->revision >= 0xC2) {
495 /* Enable cable detection logic */
496 pci_read_config_byte(pdev, 0x4B, &tmp);
497 pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
498 }
499 north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
500 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
501
502 if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
503 /* Configure the ALi bridge logic. For non ALi rely on BIOS.
504 Set the south bridge enable bit */
505 pci_read_config_byte(isa_bridge, 0x79, &tmp);
506 if (pdev->revision == 0xC2)
507 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
508 else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
509 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
510 }
511 if (pdev->revision >= 0x20) {
512 /*
513 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
514 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
515 * via 0x54/55.
516 */
517 pci_read_config_byte(pdev, 0x53, &tmp);
518 if (pdev->revision <= 0x20)
519 tmp &= ~0x02;
520 if (pdev->revision >= 0xc7)
521 tmp |= 0x03;
522 else
523 tmp |= 0x01; /* CD_ROM enable for DMA */
524 pci_write_config_byte(pdev, 0x53, tmp);
525 }
526 pci_dev_put(isa_bridge);
527 pci_dev_put(north);
528 ata_pci_clear_simplex(pdev);
529 }
530 /**
531 * ali_init_one - discovery callback
532 * @pdev: PCI device ID
533 * @id: PCI table info
534 *
535 * An ALi IDE interface has been discovered. Figure out what revision
536 * and perform configuration work before handing it to the ATA layer
537 */
538
539 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
540 {
541 static const struct ata_port_info info_early = {
542 .sht = &ali_sht,
543 .flags = ATA_FLAG_SLAVE_POSS,
544 .pio_mask = 0x1f,
545 .port_ops = &ali_early_port_ops
546 };
547 /* Revision 0x20 added DMA */
548 static const struct ata_port_info info_20 = {
549 .sht = &ali_sht,
550 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
551 .pio_mask = 0x1f,
552 .mwdma_mask = 0x07,
553 .port_ops = &ali_20_port_ops
554 };
555 /* Revision 0x20 with support logic added UDMA */
556 static const struct ata_port_info info_20_udma = {
557 .sht = &ali_sht,
558 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
559 .pio_mask = 0x1f,
560 .mwdma_mask = 0x07,
561 .udma_mask = 0x07, /* UDMA33 */
562 .port_ops = &ali_20_port_ops
563 };
564 /* Revision 0xC2 adds UDMA66 */
565 static const struct ata_port_info info_c2 = {
566 .sht = &ali_sht,
567 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
568 .pio_mask = 0x1f,
569 .mwdma_mask = 0x07,
570 .udma_mask = ATA_UDMA4,
571 .port_ops = &ali_c2_port_ops
572 };
573 /* Revision 0xC3 is UDMA66 for now */
574 static const struct ata_port_info info_c3 = {
575 .sht = &ali_sht,
576 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
577 .pio_mask = 0x1f,
578 .mwdma_mask = 0x07,
579 .udma_mask = ATA_UDMA4,
580 .port_ops = &ali_c2_port_ops
581 };
582 /* Revision 0xC4 is UDMA100 */
583 static const struct ata_port_info info_c4 = {
584 .sht = &ali_sht,
585 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
586 .pio_mask = 0x1f,
587 .mwdma_mask = 0x07,
588 .udma_mask = ATA_UDMA5,
589 .port_ops = &ali_c2_port_ops
590 };
591 /* Revision 0xC5 is UDMA133 with LBA48 DMA */
592 static const struct ata_port_info info_c5 = {
593 .sht = &ali_sht,
594 .flags = ATA_FLAG_SLAVE_POSS,
595 .pio_mask = 0x1f,
596 .mwdma_mask = 0x07,
597 .udma_mask = ATA_UDMA6,
598 .port_ops = &ali_c5_port_ops
599 };
600
601 const struct ata_port_info *ppi[] = { NULL, NULL };
602 u8 tmp;
603 struct pci_dev *isa_bridge;
604
605 /*
606 * The chipset revision selects the driver operations and
607 * mode data.
608 */
609
610 if (pdev->revision < 0x20) {
611 ppi[0] = &info_early;
612 } else if (pdev->revision < 0xC2) {
613 ppi[0] = &info_20;
614 } else if (pdev->revision == 0xC2) {
615 ppi[0] = &info_c2;
616 } else if (pdev->revision == 0xC3) {
617 ppi[0] = &info_c3;
618 } else if (pdev->revision == 0xC4) {
619 ppi[0] = &info_c4;
620 } else
621 ppi[0] = &info_c5;
622
623 ali_init_chipset(pdev);
624
625 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
626 if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
627 /* Are we paired with a UDMA capable chip */
628 pci_read_config_byte(isa_bridge, 0x5E, &tmp);
629 if ((tmp & 0x1E) == 0x12)
630 ppi[0] = &info_20_udma;
631 pci_dev_put(isa_bridge);
632 }
633 return ata_pci_init_one(pdev, ppi);
634 }
635
636 #ifdef CONFIG_PM
637 static int ali_reinit_one(struct pci_dev *pdev)
638 {
639 ali_init_chipset(pdev);
640 return ata_pci_device_resume(pdev);
641 }
642 #endif
643
644 static const struct pci_device_id ali[] = {
645 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
646 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
647
648 { },
649 };
650
651 static struct pci_driver ali_pci_driver = {
652 .name = DRV_NAME,
653 .id_table = ali,
654 .probe = ali_init_one,
655 .remove = ata_pci_remove_one,
656 #ifdef CONFIG_PM
657 .suspend = ata_pci_device_suspend,
658 .resume = ali_reinit_one,
659 #endif
660 };
661
662 static int __init ali_init(void)
663 {
664 return pci_register_driver(&ali_pci_driver);
665 }
666
667
668 static void __exit ali_exit(void)
669 {
670 pci_unregister_driver(&ali_pci_driver);
671 }
672
673
674 MODULE_AUTHOR("Alan Cox");
675 MODULE_DESCRIPTION("low-level driver for ALi PATA");
676 MODULE_LICENSE("GPL");
677 MODULE_DEVICE_TABLE(pci, ali);
678 MODULE_VERSION(DRV_VERSION);
679
680 module_init(ali_init);
681 module_exit(ali_exit);
WRT350N Kernel Patches