arch/sh/kernel/timers/timer-cmt.c

   1 /*
   2  * arch/sh/kernel/timers/timer-cmt.c - CMT Timer Support
   3  *
   4  *  Copyright (C) 2005  Yoshinori Sato
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/seqlock.h>
  15 #include <asm/timer.h>
  16 #include <asm/rtc.h>
  17 #include <asm/io.h>
  18 #include <asm/irq.h>
  19 #include <asm/clock.h>
  20
  21 #if defined(CONFIG_CPU_SUBTYPE_SH7619)
  22 #define CMT_CMSTR       0xf84a0070
  23 #define CMT_CMCSR_0     0xf84a0072
  24 #define CMT_CMCNT_0     0xf84a0074
  25 #define CMT_CMCOR_0     0xf84a0076
  26 #define CMT_CMCSR_1     0xf84a0078
  27 #define CMT_CMCNT_1     0xf84a007a
  28 #define CMT_CMCOR_1     0xf84a007c
  29
  30 #define STBCR3          0xf80a0000
  31 #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0)
  32 #define CMT_CMCSR_INIT  0x0040
  33 #define CMT_CMCSR_CALIB 0x0000
  34 #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
  35       defined(CONFIG_CPU_SUBTYPE_SH7206) || \
  36       defined(CONFIG_CPU_SUBTYPE_SH7263)
  37 #define CMT_CMSTR       0xfffec000
  38 #define CMT_CMCSR_0     0xfffec002
  39 #define CMT_CMCNT_0     0xfffec004
  40 #define CMT_CMCOR_0     0xfffec006
  41
  42 #define STBCR4          0xfffe040c
  43 #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR4) & ~0x04, STBCR4); } while(0)
  44 #define CMT_CMCSR_INIT  0x0040
  45 #define CMT_CMCSR_CALIB 0x0000
  46 #else
  47 #error "Unknown CPU SUBTYPE"
  48 #endif
  49
  50 static unsigned long cmt_timer_get_offset(void)
  51 {
  52         int count;
  53         static unsigned short count_p = 0xffff;    /* for the first call after boot */
  54         static unsigned long jiffies_p = 0;
  55
  56         /*
  57          * cache volatile jiffies temporarily; we have IRQs turned off.
  58          */
  59         unsigned long jiffies_t;
  60
  61         /* timer count may underflow right here */
  62         count =  ctrl_inw(CMT_CMCOR_0);
  63         count -= ctrl_inw(CMT_CMCNT_0);
  64
  65         jiffies_t = jiffies;
  66
  67         /*
  68          * avoiding timer inconsistencies (they are rare, but they happen)...
  69          * there is one kind of problem that must be avoided here:
  70          *  1. the timer counter underflows
  71          */
  72
  73         if (jiffies_t == jiffies_p) {
  74                 if (count > count_p) {
  75                         /* the nutcase */
  76                         if (ctrl_inw(CMT_CMCSR_0) & 0x80) { /* Check CMF bit */
  77                                 count -= LATCH;
  78                         } else {
  79                                 printk("%s (): hardware timer problem?\n",
  80 <<<<<<< HEAD:arch/sh/kernel/timers/timer-cmt.c
  81                                        __FUNCTION__);
  82 =======
  83                                        __func__);
  84 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/sh/kernel/timers/timer-cmt.c
  85                         }
  86                 }
  87         } else
  88                 jiffies_p = jiffies_t;
  89
  90         count_p = count;
  91
  92         count = ((LATCH-1) - count) * TICK_SIZE;
  93         count = (count + LATCH/2) / LATCH;
  94
  95         return count;
  96 }
  97
  98 static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id)
  99 {
 100         unsigned long timer_status;
 101
 102         /* Clear CMF bit */
 103         timer_status = ctrl_inw(CMT_CMCSR_0);
 104         timer_status &= ~0x80;
 105         ctrl_outw(timer_status, CMT_CMCSR_0);
 106
 107         handle_timer_tick();
 108
 109         return IRQ_HANDLED;
 110 }
 111
 112 static struct irqaction cmt_irq = {
 113         .name           = "timer",
 114         .handler        = cmt_timer_interrupt,
 115         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 116         .mask           = CPU_MASK_NONE,
 117 };
 118
 119 static void cmt_clk_init(struct clk *clk)
 120 {
 121         u8 divisor = CMT_CMCSR_INIT & 0x3;
 122         ctrl_inw(CMT_CMCSR_0);
 123         ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0);
 124         clk->parent = clk_get(NULL, "module_clk");
 125         clk->rate = clk->parent->rate / (8 << (divisor << 1));
 126 }
 127
 128 static void cmt_clk_recalc(struct clk *clk)
 129 {
 130         u8 divisor = ctrl_inw(CMT_CMCSR_0) & 0x3;
 131         clk->rate = clk->parent->rate / (8 << (divisor << 1));
 132 }
 133
 134 static struct clk_ops cmt_clk_ops = {
 135         .init           = cmt_clk_init,
 136         .recalc         = cmt_clk_recalc,
 137 };
 138
 139 static struct clk cmt0_clk = {
 140         .name           = "cmt0_clk",
 141         .ops            = &cmt_clk_ops,
 142 };
 143
 144 static int cmt_timer_start(void)
 145 {
 146         ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
 147         return 0;
 148 }
 149
 150 static int cmt_timer_stop(void)
 151 {
 152         ctrl_outw(ctrl_inw(CMT_CMSTR) & ~0x01, CMT_CMSTR);
 153         return 0;
 154 }
 155
 156 static int cmt_timer_init(void)
 157 {
 158         unsigned long interval;
 159
 160         cmt_clock_enable();
 161
 162         setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq);
 163
 164         cmt0_clk.parent = clk_get(NULL, "module_clk");
 165
 166         cmt_timer_stop();
 167
 168         interval = cmt0_clk.parent->rate / 8 / HZ;
 169         printk(KERN_INFO "Interval = %ld\n", interval);
 170
 171         ctrl_outw(interval, CMT_CMCOR_0);
 172
 173         clk_register(&cmt0_clk);
 174         clk_enable(&cmt0_clk);
 175
 176         cmt_timer_start();
 177
 178         return 0;
 179 }
 180
 181 struct sys_timer_ops cmt_timer_ops = {
 182         .init           = cmt_timer_init,
 183         .start          = cmt_timer_start,
 184         .stop           = cmt_timer_stop,
 185 #ifndef CONFIG_GENERIC_TIME
 186         .get_offset     = cmt_timer_get_offset,
 187 #endif
 188 };
 189
 190 struct sys_timer cmt_timer = {
 191         .name   = "cmt",
 192         .ops    = &cmt_timer_ops,
 193 };