Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / arch / powerpc / sysdev / mpic_pasemi_msi.c
blob1039a47afb086cf8cc36fad28281f6e983e0db36
1 /*
2 * Copyright 2007, Olof Johansson, PA Semi
4 * Based on arch/powerpc/sysdev/mpic_u3msi.c:
6 * Copyright 2006, Segher Boessenkool, IBM Corporation.
7 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
12 * License.
16 #undef DEBUG
18 #include <linux/irq.h>
19 #include <linux/bootmem.h>
20 #include <linux/msi.h>
21 #include <asm/mpic.h>
22 #include <asm/prom.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
26 #include "mpic.h"
28 /* Allocate 16 interrupts per device, to give an alignment of 16,
29 * since that's the size of the grouping w.r.t. affinity. If someone
30 * needs more than 32 MSI's down the road we'll have to rethink this,
31 * but it should be OK for now.
33 #define ALLOC_CHUNK 16
35 #define PASEMI_MSI_ADDR 0xfc080000
37 /* A bit ugly, can we get this from the pci_dev somehow? */
38 static struct mpic *msi_mpic;
41 static void mpic_pasemi_msi_mask_irq(unsigned int irq)
43 pr_debug("mpic_pasemi_msi_mask_irq %d\n", irq);
44 mask_msi_irq(irq);
45 mpic_mask_irq(irq);
48 static void mpic_pasemi_msi_unmask_irq(unsigned int irq)
50 pr_debug("mpic_pasemi_msi_unmask_irq %d\n", irq);
51 mpic_unmask_irq(irq);
52 unmask_msi_irq(irq);
55 static struct irq_chip mpic_pasemi_msi_chip = {
56 .shutdown = mpic_pasemi_msi_mask_irq,
57 .mask = mpic_pasemi_msi_mask_irq,
58 .unmask = mpic_pasemi_msi_unmask_irq,
59 .eoi = mpic_end_irq,
60 .set_type = mpic_set_irq_type,
61 .set_affinity = mpic_set_affinity,
62 .typename = "PASEMI-MSI ",
65 static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
67 if (type == PCI_CAP_ID_MSIX)
68 pr_debug("pasemi_msi: MSI-X untested, trying anyway\n");
70 return 0;
73 static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
75 struct msi_desc *entry;
77 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
79 list_for_each_entry(entry, &pdev->msi_list, list) {
80 if (entry->irq == NO_IRQ)
81 continue;
83 set_irq_msi(entry->irq, NULL);
84 mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq),
85 ALLOC_CHUNK);
86 irq_dispose_mapping(entry->irq);
89 return;
92 static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
94 irq_hw_number_t hwirq;
95 unsigned int virq;
96 struct msi_desc *entry;
97 struct msi_msg msg;
98 <<<<<<< HEAD:arch/powerpc/sysdev/mpic_pasemi_msi.c
99 u64 addr;
100 =======
101 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/sysdev/mpic_pasemi_msi.c
103 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
104 pdev, nvec, type);
106 msg.address_hi = 0;
107 msg.address_lo = PASEMI_MSI_ADDR;
109 list_for_each_entry(entry, &pdev->msi_list, list) {
110 /* Allocate 16 interrupts for now, since that's the grouping for
111 * affinity. This can be changed later if it turns out 32 is too
112 * few MSIs for someone, but restrictions will apply to how the
113 * sources can be changed independently.
115 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
116 if (hwirq < 0) {
117 pr_debug("pasemi_msi: failed allocating hwirq\n");
118 return hwirq;
121 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
122 if (virq == NO_IRQ) {
123 pr_debug("pasemi_msi: failed mapping hwirq 0x%lx\n", hwirq);
124 mpic_msi_free_hwirqs(msi_mpic, hwirq, ALLOC_CHUNK);
125 return -ENOSPC;
128 /* Vector on MSI is really an offset, the hardware adds
129 * it to the value written at the magic address. So set
130 * it to 0 to remain sane.
132 mpic_set_vector(virq, 0);
134 set_irq_msi(virq, entry);
135 set_irq_chip(virq, &mpic_pasemi_msi_chip);
136 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
138 <<<<<<< HEAD:arch/powerpc/sysdev/mpic_pasemi_msi.c
139 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%lx) addr 0x%lx\n",
140 virq, hwirq, addr);
141 =======
142 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%lx) addr 0x%x\n",
143 virq, hwirq, msg.address_lo);
144 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/sysdev/mpic_pasemi_msi.c
146 /* Likewise, the device writes [0...511] into the target
147 * register to generate MSI [512...1023]
149 msg.data = hwirq-0x200;
150 write_msi_msg(virq, &msg);
153 return 0;
156 int mpic_pasemi_msi_init(struct mpic *mpic)
158 int rc;
160 if (!mpic->irqhost->of_node ||
161 !of_device_is_compatible(mpic->irqhost->of_node,
162 "pasemi,pwrficient-openpic"))
163 return -ENODEV;
165 rc = mpic_msi_init_allocator(mpic);
166 if (rc) {
167 pr_debug("pasemi_msi: Error allocating bitmap!\n");
168 return rc;
171 pr_debug("pasemi_msi: Registering PA Semi MPIC MSI callbacks\n");
173 msi_mpic = mpic;
174 WARN_ON(ppc_md.setup_msi_irqs);
175 ppc_md.setup_msi_irqs = pasemi_msi_setup_msi_irqs;
176 ppc_md.teardown_msi_irqs = pasemi_msi_teardown_msi_irqs;
177 ppc_md.msi_check_device = pasemi_msi_check_device;
179 return 0;