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winedbg: Added a few more cases where we inspect if i386 instructions
[wine/wine64.git] / programs / winedbg / be_i386.c
blobdc8f824f4db69f2b8fa9c0a51d339615f91813ba
1 /*
2 * Debugger i386 specific functions
3 *
4 * Copyright 2004 Eric Pouech
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21 #include "debugger.h"
22 #include "wine/debug.h"
23
24 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
25
26 #ifdef __i386__
27
28 /* debugger/db_disasm.c */
29 extern void be_i386_disasm_one_insn(ADDRESS64* addr, int display);
30
31 #define STEP_FLAG 0x00000100 /* single step flag */
32 #define V86_FLAG 0x00020000
33
34 #define IS_VM86_MODE(ctx) (ctx->EFlags & V86_FLAG)
35
36 static ADDRESS_MODE get_selector_type(HANDLE hThread, const CONTEXT* ctx, WORD sel)
37 {
38 LDT_ENTRY le;
39
40 if (IS_VM86_MODE(ctx)) return AddrModeReal;
41 /* null or system selector */
42 if (!(sel & 4) || ((sel >> 3) < 17)) return AddrModeFlat;
43 if (GetThreadSelectorEntry(hThread, sel, &le))
44 return le.HighWord.Bits.Default_Big ? AddrMode1632 : AddrMode1616;
45 /* selector doesn't exist */
46 return -1;
47 }
48
49 static void* be_i386_linearize(HANDLE hThread, const ADDRESS64* addr)
50 {
51 LDT_ENTRY le;
52
53 switch (addr->Mode)
54 {
55 case AddrModeReal:
56 return (void*)((DWORD)(LOWORD(addr->Segment) << 4) + (DWORD)addr->Offset);
57 case AddrMode1632:
58 if (!(addr->Segment & 4) || ((addr->Segment >> 3) < 17))
59 return (void*)(DWORD)addr->Offset;
60 /* fall through */
61 case AddrMode1616:
62 if (!GetThreadSelectorEntry(hThread, addr->Segment, &le)) return NULL;
63 return (void*)((le.HighWord.Bits.BaseHi << 24) +
64 (le.HighWord.Bits.BaseMid << 16) + le.BaseLow +
65 (DWORD)addr->Offset);
66 break;
67 case AddrModeFlat:
68 return (void*)(DWORD)addr->Offset;
69 }
70 return NULL;
71 }
72
73 static unsigned be_i386_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
74 unsigned seg, unsigned long offset)
75 {
76 addr->Mode = AddrModeFlat;
77 addr->Segment = seg;
78 addr->Offset = offset;
79 if (seg)
80 {
81 addr->Mode = get_selector_type(hThread, ctx, seg);
82 switch (addr->Mode)
83 {
84 case AddrModeReal:
85 case AddrMode1616:
86 addr->Offset &= 0xffff;
87 break;
88 case AddrModeFlat:
89 case AddrMode1632:
90 break;
91 default:
92 addr->Mode = -1;
93 return FALSE;
94 }
95 }
96 return TRUE;
97 }
98
99 static unsigned be_i386_get_addr(HANDLE hThread, const CONTEXT* ctx,
100 enum be_cpu_addr bca, ADDRESS64* addr)
101 {
102 switch (bca)
103 {
104 case be_cpu_addr_pc:
105 return be_i386_build_addr(hThread, ctx, addr, ctx->SegCs, ctx->Eip);
106 case be_cpu_addr_stack:
107 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Esp);
108 case be_cpu_addr_frame:
109 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Ebp);
110 }
111 return FALSE;
112 }
113
114 static void be_i386_single_step(CONTEXT* ctx, unsigned enable)
115 {
116 if (enable) ctx->EFlags |= STEP_FLAG;
117 else ctx->EFlags &= ~STEP_FLAG;
118 }
119
120 static void be_i386_all_print_context(HANDLE hThread, const CONTEXT* ctx)
121 {
122 long double ST[8]; /* These are for floating regs */
123 int cnt;
124
125 /* Break out the FPU state and the floating point registers */
126 dbg_printf("Floating Point Unit status:\n");
127 dbg_printf(" FLCW:%04x ", LOWORD(ctx->FloatSave.ControlWord));
128 dbg_printf(" FLTW:%04x ", LOWORD(ctx->FloatSave.TagWord));
129 dbg_printf(" FLEO:%08x ", (unsigned int) ctx->FloatSave.ErrorOffset);
130 dbg_printf(" FLSW:%04x", LOWORD(ctx->FloatSave.StatusWord));
131
132 /* Isolate the condition code bits - note they are not contiguous */
133 dbg_printf("(CC:%ld%ld%ld%ld", (ctx->FloatSave.StatusWord & 0x00004000) >> 14,
134 (ctx->FloatSave.StatusWord & 0x00000400) >> 10,
135 (ctx->FloatSave.StatusWord & 0x00000200) >> 9,
136 (ctx->FloatSave.StatusWord & 0x00000100) >> 8);
137
138 /* Now pull out hte 3 bit of the TOP stack pointer */
139 dbg_printf(" TOP:%01x", (unsigned int) (ctx->FloatSave.StatusWord & 0x00003800) >> 11);
140
141 /* Lets analyse the error bits and indicate the status
142 * the Invalid Op flag has sub status which is tested as follows */
143 if (ctx->FloatSave.StatusWord & 0x00000001) { /* Invalid Fl OP */
144 if (ctx->FloatSave.StatusWord & 0x00000040) { /* Stack Fault */
145 if (ctx->FloatSave.StatusWord & 0x00000200) /* C1 says Overflow */
146 dbg_printf(" #IE(Stack Overflow)");
147 else
148 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
149 }
150 else dbg_printf(" #IE(Arthimetic error)"); /* Invalid Fl OP */
151 }
152
153 if (ctx->FloatSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
154 if (ctx->FloatSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
155 if (ctx->FloatSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
156 if (ctx->FloatSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
157 if (ctx->FloatSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
158 if (ctx->FloatSave.StatusWord & 0x00000040)
159 if (!(ctx->FloatSave.StatusWord & 0x00000001))
160 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
161 if (ctx->FloatSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
162 if (ctx->FloatSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
163 dbg_printf(")\n");
164
165 /* Here are the rest of the registers */
166 dbg_printf(" FLES:%08x ", (unsigned int) ctx->FloatSave.ErrorSelector);
167 dbg_printf(" FLDO:%08x ", (unsigned int) ctx->FloatSave.DataOffset);
168 dbg_printf(" FLDS:%08x ", (unsigned int) ctx->FloatSave.DataSelector);
169 dbg_printf(" FLCNS:%08x \n", (unsigned int) ctx->FloatSave.Cr0NpxState);
170
171 /* Now for the floating point registers */
172 dbg_printf("Floating Point Registers:\n");
173 for (cnt = 0; cnt < 4; cnt++)
174 {
175 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
176 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
177 }
178 dbg_printf("\n");
179 for (cnt = 4; cnt < 8; cnt++)
180 {
181 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
182 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
183 }
184 dbg_printf("\n");
185 }
186
187 static void be_i386_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
188 {
189 char buf[33];
190 char* pt;
191
192 dbg_printf("Register dump:\n");
193
194 /* First get the segment registers out of the way */
195 dbg_printf(" CS:%04x SS:%04x DS:%04x ES:%04x FS:%04x GS:%04x",
196 (WORD)ctx->SegCs, (WORD)ctx->SegSs,
197 (WORD)ctx->SegDs, (WORD)ctx->SegEs,
198 (WORD)ctx->SegFs, (WORD)ctx->SegGs);
199
200 strcpy(buf, " - 00 - - - ");
201 pt = buf + strlen(buf) - 1;
202 if (ctx->EFlags & 0x00000001) *pt-- = 'C'; /* Carry Flag */
203 if (ctx->EFlags & 0x00000002) *pt-- = '1';
204 if (ctx->EFlags & 0x00000004) *pt-- = 'P'; /* Parity Flag */
205 if (ctx->EFlags & 0x00000008) *pt-- = '-';
206 if (ctx->EFlags & 0x00000010) *pt-- = 'A'; /* Auxiliary Carry Flag */
207 if (ctx->EFlags & 0x00000020) *pt-- = '-';
208 if (ctx->EFlags & 0x00000040) *pt-- = 'Z'; /* Zero Flag */
209 if (ctx->EFlags & 0x00000080) *pt-- = 'S'; /* Sign Flag */
210 if (ctx->EFlags & 0x00000100) *pt-- = 'T'; /* Trap/Trace Flag */
211 if (ctx->EFlags & 0x00000200) *pt-- = 'I'; /* Interupt Enable Flag */
212 if (ctx->EFlags & 0x00000400) *pt-- = 'D'; /* Direction Indicator */
213 if (ctx->EFlags & 0x00000800) *pt-- = 'O'; /* Overflow flags */
214 if (ctx->EFlags & 0x00001000) *pt-- = '1'; /* I/O Privilege Level */
215 if (ctx->EFlags & 0x00002000) *pt-- = '1'; /* I/O Privilege Level */
216 if (ctx->EFlags & 0x00004000) *pt-- = 'N'; /* Nested Task Flag */
217 if (ctx->EFlags & 0x00008000) *pt-- = '-';
218 if (ctx->EFlags & 0x00010000) *pt-- = 'R'; /* Resume Flag */
219 if (ctx->EFlags & 0x00020000) *pt-- = 'V'; /* Vritual Mode Flag */
220 if (ctx->EFlags & 0x00040000) *pt-- = 'a'; /* Alignment Check Flag */
221
222 switch (get_selector_type(hThread, ctx, ctx->SegCs))
223 {
224 case AddrMode1616:
225 case AddrModeReal:
226 dbg_printf("\n IP:%04x SP:%04x BP:%04x FLAGS:%04x(%s)\n",
227 LOWORD(ctx->Eip), LOWORD(ctx->Esp),
228 LOWORD(ctx->Ebp), LOWORD(ctx->EFlags), buf);
229 dbg_printf(" AX:%04x BX:%04x CX:%04x DX:%04x SI:%04x DI:%04x\n",
230 LOWORD(ctx->Eax), LOWORD(ctx->Ebx),
231 LOWORD(ctx->Ecx), LOWORD(ctx->Edx),
232 LOWORD(ctx->Esi), LOWORD(ctx->Edi));
233 break;
234 case AddrModeFlat:
235 case AddrMode1632:
236 dbg_printf("\n EIP:%08lx ESP:%08lx EBP:%08lx EFLAGS:%08lx(%s)\n",
237 ctx->Eip, ctx->Esp, ctx->Ebp, ctx->EFlags, buf);
238 dbg_printf(" EAX:%08lx EBX:%08lx ECX:%08lx EDX:%08lx\n",
239 ctx->Eax, ctx->Ebx, ctx->Ecx, ctx->Edx);
240 dbg_printf(" ESI:%08lx EDI:%08lx\n",
241 ctx->Esi, ctx->Edi);
242 break;
243 }
244
245 if (all_regs) be_i386_all_print_context(hThread, ctx); /* print floating regs */
246
247 }
248
249 static void be_i386_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
250 {
251 if (get_selector_type(hThread, ctx, ctx->SegCs) == AddrMode1616)
252 {
253 info_win32_segments(ctx->SegDs >> 3, 1);
254 if (ctx->SegEs != ctx->SegDs) info_win32_segments(ctx->SegEs >> 3, 1);
255 }
256 info_win32_segments(ctx->SegFs >> 3, 1);
257 }
258
259 static struct dbg_internal_var be_i386_ctx[] =
260 {
261 {CV_REG_AL, "AL", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_char_int},
262 {CV_REG_CL, "CL", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_char_int},
263 {CV_REG_DL, "DL", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_char_int},
264 {CV_REG_BL, "BL", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_char_int},
265 {CV_REG_AH, "AH", (DWORD*)(FIELD_OFFSET(CONTEXT, Eax)+1), dbg_itype_unsigned_char_int},
266 {CV_REG_CH, "CH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ecx)+1), dbg_itype_unsigned_char_int},
267 {CV_REG_DH, "DH", (DWORD*)(FIELD_OFFSET(CONTEXT, Edx)+1), dbg_itype_unsigned_char_int},
268 {CV_REG_BH, "BH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ebx)+1), dbg_itype_unsigned_char_int},
269 {CV_REG_AX, "AX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_short_int},
270 {CV_REG_CX, "CX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_short_int},
271 {CV_REG_DX, "DX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_short_int},
272 {CV_REG_BX, "BX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_short_int},
273 {CV_REG_SP, "SP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_short_int},
274 {CV_REG_BP, "BP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_short_int},
275 {CV_REG_SI, "SI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_short_int},
276 {CV_REG_DI, "DI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_short_int},
277 {CV_REG_EAX, "EAX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_int},
278 {CV_REG_ECX, "ECX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_int},
279 {CV_REG_EDX, "EDX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_int},
280 {CV_REG_EBX, "EBX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_int},
281 {CV_REG_ESP, "ESP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_int},
282 {CV_REG_EBP, "EBP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_int},
283 {CV_REG_ESI, "ESI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_int},
284 {CV_REG_EDI, "EDI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_int},
285 {CV_REG_ES, "ES", (DWORD*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
286 {CV_REG_CS, "CS", (DWORD*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
287 {CV_REG_SS, "SS", (DWORD*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
288 {CV_REG_DS, "DS", (DWORD*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
289 {CV_REG_FS, "FS", (DWORD*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
290 {CV_REG_GS, "GS", (DWORD*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
291 {CV_REG_IP, "IP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_short_int},
292 {CV_REG_FLAGS, "FLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
293 {CV_REG_EIP, "EIP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_int},
294 {CV_REG_EFLAGS, "EFLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
295 {0, NULL, 0, dbg_itype_none}
296 };
297
298 static const struct dbg_internal_var* be_i386_init_registers(CONTEXT* ctx)
299 {
300 struct dbg_internal_var* div;
301
302 for (div = be_i386_ctx; div->name; div++)
303 div->pval = (DWORD*)((char*)ctx + (DWORD)div->pval);
304 return be_i386_ctx;
305 }
306
307 static unsigned be_i386_is_step_over_insn(const void* insn)
308 {
309 BYTE ch;
310
311 for (;;)
312 {
313 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
314
315 switch (ch)
316 {
317 /* Skip all prefixes */
318 case 0x2e: /* cs: */
319 case 0x36: /* ss: */
320 case 0x3e: /* ds: */
321 case 0x26: /* es: */
322 case 0x64: /* fs: */
323 case 0x65: /* gs: */
324 case 0x66: /* opcode size prefix */
325 case 0x67: /* addr size prefix */
326 case 0xf0: /* lock */
327 case 0xf2: /* repne */
328 case 0xf3: /* repe */
329 insn = (const char*)insn + 1;
330 continue;
331
332 /* Handle call instructions */
333 case 0xcd: /* int <intno> */
334 case 0xe8: /* call <offset> */
335 case 0x9a: /* lcall <seg>:<off> */
336 return TRUE;
337
338 case 0xff: /* call <regmodrm> */
339 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
340 return FALSE;
341 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
342
343 /* Handle string instructions */
344 case 0x6c: /* insb */
345 case 0x6d: /* insw */
346 case 0x6e: /* outsb */
347 case 0x6f: /* outsw */
348 case 0xa4: /* movsb */
349 case 0xa5: /* movsw */
350 case 0xa6: /* cmpsb */
351 case 0xa7: /* cmpsw */
352 case 0xaa: /* stosb */
353 case 0xab: /* stosw */
354 case 0xac: /* lodsb */
355 case 0xad: /* lodsw */
356 case 0xae: /* scasb */
357 case 0xaf: /* scasw */
358 return TRUE;
359
360 default:
361 return FALSE;
362 }
363 }
364 }
365
366 static unsigned be_i386_is_function_return(const void* insn)
367 {
368 BYTE ch;
369
370 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
371 return (ch == 0xC2) || (ch == 0xC3);
372 }
373
374 static unsigned be_i386_is_break_insn(const void* insn)
375 {
376 BYTE c;
377
378 if (!dbg_read_memory(insn, &c, sizeof(c))) return FALSE;
379 return c == 0xCC;
380 }
381
382 static unsigned get_size(ADDRESS_MODE am)
383 {
384 if (am == AddrModeReal || am == AddrMode1616) return 16;
385 return 32;
386 }
387
388 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
389 {
390 char value8;
391 short value16;
392
393 switch (sz)
394 {
395 case 8:
396 if (!dbg_read_memory(addr, &value8, sizeof(value8)))
397 return FALSE;
398 *value = value8;
399 break;
400 case 16:
401 if (!dbg_read_memory(addr, &value16, sizeof(value16)))
402 return FALSE;
403 *value = value16;
404 case 32:
405 if (!dbg_read_memory(addr, value, sizeof(*value)))
406 return FALSE;
407 break;
408 default: return FALSE;
409 }
410 return TRUE;
411 }
412
413 static unsigned be_i386_is_func_call(const void* insn, ADDRESS64* callee)
414 {
415 BYTE ch;
416 int delta;
417 short segment;
418 unsigned dst = 0;
419 unsigned operand_size;
420 ADDRESS_MODE cs_addr_mode;
421
422 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
423 dbg_context.SegCs);
424 operand_size = get_size(cs_addr_mode);
425
426 /* get operand_size (also getting rid of the various prefixes */
427 do
428 {
429 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
430 if (ch == 0x66)
431 {
432 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
433 insn = (const char*)insn + 1;
434 }
435 } while (ch == 0x66 || ch == 0x67);
436
437 switch (ch)
438 {
439 case 0xe8: /* relative near call */
440 callee->Mode = cs_addr_mode;
441 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
442 return FALSE;
443 callee->Segment = dbg_context.SegCs;
444 callee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
445 return TRUE;
446
447 case 0x9a: /* absolute far call */
448 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
449 &segment, sizeof(segment)))
450 return FALSE;
451 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
452 segment);
453 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
454 return FALSE;
455 callee->Segment = segment;
456 callee->Offset = delta;
457 return TRUE;
458
459 case 0xff:
460 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
461 return FALSE;
462 /* keep only the CALL and LCALL insn:s */
463 switch ((ch >> 3) & 0x07)
464 {
465 case 0x02:
466 segment = dbg_context.SegCs;
467 break;
468 case 0x03:
469 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
470 &segment, sizeof(segment)))
471 return FALSE;
472 break;
473 default: return FALSE;
474 }
475 /* FIXME: we only support the 32 bit far calls for now */
476 if (operand_size != 32)
477 {
478 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) with 16 bit operand-size at %p\n", ch, insn);
479 return FALSE;
480 }
481 switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
482 {
483 case 0x04:
484 case 0x44:
485 case 0x84:
486 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
487 return FALSE;
488 case 0x05: /* addr32 */
489 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (addr32) at %p\n", ch, insn);
490 return FALSE;
491 default:
492 switch (ch & 0x07)
493 {
494 case 0x00: dst = dbg_context.Eax; break;
495 case 0x01: dst = dbg_context.Ecx; break;
496 case 0x02: dst = dbg_context.Edx; break;
497 case 0x03: dst = dbg_context.Ebx; break;
498 case 0x04: dst = dbg_context.Esp; break;
499 case 0x05: dst = dbg_context.Ebp; break;
500 case 0x06: dst = dbg_context.Esi; break;
501 case 0x07: dst = dbg_context.Edi; break;
502 }
503 if ((ch >> 6) != 0x03) /* indirect address */
504 {
505 if (ch >> 6) /* we got a displacement */
506 {
507 if (!fetch_value((const char*)insn + 2, (ch >> 6) == 0x01 ? 8 : 32, &delta))
508 return FALSE;
509 dst += delta;
510 }
511 if (((ch >> 3) & 0x07) == 0x03) /* LCALL */
512 {
513 if (!dbg_read_memory((const char*)dst + operand_size, &segment, sizeof(segment)))
514 return FALSE;
515 }
516 else segment = dbg_context.SegCs;
517 if (!dbg_read_memory((const char*)dst, &delta, sizeof(delta)))
518 return FALSE;
519 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
520 segment);
521 callee->Segment = segment;
522 callee->Offset = delta;
523 }
524 else
525 {
526 callee->Mode = cs_addr_mode;
527 callee->Segment = dbg_context.SegCs;
528 callee->Offset = dst;
529 }
530 }
531 return TRUE;
532
533 case 0xCD:
534 WINE_FIXME("Unsupported yet call insn (0x%02x) at %p\n", ch, insn);
535 /* fall through */
536 default:
537 return FALSE;
538 }
539 }
540
541 #define DR7_CONTROL_SHIFT 16
542 #define DR7_CONTROL_SIZE 4
543
544 #define DR7_RW_EXECUTE (0x0)
545 #define DR7_RW_WRITE (0x1)
546 #define DR7_RW_READ (0x3)
547
548 #define DR7_LEN_1 (0x0)
549 #define DR7_LEN_2 (0x4)
550 #define DR7_LEN_4 (0xC)
551
552 #define DR7_LOCAL_ENABLE_SHIFT 0
553 #define DR7_GLOBAL_ENABLE_SHIFT 1
554 #define DR7_ENABLE_SIZE 2
555
556 #define DR7_LOCAL_ENABLE_MASK (0x55)
557 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
558
559 #define DR7_CONTROL_RESERVED (0xFC00)
560 #define DR7_LOCAL_SLOWDOWN (0x100)
561 #define DR7_GLOBAL_SLOWDOWN (0x200)
562
563 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
564 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
565
566 static inline int be_i386_get_unused_DR(CONTEXT* ctx, unsigned long** r)
567 {
568 if (!IS_DR7_SET(ctx->Dr7, 0))
569 {
570 *r = &ctx->Dr0;
571 return 0;
572 }
573 if (!IS_DR7_SET(ctx->Dr7, 1))
574 {
575 *r = &ctx->Dr1;
576 return 1;
577 }
578 if (!IS_DR7_SET(ctx->Dr7, 2))
579 {
580 *r = &ctx->Dr2;
581 return 2;
582 }
583 if (!IS_DR7_SET(ctx->Dr7, 3))
584 {
585 *r = &ctx->Dr3;
586 return 3;
587 }
588 dbg_printf("All hardware registers have been used\n");
589
590 return -1;
591 }
592
593 static unsigned be_i386_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
594 CONTEXT* ctx, enum be_xpoint_type type,
595 void* addr, unsigned long* val, unsigned size)
596 {
597 unsigned char ch;
598 SIZE_T sz;
599 unsigned long* pr;
600 int reg;
601 unsigned long bits;
602
603 switch (type)
604 {
605 case be_xpoint_break:
606 if (size != 0) return 0;
607 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
608 *val = ch;
609 ch = 0xcc;
610 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
611 break;
612 case be_xpoint_watch_exec:
613 bits = DR7_RW_EXECUTE;
614 goto hw_bp;
615 case be_xpoint_watch_read:
616 bits = DR7_RW_READ;
617 goto hw_bp;
618 case be_xpoint_watch_write:
619 bits = DR7_RW_WRITE;
620 hw_bp:
621 if ((reg = be_i386_get_unused_DR(ctx, &pr)) == -1) return 0;
622 *pr = (unsigned long)addr;
623 if (type != be_xpoint_watch_exec) switch (size)
624 {
625 case 4: bits |= DR7_LEN_4; break;
626 case 2: bits |= DR7_LEN_2; break;
627 case 1: bits |= DR7_LEN_1; break;
628 default: return 0;
629 }
630 *val = reg;
631 /* clear old values */
632 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
633 /* set the correct ones */
634 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
635 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
636 break;
637 default:
638 dbg_printf("Unknown bp type %c\n", type);
639 return 0;
640 }
641 return 1;
642 }
643
644 static unsigned be_i386_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
645 CONTEXT* ctx, enum be_xpoint_type type,
646 void* addr, unsigned long val, unsigned size)
647 {
648 SIZE_T sz;
649 unsigned char ch;
650
651 switch (type)
652 {
653 case be_xpoint_break:
654 if (size != 0) return 0;
655 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
656 if (ch != (unsigned char)0xCC)
657 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
658 ch, (unsigned long)addr);
659 ch = (unsigned char)val;
660 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
661 break;
662 case be_xpoint_watch_exec:
663 case be_xpoint_watch_read:
664 case be_xpoint_watch_write:
665 /* simply disable the entry */
666 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
667 break;
668 default:
669 dbg_printf("Unknown bp type %c\n", type);
670 return 0;
671 }
672 return 1;
673 }
674
675 static unsigned be_i386_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
676 {
677 return ctx->Dr6 & (1 << idx);
678 }
679
680 static void be_i386_clear_watchpoint(CONTEXT* ctx, unsigned idx)
681 {
682 ctx->Dr6 &= ~(1 << idx);
683 }
684
685 static int be_i386_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
686 {
687 if (way)
688 {
689 ctx->Eip--;
690 return -1;
691 }
692 ctx->Eip++;
693 return 1;
694 }
695
696 static int be_i386_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
697 unsigned ext_sign, LONGLONG* ret)
698 {
699 if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
700
701 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
702 /* FIXME: this assumes that debuggee and debugger use the same
703 * integral representation
704 */
705 if (!memory_read_value(lvalue, size, ret)) return FALSE;
706
707 /* propagate sign information */
708 if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
709 {
710 ULONGLONG neg = -1;
711 *ret |= neg << (size * 8);
712 }
713 return TRUE;
714 }
715
716 static int be_i386_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
717 long double* ret)
718 {
719 char tmp[12];
720
721 /* FIXME: this assumes that debuggee and debugger use the same
722 * representation for reals
723 */
724 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
725
726 /* float & double types have to be promoted to a long double */
727 switch (size)
728 {
729 case sizeof(float): *ret = *(float*)tmp; break;
730 case sizeof(double): *ret = *(double*)tmp; break;
731 case sizeof(long double): *ret = *(long double*)tmp; break;
732 default: return FALSE;
733 }
734 return TRUE;
735 }
736
737 struct backend_cpu be_i386 =
738 {
739 be_i386_linearize,
740 be_i386_build_addr,
741 be_i386_get_addr,
742 be_i386_single_step,
743 be_i386_print_context,
744 be_i386_print_segment_info,
745 be_i386_init_registers,
746 be_i386_is_step_over_insn,
747 be_i386_is_function_return,
748 be_i386_is_break_insn,
749 be_i386_is_func_call,
750 be_i386_disasm_one_insn,
751 be_i386_insert_Xpoint,
752 be_i386_remove_Xpoint,
753 be_i386_is_watchpoint_set,
754 be_i386_clear_watchpoint,
755 be_i386_adjust_pc_for_break,
756 be_i386_fetch_integer,
757 be_i386_fetch_float,
758 };
759 #endif