memory/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include "wine/winuser16.h"
   8 #include "ldt.h"
   9 #include "global.h"
  10 #include "module.h"
  11 #include "dosexe.h"
  12 #include "miscemu.h"
  13 #include "sig_context.h"
  14 #include "selectors.h"
  15 #include "debugtools.h"
  16
  17 DECLARE_DEBUG_CHANNEL(int)
  18 DECLARE_DEBUG_CHANNEL(io)
  19
  20 #ifdef __i386__
  21
  22 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
  23 #define IS_SEL_32(context,seg) \
  24    (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
  25
  26 #define STACK_sig(context) \
  27    (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : (DWORD)SP_sig(context))
  28
  29 #define ADD_STACK_sig(context,offset) \
  30    do { if (IS_SEL_32(context,SS_sig(context))) ESP_sig(context) += (offset); \
  31         else SP_sig(context) += (offset); } while(0)
  32
  33 #define MAKE_PTR(seg,off) \
  34    (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
  35
  36 #define MK_PTR(context,seg,off) \
  37    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
  38                     : MAKE_PTR(seg,off))
  39
  40 #define STACK_PTR(context) \
  41    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
  42     (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
  43      (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
  44
  45
  46 /***********************************************************************
  47  *           INSTR_ReplaceSelector
  48  *
  49  * Try to replace an invalid selector by a valid one.
  50  * The only selector where it is allowed to do "mov ax,40;mov es,ax"
  51  * is the so called 'bimodal' selector 0x40, which points to the BIOS
  52  * data segment. Used by (at least) Borland products (and programs compiled
  53  * using Borland products).
  54  *
  55  * See Undocumented Windows, Chapter 5, __0040.
  56  */
  57 static BOOL INSTR_ReplaceSelector( SIGCONTEXT *context, WORD *sel )
  58 {
  59     extern char Call16_Start, Call16_End;
  60
  61     if (IS_SELECTOR_SYSTEM(CS_sig(context)))
  62         if (    (char *)EIP_sig(context) >= &Call16_Start
  63              && (char *)EIP_sig(context) <  &Call16_End   )
  64         {
  65             /* Saved selector may have become invalid when the relay code */
  66             /* tries to restore it. We simply clear it. */
  67             *sel = 0;
  68             return TRUE;
  69         }
  70
  71     if (*sel == 0x40)
  72     {
  73         static WORD sys_timer = 0;
  74         if (!sys_timer)
  75             sys_timer = CreateSystemTimer( 55, DOSMEM_Tick );
  76         *sel = DOSMEM_BiosDataSeg;
  77         return TRUE;
  78     }
  79     if (!IS_SELECTOR_SYSTEM(*sel) && !IS_SELECTOR_FREE(*sel))
  80         ERR_(int)("Got protection fault on valid selector, maybe your kernel is too old?\n" );
  81     return FALSE;  /* Can't replace selector, crashdump */
  82 }
  83
  84
  85 /***********************************************************************
  86  *           INSTR_GetOperandAddr
  87  *
  88  * Return the address of an instruction operand (from the mod/rm byte).
  89  */
  90 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
  91                                    int long_addr, int segprefix, int *len )
  92 {
  93     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  94
  95 #define GET_VAL(val,type) \
  96     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  97
  98     *len = 0;
  99     GET_VAL( &mod, BYTE );
 100     rm = mod & 7;
 101     mod >>= 6;
 102
 103     if (mod == 3)
 104     {
 105         switch(rm)
 106         {
 107         case 0: return (BYTE *)&EAX_sig(context);
 108         case 1: return (BYTE *)&ECX_sig(context);
 109         case 2: return (BYTE *)&EDX_sig(context);
 110         case 3: return (BYTE *)&EBX_sig(context);
 111         case 4: return (BYTE *)&ESP_sig(context);
 112         case 5: return (BYTE *)&EBP_sig(context);
 113         case 6: return (BYTE *)&ESI_sig(context);
 114         case 7: return (BYTE *)&EDI_sig(context);
 115         }
 116     }
 117
 118     if (long_addr)
 119     {
 120         if (rm == 4)
 121         {
 122             BYTE sib;
 123             GET_VAL( &sib, BYTE );
 124             rm = sib & 7;
 125             ss = sib >> 6;
 126             switch(sib >> 3)
 127             {
 128             case 0: index = EAX_sig(context); break;
 129             case 1: index = ECX_sig(context); break;
 130             case 2: index = EDX_sig(context); break;
 131             case 3: index = EBX_sig(context); break;
 132             case 4: index = 0; break;
 133             case 5: index = EBP_sig(context); break;
 134             case 6: index = ESI_sig(context); break;
 135             case 7: index = EDI_sig(context); break;
 136             }
 137         }
 138
 139         switch(rm)
 140         {
 141         case 0: base = EAX_sig(context); seg = DS_sig(context); break;
 142         case 1: base = ECX_sig(context); seg = DS_sig(context); break;
 143         case 2: base = EDX_sig(context); seg = DS_sig(context); break;
 144         case 3: base = EBX_sig(context); seg = DS_sig(context); break;
 145         case 4: base = ESP_sig(context); seg = SS_sig(context); break;
 146         case 5: base = EBP_sig(context); seg = SS_sig(context); break;
 147         case 6: base = ESI_sig(context); seg = DS_sig(context); break;
 148         case 7: base = EDI_sig(context); seg = DS_sig(context); break;
 149         }
 150         switch (mod)
 151         {
 152         case 0:
 153             if (rm == 5)  /* special case: ds:(disp32) */
 154             {
 155                 GET_VAL( &base, DWORD );
 156                 seg = DS_sig(context);
 157             }
 158             break;
 159
 160         case 1:  /* 8-bit disp */
 161             GET_VAL( &off, BYTE );
 162             base += (signed char)off;
 163             break;
 164
 165         case 2:  /* 32-bit disp */
 166             GET_VAL( &off, DWORD );
 167             base += (signed long)off;
 168             break;
 169         }
 170     }
 171     else  /* short address */
 172     {
 173         switch(rm)
 174         {
 175         case 0:  /* ds:(bx,si) */
 176             base = BX_sig(context) + SI_sig(context);
 177             seg  = DS_sig(context);
 178             break;
 179         case 1:  /* ds:(bx,di) */
 180             base = BX_sig(context) + DI_sig(context);
 181             seg  = DS_sig(context);
 182             break;
 183         case 2:  /* ss:(bp,si) */
 184             base = BP_sig(context) + SI_sig(context);
 185             seg  = SS_sig(context);
 186             break;
 187         case 3:  /* ss:(bp,di) */
 188             base = BP_sig(context) + DI_sig(context);
 189             seg  = SS_sig(context);
 190             break;
 191         case 4:  /* ds:(si) */
 192             base = SI_sig(context);
 193             seg  = DS_sig(context);
 194             break;
 195         case 5:  /* ds:(di) */
 196             base = DI_sig(context);
 197             seg  = DS_sig(context);
 198             break;
 199         case 6:  /* ss:(bp) */
 200             base = BP_sig(context);
 201             seg  = SS_sig(context);
 202             break;
 203         case 7:  /* ds:(bx) */
 204             base = BX_sig(context);
 205             seg  = DS_sig(context);
 206             break;
 207         }
 208
 209         switch(mod)
 210         {
 211         case 0:
 212             if (rm == 6)  /* special case: ds:(disp16) */
 213             {
 214                 GET_VAL( &base, WORD );
 215                 seg  = DS_sig(context);
 216             }
 217             break;
 218
 219         case 1:  /* 8-bit disp */
 220             GET_VAL( &off, BYTE );
 221             base += (signed char)off;
 222             break;
 223
 224         case 2:  /* 16-bit disp */
 225             GET_VAL( &off, WORD );
 226             base += (signed short)off;
 227             break;
 228         }
 229         base &= 0xffff;
 230     }
 231     if (segprefix != -1) seg = segprefix;
 232
 233     /* Make sure the segment and offset are valid */
 234     if (IS_SELECTOR_SYSTEM(seg)) return (BYTE *)(base + (index << ss));
 235     if (((seg & 7) != 7) || IS_SELECTOR_FREE(seg)) return NULL;
 236     if (GET_SEL_LIMIT(seg) < (base + (index << ss))) return NULL;
 237     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 238 #undef GET_VAL
 239 }
 240
 241
 242 /***********************************************************************
 243  *           INSTR_EmulateLDS
 244  *
 245  * Emulate the LDS (and LES,LFS,etc.) instruction.
 246  */
 247 static BOOL INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
 248                                 int long_addr, int segprefix, int *len )
 249 {
 250     WORD seg;
 251     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 252     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 253                                        long_addr, segprefix, len );
 254     if (!addr)
 255         return FALSE;  /* Unable to emulate it */
 256     seg = *(WORD *)(addr + (long_op ? 4 : 2));
 257
 258     if (!INSTR_ReplaceSelector( context, &seg ))
 259         return FALSE;  /* Unable to emulate it */
 260
 261     /* Now store the offset in the correct register */
 262
 263     switch((*regmodrm >> 3) & 7)
 264     {
 265     case 0:
 266         if (long_op) EAX_sig(context) = *(DWORD *)addr;
 267         else AX_sig(context) = *(WORD *)addr;
 268         break;
 269     case 1:
 270         if (long_op) ECX_sig(context) = *(DWORD *)addr;
 271         else CX_sig(context) = *(WORD *)addr;
 272         break;
 273     case 2:
 274         if (long_op) EDX_sig(context) = *(DWORD *)addr;
 275         else DX_sig(context) = *(WORD *)addr;
 276         break;
 277     case 3:
 278         if (long_op) EBX_sig(context) = *(DWORD *)addr;
 279         else BX_sig(context) = *(WORD *)addr;
 280         break;
 281     case 4:
 282         if (long_op) ESP_sig(context) = *(DWORD *)addr;
 283         else SP_sig(context) = *(WORD *)addr;
 284         break;
 285     case 5:
 286         if (long_op) EBP_sig(context) = *(DWORD *)addr;
 287         else BP_sig(context) = *(WORD *)addr;
 288         break;
 289     case 6:
 290         if (long_op) ESI_sig(context) = *(DWORD *)addr;
 291         else SI_sig(context) = *(WORD *)addr;
 292         break;
 293     case 7:
 294         if (long_op) EDI_sig(context) = *(DWORD *)addr;
 295         else DI_sig(context) = *(WORD *)addr;
 296         break;
 297     }
 298
 299     /* Store the correct segment in the segment register */
 300
 301     switch(*instr)
 302     {
 303     case 0xc4: ES_sig(context) = seg; break;  /* les */
 304     case 0xc5: DS_sig(context) = seg; break;  /* lds */
 305     case 0x0f: switch(instr[1])
 306                {
 307                case 0xb2: SS_sig(context) = seg; break;  /* lss */
 308 #ifdef FS_sig
 309                case 0xb4: FS_sig(context) = seg; break;  /* lfs */
 310 #endif
 311 #ifdef GS_sig
 312                case 0xb5: GS_sig(context) = seg; break;  /* lgs */
 313 #endif
 314                }
 315                break;
 316     }
 317
 318     /* Add the opcode size to the total length */
 319
 320     *len += 1 + (*instr == 0x0f);
 321     return TRUE;
 322 }
 323
 324
 325 /***********************************************************************
 326  *           INSTR_EmulateInstruction
 327  *
 328  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 329  */
 330 BOOL INSTR_EmulateInstruction( SIGCONTEXT *context )
 331 {
 332     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 333     SEGPTR gpHandler;
 334     BYTE *instr;
 335
 336     long_op = long_addr = IS_SEL_32(context,CS_sig(context));
 337     instr = (BYTE *)MK_PTR(context,CS_sig(context),EIP_sig(context));
 338     if (!instr) return FALSE;
 339
 340     /* First handle any possible prefix */
 341
 342     segprefix = -1;  /* no prefix */
 343     prefix = 1;
 344     repX = 0;
 345     prefixlen = 0;
 346     while(prefix)
 347     {
 348         switch(*instr)
 349         {
 350         case 0x2e:
 351             segprefix = CS_sig(context);
 352             break;
 353         case 0x36:
 354             segprefix = SS_sig(context);
 355             break;
 356         case 0x3e:
 357             segprefix = DS_sig(context);
 358             break;
 359         case 0x26:
 360             segprefix = ES_sig(context);
 361             break;
 362 #ifdef FS_sig
 363         case 0x64:
 364             segprefix = FS_sig(context);
 365             break;
 366 #endif
 367 #ifdef GS_sig
 368         case 0x65:
 369             segprefix = GS_sig(context);
 370             break;
 371 #endif
 372         case 0x66:
 373             long_op = !long_op;  /* opcode size prefix */
 374             break;
 375         case 0x67:
 376             long_addr = !long_addr;  /* addr size prefix */
 377             break;
 378         case 0xf0:  /* lock */
 379             break;
 380         case 0xf2:  /* repne */
 381             repX = 1;
 382             break;
 383         case 0xf3:  /* repe */
 384             repX = 2;
 385             break;
 386         default:
 387             prefix = 0;  /* no more prefixes */
 388             break;
 389         }
 390         if (prefix)
 391         {
 392             instr++;
 393             prefixlen++;
 394         }
 395     }
 396
 397     /* Now look at the actual instruction */
 398
 399     switch(*instr)
 400     {
 401         case 0x07: /* pop es */
 402         case 0x17: /* pop ss */
 403         case 0x1f: /* pop ds */
 404             {
 405                 WORD seg = *(WORD *)STACK_PTR( context );
 406                 if (INSTR_ReplaceSelector( context, &seg ))
 407                 {
 408                     switch(*instr)
 409                     {
 410                     case 0x07: ES_sig(context) = seg; break;
 411                     case 0x17: SS_sig(context) = seg; break;
 412                     case 0x1f: DS_sig(context) = seg; break;
 413                     }
 414                     ADD_STACK_sig(context, long_op ? 4 : 2);
 415                     EIP_sig(context) += prefixlen + 1;
 416                     return TRUE;
 417                 }
 418             }
 419             break;  /* Unable to emulate it */
 420
 421         case 0x0f: /* extended instruction */
 422             switch(instr[1])
 423             {
 424             case 0x22: /* mov eax, crX */
 425                 switch (instr[2]) {
 426                 case 0xc0:
 427                         fprintf(stderr,"mov eax,cr0 at 0x%08lx, EAX=0x%08lx\n",
 428                                 EIP_sig(context),EAX_sig(context)
 429                         );
 430                         EIP_sig(context) += prefixlen+3;
 431                         return TRUE;
 432                 default:
 433                         break; /*fallthrough to bad instruction handling */
 434                 }
 435                 break; /*fallthrough to bad instruction handling */
 436             case 0x20: /* mov crX, eax */
 437                 switch (instr[2]) {
 438                 case 0xe0: /* mov cr4, eax */
 439                     /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
 440                      * bit 0: VME       Virtual Mode Exception ?
 441                      * bit 1: PVI       Protected mode Virtual Interrupt
 442                      * bit 2: TSD       Timestamp disable
 443                      * bit 3: DE        Debugging extensions
 444                      * bit 4: PSE       Page size extensions
 445                      * bit 5: PAE   Physical address extension
 446                      * bit 6: MCE       Machine check enable
 447                      * bit 7: PGE   Enable global pages
 448                      * bit 8: PCE       Enable performance counters at IPL3
 449                      */
 450                     fprintf(stderr,"mov cr4,eax at 0x%08lx\n",EIP_sig(context));
 451                     EAX_sig(context) = 0;
 452                     EIP_sig(context) += prefixlen+3;
 453                     return TRUE;
 454                 case 0xc0: /* mov cr0, eax */
 455                     fprintf(stderr,"mov cr0,eax at 0x%08lx\n",EIP_sig(context));
 456                     EAX_sig(context) = 0x10; /* FIXME: set more bits ? */
 457                     EIP_sig(context) += prefixlen+3;
 458                     return TRUE;
 459                 default: /* fallthrough to illegal instruction */
 460                     break;
 461                 }
 462                 /* fallthrough to illegal instruction */
 463                 break;
 464 #ifdef FS_sig
 465             case 0xa1: /* pop fs */
 466                 {
 467                     WORD seg = *(WORD *)STACK_PTR( context );
 468                     if (INSTR_ReplaceSelector( context, &seg ))
 469                     {
 470                         FS_sig(context) = seg;
 471                         ADD_STACK_sig(context, long_op ? 4 : 2);
 472                         EIP_sig(context) += prefixlen + 2;
 473                         return TRUE;
 474                     }
 475                 }
 476                 break;
 477 #endif  /* FS_sig */
 478
 479 #ifdef GS_sig
 480             case 0xa9: /* pop gs */
 481                 {
 482                     WORD seg = *(WORD *)STACK_PTR( context );
 483                     if (INSTR_ReplaceSelector( context, &seg ))
 484                     {
 485                         GS_sig(context) = seg;
 486                         ADD_STACK_sig(context, long_op ? 4 : 2);
 487                         EIP_sig(context) += prefixlen + 2;
 488                         return TRUE;
 489                     }
 490                 }
 491                 break;
 492 #endif  /* GS_sig */
 493
 494             case 0xb2: /* lss addr,reg */
 495 #ifdef FS_sig
 496             case 0xb4: /* lfs addr,reg */
 497 #endif
 498 #ifdef GS_sig
 499             case 0xb5: /* lgs addr,reg */
 500 #endif
 501                 if (INSTR_EmulateLDS( context, instr, long_op,
 502                                       long_addr, segprefix, &len ))
 503                 {
 504                     EIP_sig(context) += prefixlen + len;
 505                     return TRUE;
 506                 }
 507                 break;
 508             }
 509             break;  /* Unable to emulate it */
 510
 511         case 0x6c: /* insb     */
 512         case 0x6d: /* insw/d   */
 513         case 0x6e: /* outsb    */
 514         case 0x6f: /* outsw/d  */
 515             {
 516               int typ = *instr;  /* Just in case it's overwritten.  */
 517               int outp = (typ >= 0x6e);
 518               unsigned long count = repX ?
 519                           (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
 520               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 521               int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
 522               int seg = outp ? DS_sig(context) : ES_sig(context);  /* FIXME: is this right? */
 523
 524               if (outp)
 525                 /* FIXME: Check segment readable.  */
 526                 (void)0;
 527               else
 528                 /* FIXME: Check segment writeable.  */
 529                 (void)0;
 530
 531               if (repX)
 532               {
 533                 if (long_addr)
 534                   ECX_sig(context) = 0;
 535                 else
 536                   CX_sig(context) = 0;
 537               }
 538
 539               while (count-- > 0)
 540                 {
 541                   void *data;
 542                   if (outp)
 543                   {
 544                       data = MK_PTR(context, seg,
 545                                long_addr ? ESI_sig(context) : SI_sig(context));
 546                       if (long_addr) ESI_sig(context) += step;
 547                       else SI_sig(context) += step;
 548                   }
 549                   else
 550                   {
 551                       data = MK_PTR(context, seg,
 552                                long_addr ? EDI_sig(context) : DI_sig(context));
 553                       if (long_addr) EDI_sig(context) += step;
 554                       else DI_sig(context) += step;
 555                   }
 556
 557                   switch (typ)
 558                   {
 559                     case 0x6c:
 560                       *((BYTE *)data) = IO_inport( DX_sig(context), 1);
 561                       TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 562                         *((BYTE *)data), CS_sig(context), IP_sig(context));
 563                       break;
 564                     case 0x6d:
 565                       if (long_op)
 566                       {
 567                         *((DWORD *)data) = IO_inport( DX_sig(context), 4);
 568                         TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 569                           *((DWORD *)data), CS_sig(context), IP_sig(context));
 570                       }
 571                       else
 572                       {
 573                         *((WORD *)data) = IO_inport( DX_sig(context), 2);
 574                         TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 575                           *((WORD *)data), CS_sig(context), IP_sig(context));
 576                       }
 577                       break;
 578                     case 0x6e:
 579                         IO_outport( DX_sig(context), 1, *((BYTE *)data));
 580                         TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 581                           *((BYTE *)data), CS_sig(context), IP_sig(context));
 582                         break;
 583                     case 0x6f:
 584                         if (long_op)
 585                         {
 586                             IO_outport( DX_sig(context), 4, *((DWORD *)data));
 587                             TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 588                               *((DWORD *)data), CS_sig(context), IP_sig(context));
 589                         }
 590                         else
 591                         {
 592                             IO_outport( DX_sig(context), 2, *((WORD *)data));
 593                             TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 594                               *((WORD *)data), CS_sig(context), IP_sig(context));
 595                         }
 596                         break;
 597                     }
 598                 }
 599               EIP_sig(context) += prefixlen + 1;
 600             }
 601             return TRUE;
 602
 603         case 0x8e: /* mov XX,segment_reg */
 604             {
 605                 WORD seg;
 606                 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
 607                                                   long_addr, segprefix, &len );
 608                 if (!addr)
 609                     break;  /* Unable to emulate it */
 610                 seg = *(WORD *)addr;
 611                 if (!INSTR_ReplaceSelector( context, &seg ))
 612                     break;  /* Unable to emulate it */
 613
 614                 switch((instr[1] >> 3) & 7)
 615                 {
 616                 case 0:
 617                     ES_sig(context) = seg;
 618                     EIP_sig(context) += prefixlen + len + 1;
 619                     return TRUE;
 620                 case 1:  /* cs */
 621                     break;
 622                 case 2:
 623                     SS_sig(context) = seg;
 624                     EIP_sig(context) += prefixlen + len + 1;
 625                     return TRUE;
 626                 case 3:
 627                     DS_sig(context) = seg;
 628                     EIP_sig(context) += prefixlen + len + 1;
 629                     return TRUE;
 630 #ifdef FS_sig
 631                 case 4:
 632                     FS_sig(context) = seg;
 633                     EIP_sig(context) += prefixlen + len + 1;
 634                     return TRUE;
 635 #endif
 636 #ifdef GS_sig
 637                 case 5:
 638                     GS_sig(context) = seg;
 639                     EIP_sig(context) += prefixlen + len + 1;
 640                     return TRUE;
 641 #endif
 642                 case 6:  /* unused */
 643                 case 7:  /* unused */
 644                     break;
 645                 }
 646             }
 647             break;  /* Unable to emulate it */
 648
 649         case 0xc4: /* les addr,reg */
 650         case 0xc5: /* lds addr,reg */
 651             if (INSTR_EmulateLDS( context, instr, long_op,
 652                                   long_addr, segprefix, &len ))
 653             {
 654                 EIP_sig(context) += prefixlen + len;
 655                 return TRUE;
 656             }
 657             break;  /* Unable to emulate it */
 658
 659         case 0xcd: /* int <XX> */
 660             if (long_op)
 661             {
 662                 ERR_(int)("int xx from 32-bit code is not supported.\n");
 663                 break;  /* Unable to emulate it */
 664             }
 665             else
 666             {
 667                 FARPROC16 addr = INT_GetPMHandler( instr[1] );
 668                 WORD *stack = (WORD *)STACK_PTR( context );
 669                 /* Push the flags and return address on the stack */
 670                 *(--stack) = FL_sig(context);
 671                 *(--stack) = CS_sig(context);
 672                 *(--stack) = IP_sig(context) + prefixlen + 2;
 673                 ADD_STACK_sig(context, -3 * sizeof(WORD));
 674                 /* Jump to the interrupt handler */
 675                 CS_sig(context)  = HIWORD(addr);
 676                 EIP_sig(context) = LOWORD(addr);
 677             }
 678             return TRUE;
 679
 680         case 0xcf: /* iret */
 681             if (long_op)
 682             {
 683                 DWORD *stack = (DWORD *)STACK_PTR( context );
 684                 EIP_sig(context) = *stack++;
 685                 CS_sig(context)  = *stack++;
 686                 EFL_sig(context) = *stack;
 687                 ADD_STACK_sig(context, 3*sizeof(DWORD));  /* Pop the return address and flags */
 688             }
 689             else
 690             {
 691                 WORD *stack = (WORD *)STACK_PTR( context );
 692                 EIP_sig(context) = *stack++;
 693                 CS_sig(context)  = *stack++;
 694                 FL_sig(context)  = *stack;
 695                 ADD_STACK_sig(context, 3*sizeof(WORD));  /* Pop the return address and flags */
 696             }
 697             return TRUE;
 698
 699         case 0xe4: /* inb al,XX */
 700             AL_sig(context) = IO_inport( instr[1], 1 );
 701             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", instr[1],
 702                 AL_sig(context), CS_sig(context), IP_sig(context));
 703             EIP_sig(context) += prefixlen + 2;
 704             return TRUE;
 705
 706         case 0xe5: /* in (e)ax,XX */
 707             if (long_op)
 708             {
 709                 EAX_sig(context) = IO_inport( instr[1], 4 );
 710                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", instr[1],
 711                     EAX_sig(context), CS_sig(context), IP_sig(context));
 712             }
 713             else
 714             {
 715                 AX_sig(context) = IO_inport( instr[1], 2 );
 716                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", instr[1],
 717                     AX_sig(context), CS_sig(context), IP_sig(context));
 718             }
 719             EIP_sig(context) += prefixlen + 2;
 720             return TRUE;
 721
 722         case 0xe6: /* outb XX,al */
 723             IO_outport( instr[1], 1, AL_sig(context) );
 724             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", instr[1],
 725                 AL_sig(context), CS_sig(context), IP_sig(context));
 726             EIP_sig(context) += prefixlen + 2;
 727             return TRUE;
 728
 729         case 0xe7: /* out XX,(e)ax */
 730             if (long_op)
 731             {
 732                 IO_outport( instr[1], 4, EAX_sig(context) );
 733                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", instr[1],
 734                     EAX_sig(context), CS_sig(context), IP_sig(context));
 735             }
 736             else
 737             {
 738                 IO_outport( instr[1], 2, AX_sig(context) );
 739                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", instr[1],
 740                     AX_sig(context), CS_sig(context), IP_sig(context));
 741             }
 742             EIP_sig(context) += prefixlen + 2;
 743             return TRUE;
 744
 745         case 0xec: /* inb al,dx */
 746             AL_sig(context) = IO_inport( DX_sig(context), 1 );
 747             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 748                 AL_sig(context), CS_sig(context), IP_sig(context));
 749             EIP_sig(context) += prefixlen + 1;
 750             return TRUE;
 751
 752         case 0xed: /* in (e)ax,dx */
 753             if (long_op)
 754             {
 755                 EAX_sig(context) = IO_inport( DX_sig(context), 4 );
 756                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 757                     EAX_sig(context), CS_sig(context), IP_sig(context));
 758             }
 759             else
 760             {
 761                 AX_sig(context) = IO_inport( DX_sig(context), 2 );
 762                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 763                     AX_sig(context), CS_sig(context), IP_sig(context));
 764             }
 765             EIP_sig(context) += prefixlen + 1;
 766             return TRUE;
 767
 768         case 0xee: /* outb dx,al */
 769             IO_outport( DX_sig(context), 1, AL_sig(context) );
 770             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 771                 AL_sig(context), CS_sig(context), IP_sig(context));
 772             EIP_sig(context) += prefixlen + 1;
 773             return TRUE;
 774
 775         case 0xef: /* out dx,(e)ax */
 776             if (long_op)
 777             {
 778                 IO_outport( DX_sig(context), 4, EAX_sig(context) );
 779                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 780                     EAX_sig(context), CS_sig(context), IP_sig(context));
 781             }
 782             else
 783             {
 784                 IO_outport( DX_sig(context), 2, AX_sig(context) );
 785                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 786                     AX_sig(context), CS_sig(context), IP_sig(context));
 787             }
 788             EIP_sig(context) += prefixlen + 1;
 789             return TRUE;
 790
 791         case 0xfa: /* cli, ignored */
 792             EIP_sig(context) += prefixlen + 1;
 793             return TRUE;
 794
 795         case 0xfb: /* sti, ignored */
 796             EIP_sig(context) += prefixlen + 1;
 797             return TRUE;
 798     }
 799
 800
 801     /* Check for Win16 __GP handler */
 802     gpHandler = HasGPHandler16( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context),
 803                                                      EIP_sig(context) ) );
 804     if (gpHandler)
 805     {
 806         WORD *stack = (WORD *)STACK_PTR( context );
 807         *--stack = CS_sig(context);
 808         *--stack = EIP_sig(context);
 809         ADD_STACK_sig(context, -2*sizeof(WORD));
 810
 811         CS_sig(context) = SELECTOROF( gpHandler );
 812         EIP_sig(context) = OFFSETOF( gpHandler );
 813         return TRUE;
 814     }
 815     return FALSE;  /* Unable to emulate it */
 816 }
 817
 818 #endif  /* __i386__ */