miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include <stdio.h>
   8 #include "windows.h"
   9 #include "ldt.h"
  10 #include "miscemu.h"
  11 #include "registers.h"
  12
  13
  14 #define STACK_reg(context) \
  15    ((GET_SEL_FLAGS(SS_reg(context)) & LDT_FLAGS_32BIT) ? \
  16                    ESP_reg(context) : SP_reg(context))
  17
  18 #define STACK_PTR(context) \
  19     (PTR_SEG_OFF_TO_LIN(SS_reg(context),STACK_reg(context)))
  20
  21 /***********************************************************************
  22  *           INSTR_ReplaceSelector
  23  *
  24  * Try to replace an invalid selector by a valid one.
  25  * For now, only selector 0x40 is handled here.
  26  */
  27 static WORD INSTR_ReplaceSelector( struct sigcontext_struct *context, WORD sel)
  28 {
  29     if (sel == 0x40)
  30     {
  31         fprintf( stderr, "Direct access to segment 0x40 (cs:ip=%04x:%04lx).\n",
  32                  CS_reg(context), EIP_reg(context) );
  33         return DOSMEM_BiosSeg;
  34     }
  35     return 0;  /* Can't replace selector */
  36 }
  37
  38
  39 /***********************************************************************
  40  *           INSTR_GetOperandAddr
  41  *
  42  * Return the address of an instruction operand (from the mod/rm byte).
  43  */
  44 static BYTE *INSTR_GetOperandAddr( struct sigcontext_struct *context,
  45                                    BYTE *instr, int long_addr,
  46                                    int segprefix, int *len )
  47 {
  48     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  49
  50 #define GET_VAL(val,type) \
  51     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  52
  53     *len = 0;
  54     GET_VAL( &mod, BYTE );
  55     rm = mod & 7;
  56     mod >>= 6;
  57
  58     if (mod == 3)
  59     {
  60         switch(rm)
  61         {
  62         case 0: return (BYTE *)&EAX_reg(context);
  63         case 1: return (BYTE *)&ECX_reg(context);
  64         case 2: return (BYTE *)&EDX_reg(context);
  65         case 3: return (BYTE *)&EBX_reg(context);
  66         case 4: return (BYTE *)&ESP_reg(context);
  67         case 5: return (BYTE *)&EBP_reg(context);
  68         case 6: return (BYTE *)&ESI_reg(context);
  69         case 7: return (BYTE *)&EDI_reg(context);
  70         }
  71     }
  72
  73     if (long_addr)
  74     {
  75         if (rm == 4)
  76         {
  77             BYTE sib;
  78             GET_VAL( &sib, BYTE );
  79             rm = sib & 7;
  80             ss = sib >> 6;
  81             switch(sib >> 3)
  82             {
  83             case 0: index = EAX_reg(context); break;
  84             case 1: index = ECX_reg(context); break;
  85             case 2: index = EDX_reg(context); break;
  86             case 3: index = EBX_reg(context); break;
  87             case 4: index = 0; break;
  88             case 5: index = EBP_reg(context); break;
  89             case 6: index = ESI_reg(context); break;
  90             case 7: index = EDI_reg(context); break;
  91             }
  92         }
  93
  94         switch(rm)
  95         {
  96         case 0: base = EAX_reg(context); seg = DS_reg(context); break;
  97         case 1: base = ECX_reg(context); seg = DS_reg(context); break;
  98         case 2: base = EDX_reg(context); seg = DS_reg(context); break;
  99         case 3: base = EBX_reg(context); seg = DS_reg(context); break;
 100         case 4: base = ESP_reg(context); seg = SS_reg(context); break;
 101         case 5: base = EBP_reg(context); seg = SS_reg(context); break;
 102         case 6: base = ESI_reg(context); seg = DS_reg(context); break;
 103         case 7: base = EDI_reg(context); seg = DS_reg(context); break;
 104         }
 105         switch (mod)
 106         {
 107         case 0:
 108             if (rm == 5)  /* special case: ds:(disp32) */
 109             {
 110                 GET_VAL( &base, DWORD );
 111                 seg = DS_reg(context);
 112             }
 113             break;
 114
 115         case 1:  /* 8-bit disp */
 116             GET_VAL( &off, BYTE );
 117             base += (signed char)off;
 118             break;
 119
 120         case 2:  /* 32-bit disp */
 121             GET_VAL( &off, DWORD );
 122             base += (signed long)off;
 123             break;
 124         }
 125     }
 126     else  /* short address */
 127     {
 128         switch(rm)
 129         {
 130         case 0:  /* ds:(bx,si) */
 131             base = BX_reg(context) + SI_reg(context);
 132             seg  = DS_reg(context);
 133             break;
 134         case 1:  /* ds:(bx,di) */
 135             base = BX_reg(context) + DI_reg(context);
 136             seg  = DS_reg(context);
 137             break;
 138         case 2:  /* ss:(bp,si) */
 139             base = BP_reg(context) + SI_reg(context);
 140             seg  = SS_reg(context);
 141             break;
 142         case 3:  /* ss:(bp,di) */
 143             base = BP_reg(context) + DI_reg(context);
 144             seg  = SS_reg(context);
 145             break;
 146         case 4:  /* ds:(si) */
 147             base = SI_reg(context);
 148             seg  = DS_reg(context);
 149             break;
 150         case 5:  /* ds:(di) */
 151             base = DI_reg(context);
 152             seg  = DS_reg(context);
 153             break;
 154         case 6:  /* ss:(bp) */
 155             base = BP_reg(context);
 156             seg  = SS_reg(context);
 157             break;
 158         case 7:  /* ds:(bx) */
 159             base = BX_reg(context);
 160             seg  = DS_reg(context);
 161             break;
 162         }
 163
 164         switch(mod)
 165         {
 166         case 0:
 167             if (rm == 6)  /* special case: ds:(disp16) */
 168             {
 169                 GET_VAL( &base, WORD );
 170                 seg  = DS_reg(context);
 171             }
 172             break;
 173
 174         case 1:  /* 8-bit disp */
 175             GET_VAL( &off, BYTE );
 176             base += (signed char)off;
 177             break;
 178
 179         case 2:  /* 16-bit disp */
 180             GET_VAL( &off, WORD );
 181             base += (signed short)off;
 182             break;
 183         }
 184     }
 185     if (segprefix != -1) seg = segprefix;
 186
 187     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 188 }
 189
 190
 191 /***********************************************************************
 192  *           INSTR_EmulateLDS
 193  *
 194  * Emulate the LDS (and LES,LFS,etc.) instruction.
 195  */
 196 static BOOL INSTR_EmulateLDS( struct sigcontext_struct *context,
 197                               BYTE *instr, int long_op, int long_addr,
 198                               int segprefix, int *len )
 199 {
 200     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 201     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 202                                        long_addr, segprefix, len );
 203     WORD seg = *(WORD *)(addr + (long_op ? 4 : 2));
 204
 205     if (!(seg = INSTR_ReplaceSelector( context, seg )))
 206         return FALSE;  /* Unable to emulate it */
 207
 208     /* Now store the offset in the correct register */
 209
 210     switch((*regmodrm >> 3) & 7)
 211     {
 212     case 0:
 213         if (long_op) EAX_reg(context) = *(DWORD *)addr;
 214         else AX_reg(context) = *(WORD *)addr;
 215         break;
 216     case 1:
 217         if (long_op) ECX_reg(context) = *(DWORD *)addr;
 218         else CX_reg(context) = *(WORD *)addr;
 219         break;
 220     case 2:
 221         if (long_op) EDX_reg(context) = *(DWORD *)addr;
 222         else DX_reg(context) = *(WORD *)addr;
 223         break;
 224     case 3:
 225         if (long_op) EBX_reg(context) = *(DWORD *)addr;
 226         else BX_reg(context) = *(WORD *)addr;
 227         break;
 228     case 4:
 229         if (long_op) ESP_reg(context) = *(DWORD *)addr;
 230         else SP_reg(context) = *(WORD *)addr;
 231         break;
 232     case 5:
 233         if (long_op) EBP_reg(context) = *(DWORD *)addr;
 234         else BP_reg(context) = *(WORD *)addr;
 235         break;
 236     case 6:
 237         if (long_op) ESI_reg(context) = *(DWORD *)addr;
 238         else SI_reg(context) = *(WORD *)addr;
 239         break;
 240     case 7:
 241         if (long_op) EDI_reg(context) = *(DWORD *)addr;
 242         else DI_reg(context) = *(WORD *)addr;
 243         break;
 244     }
 245
 246     /* Store the correct segment in the segment register */
 247
 248     switch(*instr)
 249     {
 250     case 0xc4: ES_reg(context) = seg; break;  /* les */
 251     case 0xc5: DS_reg(context) = seg; break;  /* lds */
 252     case 0x0f: switch(instr[1])
 253                {
 254                case 0xb2: SS_reg(context) = seg; break;  /* lss */
 255 #ifdef FS_reg
 256                case 0xb4: FS_reg(context) = seg; break;  /* lfs */
 257 #endif
 258 #ifdef GS_reg
 259                case 0xb5: GS_reg(context) = seg; break;  /* lgs */
 260 #endif
 261                }
 262                break;
 263     }
 264
 265     /* Add the opcode size to the total length */
 266
 267     *len += 1 + (*instr == 0x0f);
 268     return TRUE;
 269 }
 270
 271
 272 /***********************************************************************
 273  *           INSTR_EmulateInstruction
 274  *
 275  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 276  */
 277 BOOL INSTR_EmulateInstruction( struct sigcontext_struct *context )
 278 {
 279     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 280     BYTE *instr;
 281
 282     long_op = long_addr = (GET_SEL_FLAGS(CS_reg(context)) & LDT_FLAGS_32BIT) != 0;
 283     instr = (BYTE *) PTR_SEG_OFF_TO_LIN( CS_reg(context), EIP_reg(context) );
 284
 285     /* First handle any possible prefix */
 286
 287     segprefix = -1;  /* no prefix */
 288     prefix = 1;
 289     repX = 0;
 290     prefixlen = 0;
 291     while(prefix)
 292     {
 293         switch(*instr)
 294         {
 295         case 0x2e:
 296             segprefix = CS_reg(context);
 297             break;
 298         case 0x36:
 299             segprefix = SS_reg(context);
 300             break;
 301         case 0x3e:
 302             segprefix = DS_reg(context);
 303             break;
 304         case 0x26:
 305             segprefix = ES_reg(context);
 306             break;
 307 #ifdef FS_reg
 308         case 0x64:
 309             segprefix = FS_reg(context);
 310             break;
 311 #endif
 312 #ifdef GS_reg
 313         case 0x65:
 314             segprefix = GS_reg(context);
 315             break;
 316 #endif
 317         case 0x66:
 318             long_op = !long_op;  /* opcode size prefix */
 319             break;
 320         case 0x67:
 321             long_addr = !long_addr;  /* addr size prefix */
 322             break;
 323         case 0xf0:  /* lock */
 324             break;
 325         case 0xf2:  /* repne */
 326             repX = 1;
 327             break;
 328         case 0xf3:  /* repe */
 329             repX = 2;
 330             break;
 331         default:
 332             prefix = 0;  /* no more prefixes */
 333             break;
 334         }
 335         if (prefix)
 336         {
 337             instr++;
 338             prefixlen++;
 339         }
 340     }
 341
 342     /* Now look at the actual instruction */
 343
 344     switch(*instr)
 345     {
 346         case 0x07: /* pop es */
 347         case 0x17: /* pop ss */
 348         case 0x1f: /* pop ds */
 349             {
 350                 WORD seg = *(WORD *)STACK_PTR( context );
 351                 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 352                 {
 353                     switch(*instr)
 354                     {
 355                     case 0x07: ES_reg(context) = seg; break;
 356                     case 0x17: SS_reg(context) = seg; break;
 357                     case 0x1f: DS_reg(context) = seg; break;
 358                     }
 359                     STACK_reg(context) += long_op ? 4 : 2;
 360                     EIP_reg(context) += prefixlen + 1;
 361                     return TRUE;
 362                 }
 363             }
 364             break;  /* Unable to emulate it */
 365
 366         case 0x0f: /* extended instruction */
 367             switch(instr[1])
 368             {
 369 #ifdef FS_reg
 370             case 0xa1: /* pop fs */
 371                 {
 372                     WORD seg = *(WORD *)STACK_PTR( context );
 373                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 374                     {
 375                         FS_reg(context) = seg;
 376                         STACK_reg(context) += long_op ? 4 : 2;
 377                         EIP_reg(context) += prefixlen + 2;
 378                         return TRUE;
 379                     }
 380                 }
 381                 break;
 382 #endif  /* FS_reg */
 383
 384 #ifdef GS_reg
 385             case 0xa9: /* pop gs */
 386                 {
 387                     WORD seg = *(WORD *)STACK_PTR( context );
 388                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 389                     {
 390                         GS_reg(context) = seg;
 391                         STACK_reg(context) += long_op ? 4 : 2;
 392                         EIP_reg(context) += prefixlen + 2;
 393                         return TRUE;
 394                     }
 395                 }
 396                 break;
 397 #endif  /* GS_reg */
 398
 399             case 0xb2: /* lss addr,reg */
 400 #ifdef FS_reg
 401             case 0xb4: /* lfs addr,reg */
 402 #endif
 403 #ifdef GS_reg
 404             case 0xb5: /* lgs addr,reg */
 405 #endif
 406                 if (INSTR_EmulateLDS( context, instr, long_op,
 407                                       long_addr, segprefix, &len ))
 408                 {
 409                     EIP_reg(context) += prefixlen + len;
 410                     return TRUE;
 411                 }
 412                 break;
 413             }
 414             break;  /* Unable to emulate it */
 415
 416         case 0x6c: /* insb     */
 417         case 0x6d: /* insw/d   */
 418         case 0x6e: /* outsb    */
 419         case 0x6f: /* outsw/d  */
 420             {
 421               int typ = *instr;  /* Just in case it's overwritten.  */
 422               int outp = (typ >= 0x6e);
 423               unsigned long count = repX ?
 424                           (long_addr ? ECX_reg(context) : CX_reg(context)) : 1;
 425               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 426               int step = (EFL_reg(context) & 0x400) ? -opsize : +opsize;
 427               int seg = outp ? (segprefix >= 0 ? segprefix : DS_reg(context))
 428                              : ES_reg(context);  /* FIXME: is this right? */
 429
 430               if (outp)
 431                 /* FIXME: Check segment readable.  */
 432                 (void)0;
 433               else
 434                 /* FIXME: Check segment writeable.  */
 435                 (void)0;
 436
 437               if (repX)
 438                 if (long_addr)
 439                   ECX_reg(context) = 0;
 440                 else
 441                   CX_reg(context) = 0;
 442
 443               while (count-- > 0)
 444                 {
 445                   void *data;
 446                   if (outp)
 447                   {
 448                       data = PTR_SEG_OFF_TO_LIN (seg,
 449                                long_addr ? ESI_reg(context) : SI_reg(context));
 450                       if (long_addr) ESI_reg(context) += step;
 451                       else SI_reg(context) += step;
 452                   }
 453                   else
 454                   {
 455                       data = PTR_SEG_OFF_TO_LIN (seg,
 456                                long_addr ? EDI_reg(context) : DI_reg(context));
 457                       if (long_addr) EDI_reg(context) += step;
 458                       else DI_reg(context) += step;
 459                   }
 460
 461                   switch (typ)
 462                   {
 463                     case 0x6c:
 464                       *((BYTE *)data) = inport( DX_reg(context), 1);
 465                       break;
 466                     case 0x6d:
 467                       if (long_op)
 468                         *((DWORD *)data) = inport( DX_reg(context), 4);
 469                       else
 470                         *((WORD *)data) = inport( DX_reg(context), 2);
 471                       break;
 472                     case 0x6e:
 473                       outport( DX_reg(context), 1, *((BYTE *)data));
 474                       break;
 475                     case 0x6f:
 476                       if (long_op)
 477                         outport( DX_reg(context), 4, *((DWORD *)data));
 478                       else
 479                         outport( DX_reg(context), 2, *((WORD *)data));
 480                       break;
 481                     }
 482                 }
 483               EIP_reg(context) += prefixlen + 1;
 484             }
 485             return TRUE;
 486
 487         case 0x8e: /* mov XX,segment_reg */
 488             {
 489                 WORD seg = *(WORD *)INSTR_GetOperandAddr( context, instr + 1,
 490                                                   long_addr, segprefix, &len );
 491                 if (!(seg = INSTR_ReplaceSelector( context, seg )))
 492                     break;  /* Unable to emulate it */
 493
 494                 switch((instr[1] >> 3) & 7)
 495                 {
 496                 case 0:
 497                     ES_reg(context) = seg;
 498                     EIP_reg(context) += prefixlen + len + 1;
 499                     return TRUE;
 500                 case 1:  /* cs */
 501                     break;
 502                 case 2:
 503                     SS_reg(context) = seg;
 504                     EIP_reg(context) += prefixlen + len + 1;
 505                     return TRUE;
 506                 case 3:
 507                     DS_reg(context) = seg;
 508                     EIP_reg(context) += prefixlen + len + 1;
 509                     return TRUE;
 510                 case 4:
 511 #ifdef FS_reg
 512                     FS_reg(context) = seg;
 513                     EIP_reg(context) += prefixlen + len + 1;
 514                     return TRUE;
 515 #endif
 516                 case 5:
 517 #ifdef GS_reg
 518                     GS_reg(context) = seg;
 519                     EIP_reg(context) += prefixlen + len + 1;
 520                     return TRUE;
 521 #endif
 522                 case 6:  /* unused */
 523                 case 7:  /* unused */
 524                     break;
 525                 }
 526             }
 527             break;  /* Unable to emulate it */
 528
 529         case 0xc4: /* les addr,reg */
 530         case 0xc5: /* lds addr,reg */
 531             if (INSTR_EmulateLDS( context, instr, long_op,
 532                                   long_addr, segprefix, &len ))
 533             {
 534                 EIP_reg(context) += prefixlen + len;
 535                 return TRUE;
 536             }
 537             break;  /* Unable to emulate it */
 538
 539         case 0xcd: /* int <XX> */
 540             if (long_op)
 541             {
 542                 fprintf(stderr, "int xx from 32-bit code is not supported.\n");
 543                 break;  /* Unable to emulate it */
 544             }
 545             else
 546             {
 547                 SEGPTR addr = INT_GetHandler( instr[1] );
 548                 WORD *stack = (WORD *)STACK_PTR( context );
 549                 /* Push the flags and return address on the stack */
 550                 *(--stack) = FL_reg(context);
 551                 *(--stack) = CS_reg(context);
 552                 *(--stack) = IP_reg(context) + prefixlen + 2;
 553                 STACK_reg(context) -= 3 * sizeof(WORD);
 554                 /* Jump to the interrupt handler */
 555                 CS_reg(context)  = HIWORD(addr);
 556                 EIP_reg(context) = LOWORD(addr);
 557             }
 558             return TRUE;
 559
 560         case 0xcf: /* iret */
 561             if (long_op)
 562             {
 563                 DWORD *stack = (DWORD *)STACK_PTR( context );
 564                 EIP_reg(context) = *stack++;
 565                 CS_reg(context)  = *stack++;
 566                 EFL_reg(context) = *stack;
 567                 STACK_reg(context) += 3*sizeof(DWORD);  /* Pop the return address and flags */
 568             }
 569             else
 570             {
 571                 WORD *stack = (WORD *)STACK_PTR( context );
 572                 EIP_reg(context) = *stack++;
 573                 CS_reg(context)  = *stack++;
 574                 FL_reg(context)  = *stack;
 575                 STACK_reg(context) += 3*sizeof(WORD);  /* Pop the return address and flags */
 576             }
 577             return TRUE;
 578
 579         case 0xe4: /* inb al,XX */
 580             AL_reg(context) = inport( instr[1], 1 );
 581             EIP_reg(context) += prefixlen + 2;
 582             return TRUE;
 583
 584         case 0xe5: /* in (e)ax,XX */
 585             if (long_op) EAX_reg(context) = inport( instr[1], 4 );
 586             else AX_reg(context) = inport( instr[1], 2 );
 587             EIP_reg(context) += prefixlen + 2;
 588             return TRUE;
 589
 590         case 0xe6: /* outb XX,al */
 591             outport( instr[1], 1, AL_reg(context) );
 592             EIP_reg(context) += prefixlen + 2;
 593             return TRUE;
 594
 595         case 0xe7: /* out XX,(e)ax */
 596             if (long_op) outport( instr[1], 4, EAX_reg(context) );
 597             else outport( instr[1], 2, AX_reg(context) );
 598             EIP_reg(context) += prefixlen + 2;
 599             return TRUE;
 600
 601         case 0xec: /* inb al,dx */
 602             AL_reg(context) = inport( DX_reg(context), 1 );
 603             EIP_reg(context) += prefixlen + 1;
 604             return TRUE;
 605
 606         case 0xed: /* in (e)ax,dx */
 607             if (long_op) EAX_reg(context) = inport( DX_reg(context), 4 );
 608             else AX_reg(context) = inport( DX_reg(context), 2 );
 609             EIP_reg(context) += prefixlen + 1;
 610             return TRUE;
 611
 612         case 0xee: /* outb dx,al */
 613             outport( DX_reg(context), 1, AL_reg(context) );
 614             EIP_reg(context) += prefixlen + 1;
 615             return TRUE;
 616
 617         case 0xef: /* out dx,(e)ax */
 618             if (long_op) outport( DX_reg(context), 4, EAX_reg(context) );
 619             else outport( DX_reg(context), 2, AX_reg(context) );
 620             EIP_reg(context) += prefixlen + 1;
 621             return TRUE;
 622
 623         case 0xfa: /* cli, ignored */
 624             EIP_reg(context) += prefixlen + 1;
 625             return TRUE;
 626
 627         case 0xfb: /* sti, ignored */
 628             EIP_reg(context) += prefixlen + 1;
 629             return TRUE;
 630     }
 631     fprintf(stderr, "Unexpected Windows program segfault"
 632                     " - opcode = %x\n", *instr);
 633     return FALSE;  /* Unable to emulate it */
 634 }