miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include "wine/winuser16.h"
   8 #include "ldt.h"
   9 #include "global.h"
  10 #include "module.h"
  11 #include "dosexe.h"
  12 #include "miscemu.h"
  13 #include "sig_context.h"
  14 #include "selectors.h"
  15 #include "debugtools.h"
  16
  17 DECLARE_DEBUG_CHANNEL(int)
  18 DECLARE_DEBUG_CHANNEL(io)
  19
  20
  21 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
  22 #define IS_SEL_32(context,seg) \
  23    (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
  24
  25 #define STACK_sig(context) \
  26    (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : SP_sig(context))
  27
  28 #define MAKE_PTR(seg,off) \
  29    (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
  30
  31 #define MK_PTR(context,seg,off) \
  32    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
  33                     : MAKE_PTR(seg,off))
  34
  35 #define STACK_PTR(context) \
  36    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
  37     (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
  38      (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
  39
  40 /* For invalid registers fixup */
  41 extern DWORD CallFrom16_Start,CallFrom16_End;
  42 extern DWORD CALLTO16_Start,CALLTO16_End;
  43
  44
  45 /***********************************************************************
  46  *           INSTR_ReplaceSelector
  47  *
  48  * Try to replace an invalid selector by a valid one.
  49  * The only selector where it is allowed to do "mov ax,40;mov es,ax"
  50  * is the so called 'bimodal' selector 0x40, which points to the BIOS
  51  * data segment. Used by (at least) Borland products (and programs compiled
  52  * using Borland products).
  53  *
  54  * See Undocumented Windows, Chapter 5, __0040.
  55  */
  56 static BOOL INSTR_ReplaceSelector( SIGCONTEXT *context, WORD *sel )
  57 {
  58     if ( IS_SELECTOR_SYSTEM(CS_sig(context)) )
  59         if (    ( EIP_sig(context) >= (DWORD)&CallFrom16_Start &&
  60                   EIP_sig(context) <  (DWORD)&CallFrom16_End )
  61              || ( EIP_sig(context) >= (DWORD)&CALLTO16_Start &&
  62                   EIP_sig(context) <  (DWORD)&CALLTO16_End ) )
  63         {
  64             /* Saved selector may have become invalid when the relay code */
  65             /* tries to restore it. We simply clear it. */
  66             *sel = 0;
  67             return TRUE;
  68         }
  69
  70     if (*sel == 0x40)
  71     {
  72         static WORD sys_timer = 0;
  73         if (!sys_timer)
  74             sys_timer = CreateSystemTimer( 55, DOSMEM_Tick );
  75         *sel = DOSMEM_BiosDataSeg;
  76         return TRUE;
  77     }
  78     return FALSE;  /* Can't replace selector, crashdump */
  79 }
  80
  81
  82 /***********************************************************************
  83  *           INSTR_GetOperandAddr
  84  *
  85  * Return the address of an instruction operand (from the mod/rm byte).
  86  */
  87 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
  88                                    int long_addr, int segprefix, int *len )
  89 {
  90     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  91
  92 #define GET_VAL(val,type) \
  93     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  94
  95     *len = 0;
  96     GET_VAL( &mod, BYTE );
  97     rm = mod & 7;
  98     mod >>= 6;
  99
 100     if (mod == 3)
 101     {
 102         switch(rm)
 103         {
 104         case 0: return (BYTE *)&EAX_sig(context);
 105         case 1: return (BYTE *)&ECX_sig(context);
 106         case 2: return (BYTE *)&EDX_sig(context);
 107         case 3: return (BYTE *)&EBX_sig(context);
 108         case 4: return (BYTE *)&ESP_sig(context);
 109         case 5: return (BYTE *)&EBP_sig(context);
 110         case 6: return (BYTE *)&ESI_sig(context);
 111         case 7: return (BYTE *)&EDI_sig(context);
 112         }
 113     }
 114
 115     if (long_addr)
 116     {
 117         if (rm == 4)
 118         {
 119             BYTE sib;
 120             GET_VAL( &sib, BYTE );
 121             rm = sib & 7;
 122             ss = sib >> 6;
 123             switch(sib >> 3)
 124             {
 125             case 0: index = EAX_sig(context); break;
 126             case 1: index = ECX_sig(context); break;
 127             case 2: index = EDX_sig(context); break;
 128             case 3: index = EBX_sig(context); break;
 129             case 4: index = 0; break;
 130             case 5: index = EBP_sig(context); break;
 131             case 6: index = ESI_sig(context); break;
 132             case 7: index = EDI_sig(context); break;
 133             }
 134         }
 135
 136         switch(rm)
 137         {
 138         case 0: base = EAX_sig(context); seg = DS_sig(context); break;
 139         case 1: base = ECX_sig(context); seg = DS_sig(context); break;
 140         case 2: base = EDX_sig(context); seg = DS_sig(context); break;
 141         case 3: base = EBX_sig(context); seg = DS_sig(context); break;
 142         case 4: base = ESP_sig(context); seg = SS_sig(context); break;
 143         case 5: base = EBP_sig(context); seg = SS_sig(context); break;
 144         case 6: base = ESI_sig(context); seg = DS_sig(context); break;
 145         case 7: base = EDI_sig(context); seg = DS_sig(context); break;
 146         }
 147         switch (mod)
 148         {
 149         case 0:
 150             if (rm == 5)  /* special case: ds:(disp32) */
 151             {
 152                 GET_VAL( &base, DWORD );
 153                 seg = DS_sig(context);
 154             }
 155             break;
 156
 157         case 1:  /* 8-bit disp */
 158             GET_VAL( &off, BYTE );
 159             base += (signed char)off;
 160             break;
 161
 162         case 2:  /* 32-bit disp */
 163             GET_VAL( &off, DWORD );
 164             base += (signed long)off;
 165             break;
 166         }
 167     }
 168     else  /* short address */
 169     {
 170         switch(rm)
 171         {
 172         case 0:  /* ds:(bx,si) */
 173             base = BX_sig(context) + SI_sig(context);
 174             seg  = DS_sig(context);
 175             break;
 176         case 1:  /* ds:(bx,di) */
 177             base = BX_sig(context) + DI_sig(context);
 178             seg  = DS_sig(context);
 179             break;
 180         case 2:  /* ss:(bp,si) */
 181             base = BP_sig(context) + SI_sig(context);
 182             seg  = SS_sig(context);
 183             break;
 184         case 3:  /* ss:(bp,di) */
 185             base = BP_sig(context) + DI_sig(context);
 186             seg  = SS_sig(context);
 187             break;
 188         case 4:  /* ds:(si) */
 189             base = SI_sig(context);
 190             seg  = DS_sig(context);
 191             break;
 192         case 5:  /* ds:(di) */
 193             base = DI_sig(context);
 194             seg  = DS_sig(context);
 195             break;
 196         case 6:  /* ss:(bp) */
 197             base = BP_sig(context);
 198             seg  = SS_sig(context);
 199             break;
 200         case 7:  /* ds:(bx) */
 201             base = BX_sig(context);
 202             seg  = DS_sig(context);
 203             break;
 204         }
 205
 206         switch(mod)
 207         {
 208         case 0:
 209             if (rm == 6)  /* special case: ds:(disp16) */
 210             {
 211                 GET_VAL( &base, WORD );
 212                 seg  = DS_sig(context);
 213             }
 214             break;
 215
 216         case 1:  /* 8-bit disp */
 217             GET_VAL( &off, BYTE );
 218             base += (signed char)off;
 219             break;
 220
 221         case 2:  /* 16-bit disp */
 222             GET_VAL( &off, WORD );
 223             base += (signed short)off;
 224             break;
 225         }
 226         base &= 0xffff;
 227     }
 228     if (segprefix != -1) seg = segprefix;
 229
 230     /* Make sure the segment and offset are valid */
 231     if (IS_SELECTOR_SYSTEM(seg)) return (BYTE *)(base + (index << ss));
 232     if (((seg & 7) != 7) || IS_SELECTOR_FREE(seg)) return NULL;
 233     if (GET_SEL_LIMIT(seg) < (base + (index << ss))) return NULL;
 234     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 235 #undef GET_VAL
 236 }
 237
 238
 239 /***********************************************************************
 240  *           INSTR_EmulateLDS
 241  *
 242  * Emulate the LDS (and LES,LFS,etc.) instruction.
 243  */
 244 static BOOL INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
 245                                 int long_addr, int segprefix, int *len )
 246 {
 247     WORD seg;
 248     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 249     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 250                                        long_addr, segprefix, len );
 251     if (!addr)
 252         return FALSE;  /* Unable to emulate it */
 253     seg = *(WORD *)(addr + (long_op ? 4 : 2));
 254
 255     if (!INSTR_ReplaceSelector( context, &seg ))
 256         return FALSE;  /* Unable to emulate it */
 257
 258     /* Now store the offset in the correct register */
 259
 260     switch((*regmodrm >> 3) & 7)
 261     {
 262     case 0:
 263         if (long_op) EAX_sig(context) = *(DWORD *)addr;
 264         else AX_sig(context) = *(WORD *)addr;
 265         break;
 266     case 1:
 267         if (long_op) ECX_sig(context) = *(DWORD *)addr;
 268         else CX_sig(context) = *(WORD *)addr;
 269         break;
 270     case 2:
 271         if (long_op) EDX_sig(context) = *(DWORD *)addr;
 272         else DX_sig(context) = *(WORD *)addr;
 273         break;
 274     case 3:
 275         if (long_op) EBX_sig(context) = *(DWORD *)addr;
 276         else BX_sig(context) = *(WORD *)addr;
 277         break;
 278     case 4:
 279         if (long_op) ESP_sig(context) = *(DWORD *)addr;
 280         else SP_sig(context) = *(WORD *)addr;
 281         break;
 282     case 5:
 283         if (long_op) EBP_sig(context) = *(DWORD *)addr;
 284         else BP_sig(context) = *(WORD *)addr;
 285         break;
 286     case 6:
 287         if (long_op) ESI_sig(context) = *(DWORD *)addr;
 288         else SI_sig(context) = *(WORD *)addr;
 289         break;
 290     case 7:
 291         if (long_op) EDI_sig(context) = *(DWORD *)addr;
 292         else DI_sig(context) = *(WORD *)addr;
 293         break;
 294     }
 295
 296     /* Store the correct segment in the segment register */
 297
 298     switch(*instr)
 299     {
 300     case 0xc4: ES_sig(context) = seg; break;  /* les */
 301     case 0xc5: DS_sig(context) = seg; break;  /* lds */
 302     case 0x0f: switch(instr[1])
 303                {
 304                case 0xb2: SS_sig(context) = seg; break;  /* lss */
 305 #ifdef FS_sig
 306                case 0xb4: FS_sig(context) = seg; break;  /* lfs */
 307 #endif
 308 #ifdef GS_sig
 309                case 0xb5: GS_sig(context) = seg; break;  /* lgs */
 310 #endif
 311                }
 312                break;
 313     }
 314
 315     /* Add the opcode size to the total length */
 316
 317     *len += 1 + (*instr == 0x0f);
 318     return TRUE;
 319 }
 320
 321
 322 /***********************************************************************
 323  *           INSTR_EmulateInstruction
 324  *
 325  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 326  */
 327 BOOL INSTR_EmulateInstruction( SIGCONTEXT *context )
 328 {
 329     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 330     SEGPTR gpHandler;
 331     BYTE *instr;
 332
 333     long_op = long_addr = IS_SEL_32(context,CS_sig(context));
 334     instr = (BYTE *)MK_PTR(context,CS_sig(context),EIP_sig(context));
 335     if (!instr) return FALSE;
 336
 337     /* First handle any possible prefix */
 338
 339     segprefix = -1;  /* no prefix */
 340     prefix = 1;
 341     repX = 0;
 342     prefixlen = 0;
 343     while(prefix)
 344     {
 345         switch(*instr)
 346         {
 347         case 0x2e:
 348             segprefix = CS_sig(context);
 349             break;
 350         case 0x36:
 351             segprefix = SS_sig(context);
 352             break;
 353         case 0x3e:
 354             segprefix = DS_sig(context);
 355             break;
 356         case 0x26:
 357             segprefix = ES_sig(context);
 358             break;
 359 #ifdef FS_sig
 360         case 0x64:
 361             segprefix = FS_sig(context);
 362             break;
 363 #endif
 364 #ifdef GS_sig
 365         case 0x65:
 366             segprefix = GS_sig(context);
 367             break;
 368 #endif
 369         case 0x66:
 370             long_op = !long_op;  /* opcode size prefix */
 371             break;
 372         case 0x67:
 373             long_addr = !long_addr;  /* addr size prefix */
 374             break;
 375         case 0xf0:  /* lock */
 376             break;
 377         case 0xf2:  /* repne */
 378             repX = 1;
 379             break;
 380         case 0xf3:  /* repe */
 381             repX = 2;
 382             break;
 383         default:
 384             prefix = 0;  /* no more prefixes */
 385             break;
 386         }
 387         if (prefix)
 388         {
 389             instr++;
 390             prefixlen++;
 391         }
 392     }
 393
 394     /* Now look at the actual instruction */
 395
 396     switch(*instr)
 397     {
 398         case 0x07: /* pop es */
 399         case 0x17: /* pop ss */
 400         case 0x1f: /* pop ds */
 401             {
 402                 WORD seg = *(WORD *)STACK_PTR( context );
 403                 if (INSTR_ReplaceSelector( context, &seg ))
 404                 {
 405                     switch(*instr)
 406                     {
 407                     case 0x07: ES_sig(context) = seg; break;
 408                     case 0x17: SS_sig(context) = seg; break;
 409                     case 0x1f: DS_sig(context) = seg; break;
 410                     }
 411                     STACK_sig(context) += long_op ? 4 : 2;
 412                     EIP_sig(context) += prefixlen + 1;
 413                     return TRUE;
 414                 }
 415             }
 416             break;  /* Unable to emulate it */
 417
 418         case 0x0f: /* extended instruction */
 419             switch(instr[1])
 420             {
 421             case 0x22: /* mov eax, crX */
 422                 switch (instr[2]) {
 423                 case 0xc0:
 424                         fprintf(stderr,"mov eax,cr0 at 0x%08lx, EAX=0x%08lx\n",
 425                                 EIP_sig(context),EAX_sig(context)
 426                         );
 427                         EIP_sig(context) += prefixlen+3;
 428                         return TRUE;
 429                 default:
 430                         break; /*fallthrough to bad instruction handling */
 431                 }
 432                 break; /*fallthrough to bad instruction handling */
 433             case 0x20: /* mov crX, eax */
 434                 switch (instr[2]) {
 435                 case 0xe0: /* mov cr4, eax */
 436                     /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
 437                      * bit 0: VME       Virtual Mode Exception ?
 438                      * bit 1: PVI       Protected mode Virtual Interrupt
 439                      * bit 2: TSD       Timestamp disable
 440                      * bit 3: DE        Debugging extensions
 441                      * bit 4: PSE       Page size extensions
 442                      * bit 5: PAE   Physical address extension
 443                      * bit 6: MCE       Machine check enable
 444                      * bit 7: PGE   Enable global pages
 445                      * bit 8: PCE       Enable performance counters at IPL3
 446                      */
 447                     fprintf(stderr,"mov cr4,eax at 0x%08lx\n",EIP_sig(context));
 448                     EAX_sig(context) = 0;
 449                     EIP_sig(context) += prefixlen+3;
 450                     return TRUE;
 451                 case 0xc0: /* mov cr0, eax */
 452                     fprintf(stderr,"mov cr0,eax at 0x%08lx\n",EIP_sig(context));
 453                     EAX_sig(context) = 0x10; /* FIXME: set more bits ? */
 454                     EIP_sig(context) += prefixlen+3;
 455                     return TRUE;
 456                 default: /* fallthrough to illegal instruction */
 457                     break;
 458                 }
 459                 /* fallthrough to illegal instruction */
 460                 break;
 461 #ifdef FS_sig
 462             case 0xa1: /* pop fs */
 463                 {
 464                     WORD seg = *(WORD *)STACK_PTR( context );
 465                     if (INSTR_ReplaceSelector( context, &seg ))
 466                     {
 467                         FS_sig(context) = seg;
 468                         STACK_sig(context) += long_op ? 4 : 2;
 469                         EIP_sig(context) += prefixlen + 2;
 470                         return TRUE;
 471                     }
 472                 }
 473                 break;
 474 #endif  /* FS_sig */
 475
 476 #ifdef GS_sig
 477             case 0xa9: /* pop gs */
 478                 {
 479                     WORD seg = *(WORD *)STACK_PTR( context );
 480                     if (INSTR_ReplaceSelector( context, &seg ))
 481                     {
 482                         GS_sig(context) = seg;
 483                         STACK_sig(context) += long_op ? 4 : 2;
 484                         EIP_sig(context) += prefixlen + 2;
 485                         return TRUE;
 486                     }
 487                 }
 488                 break;
 489 #endif  /* GS_sig */
 490
 491             case 0xb2: /* lss addr,reg */
 492 #ifdef FS_sig
 493             case 0xb4: /* lfs addr,reg */
 494 #endif
 495 #ifdef GS_sig
 496             case 0xb5: /* lgs addr,reg */
 497 #endif
 498                 if (INSTR_EmulateLDS( context, instr, long_op,
 499                                       long_addr, segprefix, &len ))
 500                 {
 501                     EIP_sig(context) += prefixlen + len;
 502                     return TRUE;
 503                 }
 504                 break;
 505             }
 506             break;  /* Unable to emulate it */
 507
 508         case 0x6c: /* insb     */
 509         case 0x6d: /* insw/d   */
 510         case 0x6e: /* outsb    */
 511         case 0x6f: /* outsw/d  */
 512             {
 513               int typ = *instr;  /* Just in case it's overwritten.  */
 514               int outp = (typ >= 0x6e);
 515               unsigned long count = repX ?
 516                           (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
 517               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 518               int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
 519               int seg = outp ? DS_sig(context) : ES_sig(context);  /* FIXME: is this right? */
 520
 521               if (outp)
 522                 /* FIXME: Check segment readable.  */
 523                 (void)0;
 524               else
 525                 /* FIXME: Check segment writeable.  */
 526                 (void)0;
 527
 528               if (repX)
 529               {
 530                 if (long_addr)
 531                   ECX_sig(context) = 0;
 532                 else
 533                   CX_sig(context) = 0;
 534               }
 535
 536               while (count-- > 0)
 537                 {
 538                   void *data;
 539                   if (outp)
 540                   {
 541                       data = MK_PTR(context, seg,
 542                                long_addr ? ESI_sig(context) : SI_sig(context));
 543                       if (long_addr) ESI_sig(context) += step;
 544                       else SI_sig(context) += step;
 545                   }
 546                   else
 547                   {
 548                       data = MK_PTR(context, seg,
 549                                long_addr ? EDI_sig(context) : DI_sig(context));
 550                       if (long_addr) EDI_sig(context) += step;
 551                       else DI_sig(context) += step;
 552                   }
 553
 554                   switch (typ)
 555                   {
 556                     case 0x6c:
 557                       *((BYTE *)data) = IO_inport( DX_sig(context), 1);
 558                       TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 559                         *((BYTE *)data), CS_sig(context), IP_sig(context));
 560                       break;
 561                     case 0x6d:
 562                       if (long_op)
 563                       {
 564                         *((DWORD *)data) = IO_inport( DX_sig(context), 4);
 565                         TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 566                           *((DWORD *)data), CS_sig(context), IP_sig(context));
 567                       }
 568                       else
 569                       {
 570                         *((WORD *)data) = IO_inport( DX_sig(context), 2);
 571                         TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 572                           *((WORD *)data), CS_sig(context), IP_sig(context));
 573                       }
 574                       break;
 575                     case 0x6e:
 576                         IO_outport( DX_sig(context), 1, *((BYTE *)data));
 577                         TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 578                           *((BYTE *)data), CS_sig(context), IP_sig(context));
 579                         break;
 580                     case 0x6f:
 581                         if (long_op)
 582                         {
 583                             IO_outport( DX_sig(context), 4, *((DWORD *)data));
 584                             TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 585                               *((DWORD *)data), CS_sig(context), IP_sig(context));
 586                         }
 587                         else
 588                         {
 589                             IO_outport( DX_sig(context), 2, *((WORD *)data));
 590                             TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 591                               *((WORD *)data), CS_sig(context), IP_sig(context));
 592                         }
 593                         break;
 594                     }
 595                 }
 596               EIP_sig(context) += prefixlen + 1;
 597             }
 598             return TRUE;
 599
 600         case 0x8e: /* mov XX,segment_reg */
 601             {
 602                 WORD seg;
 603                 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
 604                                                   long_addr, segprefix, &len );
 605                 if (!addr)
 606                     break;  /* Unable to emulate it */
 607                 seg = *(WORD *)addr;
 608                 if (!INSTR_ReplaceSelector( context, &seg ))
 609                     break;  /* Unable to emulate it */
 610
 611                 switch((instr[1] >> 3) & 7)
 612                 {
 613                 case 0:
 614                     ES_sig(context) = seg;
 615                     EIP_sig(context) += prefixlen + len + 1;
 616                     return TRUE;
 617                 case 1:  /* cs */
 618                     break;
 619                 case 2:
 620                     SS_sig(context) = seg;
 621                     EIP_sig(context) += prefixlen + len + 1;
 622                     return TRUE;
 623                 case 3:
 624                     DS_sig(context) = seg;
 625                     EIP_sig(context) += prefixlen + len + 1;
 626                     return TRUE;
 627                 case 4:
 628 #ifdef FS_sig
 629                     FS_sig(context) = seg;
 630                     EIP_sig(context) += prefixlen + len + 1;
 631                     return TRUE;
 632 #endif
 633                 case 5:
 634 #ifdef GS_sig
 635                     GS_sig(context) = seg;
 636                     EIP_sig(context) += prefixlen + len + 1;
 637                     return TRUE;
 638 #endif
 639                 case 6:  /* unused */
 640                 case 7:  /* unused */
 641                     break;
 642                 }
 643             }
 644             break;  /* Unable to emulate it */
 645
 646         case 0xc4: /* les addr,reg */
 647         case 0xc5: /* lds addr,reg */
 648             if (INSTR_EmulateLDS( context, instr, long_op,
 649                                   long_addr, segprefix, &len ))
 650             {
 651                 EIP_sig(context) += prefixlen + len;
 652                 return TRUE;
 653             }
 654             break;  /* Unable to emulate it */
 655
 656         case 0xcd: /* int <XX> */
 657             if (long_op)
 658             {
 659                 ERR_(int)("int xx from 32-bit code is not supported.\n");
 660                 break;  /* Unable to emulate it */
 661             }
 662             else
 663             {
 664                 FARPROC16 addr = INT_GetPMHandler( instr[1] );
 665                 WORD *stack = (WORD *)STACK_PTR( context );
 666                 /* Push the flags and return address on the stack */
 667                 *(--stack) = FL_sig(context);
 668                 *(--stack) = CS_sig(context);
 669                 *(--stack) = IP_sig(context) + prefixlen + 2;
 670                 STACK_sig(context) -= 3 * sizeof(WORD);
 671                 /* Jump to the interrupt handler */
 672                 CS_sig(context)  = HIWORD(addr);
 673                 EIP_sig(context) = LOWORD(addr);
 674             }
 675             return TRUE;
 676
 677         case 0xcf: /* iret */
 678             if (long_op)
 679             {
 680                 DWORD *stack = (DWORD *)STACK_PTR( context );
 681                 EIP_sig(context) = *stack++;
 682                 CS_sig(context)  = *stack++;
 683                 EFL_sig(context) = *stack;
 684                 STACK_sig(context) += 3*sizeof(DWORD);  /* Pop the return address and flags */
 685             }
 686             else
 687             {
 688                 WORD *stack = (WORD *)STACK_PTR( context );
 689                 EIP_sig(context) = *stack++;
 690                 CS_sig(context)  = *stack++;
 691                 FL_sig(context)  = *stack;
 692                 STACK_sig(context) += 3*sizeof(WORD);  /* Pop the return address and flags */
 693             }
 694             return TRUE;
 695
 696         case 0xe4: /* inb al,XX */
 697             AL_sig(context) = IO_inport( instr[1], 1 );
 698             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", instr[1],
 699                 AL_sig(context), CS_sig(context), IP_sig(context));
 700             EIP_sig(context) += prefixlen + 2;
 701             return TRUE;
 702
 703         case 0xe5: /* in (e)ax,XX */
 704             if (long_op)
 705             {
 706                 EAX_sig(context) = IO_inport( instr[1], 4 );
 707                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", instr[1],
 708                     EAX_sig(context), CS_sig(context), IP_sig(context));
 709             }
 710             else
 711             {
 712                 AX_sig(context) = IO_inport( instr[1], 2 );
 713                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", instr[1],
 714                     AX_sig(context), CS_sig(context), IP_sig(context));
 715             }
 716             EIP_sig(context) += prefixlen + 2;
 717             return TRUE;
 718
 719         case 0xe6: /* outb XX,al */
 720             IO_outport( instr[1], 1, AL_sig(context) );
 721             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", instr[1],
 722                 AL_sig(context), CS_sig(context), IP_sig(context));
 723             EIP_sig(context) += prefixlen + 2;
 724             return TRUE;
 725
 726         case 0xe7: /* out XX,(e)ax */
 727             if (long_op)
 728             {
 729                 IO_outport( instr[1], 4, EAX_sig(context) );
 730                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", instr[1],
 731                     EAX_sig(context), CS_sig(context), IP_sig(context));
 732             }
 733             else
 734             {
 735                 IO_outport( instr[1], 2, AX_sig(context) );
 736                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", instr[1],
 737                     AX_sig(context), CS_sig(context), IP_sig(context));
 738             }
 739             EIP_sig(context) += prefixlen + 2;
 740             return TRUE;
 741
 742         case 0xec: /* inb al,dx */
 743             AL_sig(context) = IO_inport( DX_sig(context), 1 );
 744             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 745                 AL_sig(context), CS_sig(context), IP_sig(context));
 746             EIP_sig(context) += prefixlen + 1;
 747             return TRUE;
 748
 749         case 0xed: /* in (e)ax,dx */
 750             if (long_op)
 751             {
 752                 EAX_sig(context) = IO_inport( DX_sig(context), 4 );
 753                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 754                     EAX_sig(context), CS_sig(context), IP_sig(context));
 755             }
 756             else
 757             {
 758                 AX_sig(context) = IO_inport( DX_sig(context), 2 );
 759                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 760                     AX_sig(context), CS_sig(context), IP_sig(context));
 761             }
 762             EIP_sig(context) += prefixlen + 1;
 763             return TRUE;
 764
 765         case 0xee: /* outb dx,al */
 766             IO_outport( DX_sig(context), 1, AL_sig(context) );
 767             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 768                 AL_sig(context), CS_sig(context), IP_sig(context));
 769             EIP_sig(context) += prefixlen + 1;
 770             return TRUE;
 771
 772         case 0xef: /* out dx,(e)ax */
 773             if (long_op)
 774             {
 775                 IO_outport( DX_sig(context), 4, EAX_sig(context) );
 776                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 777                     EAX_sig(context), CS_sig(context), IP_sig(context));
 778             }
 779             else
 780             {
 781                 IO_outport( DX_sig(context), 2, AX_sig(context) );
 782                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 783                     AX_sig(context), CS_sig(context), IP_sig(context));
 784             }
 785             EIP_sig(context) += prefixlen + 1;
 786             return TRUE;
 787
 788         case 0xfa: /* cli, ignored */
 789             EIP_sig(context) += prefixlen + 1;
 790             return TRUE;
 791
 792         case 0xfb: /* sti, ignored */
 793             EIP_sig(context) += prefixlen + 1;
 794             return TRUE;
 795     }
 796
 797
 798     /* Check for Win16 __GP handler */
 799     gpHandler = HasGPHandler16( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context),
 800                                                      EIP_sig(context) ) );
 801     if (gpHandler)
 802     {
 803         WORD *stack = (WORD *)STACK_PTR( context );
 804         *--stack = CS_sig(context);
 805         *--stack = EIP_sig(context);
 806         STACK_sig(context) -= 2*sizeof(WORD);
 807
 808         CS_sig(context) = SELECTOROF( gpHandler );
 809         EIP_sig(context) = OFFSETOF( gpHandler );
 810         return TRUE;
 811     }
 812
 813     MESSAGE("Unexpected Windows program segfault"
 814                     " - opcode = %x\n", *instr);
 815     return FALSE;  /* Unable to emulate it */
 816 }