miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include <stdio.h>
   8 #include "windows.h"
   9 #include "ldt.h"
  10 #include "miscemu.h"
  11
  12
  13 #define STACK_reg(context) \
  14    ((GET_SEL_FLAGS(SS_reg(context)) & LDT_FLAGS_32BIT) ? \
  15                    ESP_reg(context) : SP_reg(context))
  16
  17 #define STACK_PTR(context) \
  18     (PTR_SEG_OFF_TO_LIN(SS_reg(context),STACK_reg(context)))
  19
  20 /***********************************************************************
  21  *           INSTR_ReplaceSelector
  22  *
  23  * Try to replace an invalid selector by a valid one.
  24  * For now, only selector 0x40 is handled here.
  25  */
  26 static WORD INSTR_ReplaceSelector( SIGCONTEXT *context, WORD sel)
  27 {
  28     if (sel == 0x40)
  29     {
  30         extern void SIGNAL_StartBIOSTimer(void);
  31         fprintf( stderr, "Direct access to segment 0x40 (cs:ip=%04x:%04lx).\n",
  32                  CS_reg(context), EIP_reg(context) );
  33         SIGNAL_StartBIOSTimer();
  34         return DOSMEM_BiosSeg;
  35     }
  36     return 0;  /* Can't replace selector */
  37 }
  38
  39
  40 /***********************************************************************
  41  *           INSTR_GetOperandAddr
  42  *
  43  * Return the address of an instruction operand (from the mod/rm byte).
  44  */
  45 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
  46                                    int long_addr, int segprefix, int *len )
  47 {
  48     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  49
  50 #define GET_VAL(val,type) \
  51     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  52
  53     *len = 0;
  54     GET_VAL( &mod, BYTE );
  55     rm = mod & 7;
  56     mod >>= 6;
  57
  58     if (mod == 3)
  59     {
  60         switch(rm)
  61         {
  62         case 0: return (BYTE *)&EAX_reg(context);
  63         case 1: return (BYTE *)&ECX_reg(context);
  64         case 2: return (BYTE *)&EDX_reg(context);
  65         case 3: return (BYTE *)&EBX_reg(context);
  66         case 4: return (BYTE *)&ESP_reg(context);
  67         case 5: return (BYTE *)&EBP_reg(context);
  68         case 6: return (BYTE *)&ESI_reg(context);
  69         case 7: return (BYTE *)&EDI_reg(context);
  70         }
  71     }
  72
  73     if (long_addr)
  74     {
  75         if (rm == 4)
  76         {
  77             BYTE sib;
  78             GET_VAL( &sib, BYTE );
  79             rm = sib & 7;
  80             ss = sib >> 6;
  81             switch(sib >> 3)
  82             {
  83             case 0: index = EAX_reg(context); break;
  84             case 1: index = ECX_reg(context); break;
  85             case 2: index = EDX_reg(context); break;
  86             case 3: index = EBX_reg(context); break;
  87             case 4: index = 0; break;
  88             case 5: index = EBP_reg(context); break;
  89             case 6: index = ESI_reg(context); break;
  90             case 7: index = EDI_reg(context); break;
  91             }
  92         }
  93
  94         switch(rm)
  95         {
  96         case 0: base = EAX_reg(context); seg = DS_reg(context); break;
  97         case 1: base = ECX_reg(context); seg = DS_reg(context); break;
  98         case 2: base = EDX_reg(context); seg = DS_reg(context); break;
  99         case 3: base = EBX_reg(context); seg = DS_reg(context); break;
 100         case 4: base = ESP_reg(context); seg = SS_reg(context); break;
 101         case 5: base = EBP_reg(context); seg = SS_reg(context); break;
 102         case 6: base = ESI_reg(context); seg = DS_reg(context); break;
 103         case 7: base = EDI_reg(context); seg = DS_reg(context); break;
 104         }
 105         switch (mod)
 106         {
 107         case 0:
 108             if (rm == 5)  /* special case: ds:(disp32) */
 109             {
 110                 GET_VAL( &base, DWORD );
 111                 seg = DS_reg(context);
 112             }
 113             break;
 114
 115         case 1:  /* 8-bit disp */
 116             GET_VAL( &off, BYTE );
 117             base += (signed char)off;
 118             break;
 119
 120         case 2:  /* 32-bit disp */
 121             GET_VAL( &off, DWORD );
 122             base += (signed long)off;
 123             break;
 124         }
 125     }
 126     else  /* short address */
 127     {
 128         switch(rm)
 129         {
 130         case 0:  /* ds:(bx,si) */
 131             base = BX_reg(context) + SI_reg(context);
 132             seg  = DS_reg(context);
 133             break;
 134         case 1:  /* ds:(bx,di) */
 135             base = BX_reg(context) + DI_reg(context);
 136             seg  = DS_reg(context);
 137             break;
 138         case 2:  /* ss:(bp,si) */
 139             base = BP_reg(context) + SI_reg(context);
 140             seg  = SS_reg(context);
 141             break;
 142         case 3:  /* ss:(bp,di) */
 143             base = BP_reg(context) + DI_reg(context);
 144             seg  = SS_reg(context);
 145             break;
 146         case 4:  /* ds:(si) */
 147             base = SI_reg(context);
 148             seg  = DS_reg(context);
 149             break;
 150         case 5:  /* ds:(di) */
 151             base = DI_reg(context);
 152             seg  = DS_reg(context);
 153             break;
 154         case 6:  /* ss:(bp) */
 155             base = BP_reg(context);
 156             seg  = SS_reg(context);
 157             break;
 158         case 7:  /* ds:(bx) */
 159             base = BX_reg(context);
 160             seg  = DS_reg(context);
 161             break;
 162         }
 163
 164         switch(mod)
 165         {
 166         case 0:
 167             if (rm == 6)  /* special case: ds:(disp16) */
 168             {
 169                 GET_VAL( &base, WORD );
 170                 seg  = DS_reg(context);
 171             }
 172             break;
 173
 174         case 1:  /* 8-bit disp */
 175             GET_VAL( &off, BYTE );
 176             base += (signed char)off;
 177             break;
 178
 179         case 2:  /* 16-bit disp */
 180             GET_VAL( &off, WORD );
 181             base += (signed short)off;
 182             break;
 183         }
 184         base &= 0xffff;
 185     }
 186     if (segprefix != -1) seg = segprefix;
 187
 188     /* FIXME: should check limit of the segment here */
 189     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 190 }
 191
 192
 193 /***********************************************************************
 194  *           INSTR_EmulateLDS
 195  *
 196  * Emulate the LDS (and LES,LFS,etc.) instruction.
 197  */
 198 static BOOL32 INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
 199                                 int long_addr, int segprefix, int *len )
 200 {
 201     WORD seg;
 202     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 203     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 204                                        long_addr, segprefix, len );
 205     if (!addr)
 206         return FALSE;  /* Unable to emulate it */
 207     seg = *(WORD *)(addr + (long_op ? 4 : 2));
 208
 209     if (!(seg = INSTR_ReplaceSelector( context, seg )))
 210         return FALSE;  /* Unable to emulate it */
 211
 212     /* Now store the offset in the correct register */
 213
 214     switch((*regmodrm >> 3) & 7)
 215     {
 216     case 0:
 217         if (long_op) EAX_reg(context) = *(DWORD *)addr;
 218         else AX_reg(context) = *(WORD *)addr;
 219         break;
 220     case 1:
 221         if (long_op) ECX_reg(context) = *(DWORD *)addr;
 222         else CX_reg(context) = *(WORD *)addr;
 223         break;
 224     case 2:
 225         if (long_op) EDX_reg(context) = *(DWORD *)addr;
 226         else DX_reg(context) = *(WORD *)addr;
 227         break;
 228     case 3:
 229         if (long_op) EBX_reg(context) = *(DWORD *)addr;
 230         else BX_reg(context) = *(WORD *)addr;
 231         break;
 232     case 4:
 233         if (long_op) ESP_reg(context) = *(DWORD *)addr;
 234         else SP_reg(context) = *(WORD *)addr;
 235         break;
 236     case 5:
 237         if (long_op) EBP_reg(context) = *(DWORD *)addr;
 238         else BP_reg(context) = *(WORD *)addr;
 239         break;
 240     case 6:
 241         if (long_op) ESI_reg(context) = *(DWORD *)addr;
 242         else SI_reg(context) = *(WORD *)addr;
 243         break;
 244     case 7:
 245         if (long_op) EDI_reg(context) = *(DWORD *)addr;
 246         else DI_reg(context) = *(WORD *)addr;
 247         break;
 248     }
 249
 250     /* Store the correct segment in the segment register */
 251
 252     switch(*instr)
 253     {
 254     case 0xc4: ES_reg(context) = seg; break;  /* les */
 255     case 0xc5: DS_reg(context) = seg; break;  /* lds */
 256     case 0x0f: switch(instr[1])
 257                {
 258                case 0xb2: SS_reg(context) = seg; break;  /* lss */
 259 #ifdef FS_reg
 260                case 0xb4: FS_reg(context) = seg; break;  /* lfs */
 261 #endif
 262 #ifdef GS_reg
 263                case 0xb5: GS_reg(context) = seg; break;  /* lgs */
 264 #endif
 265                }
 266                break;
 267     }
 268
 269     /* Add the opcode size to the total length */
 270
 271     *len += 1 + (*instr == 0x0f);
 272     return TRUE;
 273 }
 274
 275
 276 /***********************************************************************
 277  *           INSTR_EmulateInstruction
 278  *
 279  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 280  */
 281 BOOL32 INSTR_EmulateInstruction( SIGCONTEXT *context )
 282 {
 283     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 284     BYTE *instr;
 285
 286     long_op = long_addr = (GET_SEL_FLAGS(CS_reg(context)) & LDT_FLAGS_32BIT) != 0;
 287     instr = (BYTE *) PTR_SEG_OFF_TO_LIN( CS_reg(context), EIP_reg(context) );
 288
 289     /* First handle any possible prefix */
 290
 291     segprefix = -1;  /* no prefix */
 292     prefix = 1;
 293     repX = 0;
 294     prefixlen = 0;
 295     while(prefix)
 296     {
 297         switch(*instr)
 298         {
 299         case 0x2e:
 300             segprefix = CS_reg(context);
 301             break;
 302         case 0x36:
 303             segprefix = SS_reg(context);
 304             break;
 305         case 0x3e:
 306             segprefix = DS_reg(context);
 307             break;
 308         case 0x26:
 309             segprefix = ES_reg(context);
 310             break;
 311 #ifdef FS_reg
 312         case 0x64:
 313             segprefix = FS_reg(context);
 314             break;
 315 #endif
 316 #ifdef GS_reg
 317         case 0x65:
 318             segprefix = GS_reg(context);
 319             break;
 320 #endif
 321         case 0x66:
 322             long_op = !long_op;  /* opcode size prefix */
 323             break;
 324         case 0x67:
 325             long_addr = !long_addr;  /* addr size prefix */
 326             break;
 327         case 0xf0:  /* lock */
 328             break;
 329         case 0xf2:  /* repne */
 330             repX = 1;
 331             break;
 332         case 0xf3:  /* repe */
 333             repX = 2;
 334             break;
 335         default:
 336             prefix = 0;  /* no more prefixes */
 337             break;
 338         }
 339         if (prefix)
 340         {
 341             instr++;
 342             prefixlen++;
 343         }
 344     }
 345
 346     /* Now look at the actual instruction */
 347
 348     switch(*instr)
 349     {
 350         case 0x07: /* pop es */
 351         case 0x17: /* pop ss */
 352         case 0x1f: /* pop ds */
 353             {
 354                 WORD seg = *(WORD *)STACK_PTR( context );
 355                 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 356                 {
 357                     switch(*instr)
 358                     {
 359                     case 0x07: ES_reg(context) = seg; break;
 360                     case 0x17: SS_reg(context) = seg; break;
 361                     case 0x1f: DS_reg(context) = seg; break;
 362                     }
 363                     STACK_reg(context) += long_op ? 4 : 2;
 364                     EIP_reg(context) += prefixlen + 1;
 365                     return TRUE;
 366                 }
 367             }
 368             break;  /* Unable to emulate it */
 369
 370         case 0x0f: /* extended instruction */
 371             switch(instr[1])
 372             {
 373 #ifdef FS_reg
 374             case 0xa1: /* pop fs */
 375                 {
 376                     WORD seg = *(WORD *)STACK_PTR( context );
 377                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 378                     {
 379                         FS_reg(context) = seg;
 380                         STACK_reg(context) += long_op ? 4 : 2;
 381                         EIP_reg(context) += prefixlen + 2;
 382                         return TRUE;
 383                     }
 384                 }
 385                 break;
 386 #endif  /* FS_reg */
 387
 388 #ifdef GS_reg
 389             case 0xa9: /* pop gs */
 390                 {
 391                     WORD seg = *(WORD *)STACK_PTR( context );
 392                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 393                     {
 394                         GS_reg(context) = seg;
 395                         STACK_reg(context) += long_op ? 4 : 2;
 396                         EIP_reg(context) += prefixlen + 2;
 397                         return TRUE;
 398                     }
 399                 }
 400                 break;
 401 #endif  /* GS_reg */
 402
 403             case 0xb2: /* lss addr,reg */
 404 #ifdef FS_reg
 405             case 0xb4: /* lfs addr,reg */
 406 #endif
 407 #ifdef GS_reg
 408             case 0xb5: /* lgs addr,reg */
 409 #endif
 410                 if (INSTR_EmulateLDS( context, instr, long_op,
 411                                       long_addr, segprefix, &len ))
 412                 {
 413                     EIP_reg(context) += prefixlen + len;
 414                     return TRUE;
 415                 }
 416                 break;
 417             }
 418             break;  /* Unable to emulate it */
 419
 420         case 0x6c: /* insb     */
 421         case 0x6d: /* insw/d   */
 422         case 0x6e: /* outsb    */
 423         case 0x6f: /* outsw/d  */
 424             {
 425               int typ = *instr;  /* Just in case it's overwritten.  */
 426               int outp = (typ >= 0x6e);
 427               unsigned long count = repX ?
 428                           (long_addr ? ECX_reg(context) : CX_reg(context)) : 1;
 429               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 430               int step = (EFL_reg(context) & 0x400) ? -opsize : +opsize;
 431               int seg = outp ? DS_reg(context) : ES_reg(context);  /* FIXME: is this right? */
 432
 433               if (outp)
 434                 /* FIXME: Check segment readable.  */
 435                 (void)0;
 436               else
 437                 /* FIXME: Check segment writeable.  */
 438                 (void)0;
 439
 440               if (repX)
 441                 if (long_addr)
 442                   ECX_reg(context) = 0;
 443                 else
 444                   CX_reg(context) = 0;
 445
 446               while (count-- > 0)
 447                 {
 448                   void *data;
 449                   if (outp)
 450                   {
 451                       data = PTR_SEG_OFF_TO_LIN (seg,
 452                                long_addr ? ESI_reg(context) : SI_reg(context));
 453                       if (long_addr) ESI_reg(context) += step;
 454                       else SI_reg(context) += step;
 455                   }
 456                   else
 457                   {
 458                       data = PTR_SEG_OFF_TO_LIN (seg,
 459                                long_addr ? EDI_reg(context) : DI_reg(context));
 460                       if (long_addr) EDI_reg(context) += step;
 461                       else DI_reg(context) += step;
 462                   }
 463
 464                   switch (typ)
 465                   {
 466                     case 0x6c:
 467                       *((BYTE *)data) = inport( DX_reg(context), 1);
 468                       break;
 469                     case 0x6d:
 470                       if (long_op)
 471                         *((DWORD *)data) = inport( DX_reg(context), 4);
 472                       else
 473                         *((WORD *)data) = inport( DX_reg(context), 2);
 474                       break;
 475                     case 0x6e:
 476                       outport( DX_reg(context), 1, *((BYTE *)data));
 477                       break;
 478                     case 0x6f:
 479                       if (long_op)
 480                         outport( DX_reg(context), 4, *((DWORD *)data));
 481                       else
 482                         outport( DX_reg(context), 2, *((WORD *)data));
 483                       break;
 484                     }
 485                 }
 486               EIP_reg(context) += prefixlen + 1;
 487             }
 488             return TRUE;
 489
 490         case 0x8e: /* mov XX,segment_reg */
 491             {
 492                 WORD seg;
 493                 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
 494                                                   long_addr, segprefix, &len );
 495                 if (!addr)
 496                     break;  /* Unable to emulate it */
 497                 seg = *(WORD *)addr;
 498                 if (!(seg = INSTR_ReplaceSelector( context, seg )))
 499                     break;  /* Unable to emulate it */
 500
 501                 switch((instr[1] >> 3) & 7)
 502                 {
 503                 case 0:
 504                     ES_reg(context) = seg;
 505                     EIP_reg(context) += prefixlen + len + 1;
 506                     return TRUE;
 507                 case 1:  /* cs */
 508                     break;
 509                 case 2:
 510                     SS_reg(context) = seg;
 511                     EIP_reg(context) += prefixlen + len + 1;
 512                     return TRUE;
 513                 case 3:
 514                     DS_reg(context) = seg;
 515                     EIP_reg(context) += prefixlen + len + 1;
 516                     return TRUE;
 517                 case 4:
 518 #ifdef FS_reg
 519                     FS_reg(context) = seg;
 520                     EIP_reg(context) += prefixlen + len + 1;
 521                     return TRUE;
 522 #endif
 523                 case 5:
 524 #ifdef GS_reg
 525                     GS_reg(context) = seg;
 526                     EIP_reg(context) += prefixlen + len + 1;
 527                     return TRUE;
 528 #endif
 529                 case 6:  /* unused */
 530                 case 7:  /* unused */
 531                     break;
 532                 }
 533             }
 534             break;  /* Unable to emulate it */
 535
 536         case 0xc4: /* les addr,reg */
 537         case 0xc5: /* lds addr,reg */
 538             if (INSTR_EmulateLDS( context, instr, long_op,
 539                                   long_addr, segprefix, &len ))
 540             {
 541                 EIP_reg(context) += prefixlen + len;
 542                 return TRUE;
 543             }
 544             break;  /* Unable to emulate it */
 545
 546         case 0xcd: /* int <XX> */
 547             if (long_op)
 548             {
 549                 fprintf(stderr, "int xx from 32-bit code is not supported.\n");
 550                 break;  /* Unable to emulate it */
 551             }
 552             else
 553             {
 554                 FARPROC16 addr = INT_GetHandler( instr[1] );
 555                 WORD *stack = (WORD *)STACK_PTR( context );
 556                 /* Push the flags and return address on the stack */
 557                 *(--stack) = FL_reg(context);
 558                 *(--stack) = CS_reg(context);
 559                 *(--stack) = IP_reg(context) + prefixlen + 2;
 560                 STACK_reg(context) -= 3 * sizeof(WORD);
 561                 /* Jump to the interrupt handler */
 562                 CS_reg(context)  = HIWORD(addr);
 563                 EIP_reg(context) = LOWORD(addr);
 564             }
 565             return TRUE;
 566
 567         case 0xcf: /* iret */
 568             if (long_op)
 569             {
 570                 DWORD *stack = (DWORD *)STACK_PTR( context );
 571                 EIP_reg(context) = *stack++;
 572                 CS_reg(context)  = *stack++;
 573                 EFL_reg(context) = *stack;
 574                 STACK_reg(context) += 3*sizeof(DWORD);  /* Pop the return address and flags */
 575             }
 576             else
 577             {
 578                 WORD *stack = (WORD *)STACK_PTR( context );
 579                 EIP_reg(context) = *stack++;
 580                 CS_reg(context)  = *stack++;
 581                 FL_reg(context)  = *stack;
 582                 STACK_reg(context) += 3*sizeof(WORD);  /* Pop the return address and flags */
 583             }
 584             return TRUE;
 585
 586         case 0xe4: /* inb al,XX */
 587             AL_reg(context) = inport( instr[1], 1 );
 588             EIP_reg(context) += prefixlen + 2;
 589             return TRUE;
 590
 591         case 0xe5: /* in (e)ax,XX */
 592             if (long_op) EAX_reg(context) = inport( instr[1], 4 );
 593             else AX_reg(context) = inport( instr[1], 2 );
 594             EIP_reg(context) += prefixlen + 2;
 595             return TRUE;
 596
 597         case 0xe6: /* outb XX,al */
 598             outport( instr[1], 1, AL_reg(context) );
 599             EIP_reg(context) += prefixlen + 2;
 600             return TRUE;
 601
 602         case 0xe7: /* out XX,(e)ax */
 603             if (long_op) outport( instr[1], 4, EAX_reg(context) );
 604             else outport( instr[1], 2, AX_reg(context) );
 605             EIP_reg(context) += prefixlen + 2;
 606             return TRUE;
 607
 608         case 0xec: /* inb al,dx */
 609             AL_reg(context) = inport( DX_reg(context), 1 );
 610             EIP_reg(context) += prefixlen + 1;
 611             return TRUE;
 612
 613         case 0xed: /* in (e)ax,dx */
 614             if (long_op) EAX_reg(context) = inport( DX_reg(context), 4 );
 615             else AX_reg(context) = inport( DX_reg(context), 2 );
 616             EIP_reg(context) += prefixlen + 1;
 617             return TRUE;
 618
 619         case 0xee: /* outb dx,al */
 620             outport( DX_reg(context), 1, AL_reg(context) );
 621             EIP_reg(context) += prefixlen + 1;
 622             return TRUE;
 623
 624         case 0xef: /* out dx,(e)ax */
 625             if (long_op) outport( DX_reg(context), 4, EAX_reg(context) );
 626             else outport( DX_reg(context), 2, AX_reg(context) );
 627             EIP_reg(context) += prefixlen + 1;
 628             return TRUE;
 629
 630         case 0xfa: /* cli, ignored */
 631             EIP_reg(context) += prefixlen + 1;
 632             return TRUE;
 633
 634         case 0xfb: /* sti, ignored */
 635             EIP_reg(context) += prefixlen + 1;
 636             return TRUE;
 637     }
 638     fprintf(stderr, "Unexpected Windows program segfault"
 639                     " - opcode = %x\n", *instr);
 640     return FALSE;  /* Unable to emulate it */
 641 }