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TESTING -- override pthreads to fix gstreamer v5
[wine/multimedia.git] / dlls / ntoskrnl.exe / instr.c
blob85b872e701be94e8bd2c72ee3c0032b5590dbd79
1 /*
2 * Emulation of privileged instructions
3 *
4 * Copyright 1995 Alexandre Julliard
5 * Copyright 2005 Ivan Leo Puoti
6 * Copyright 2005 Laurent Pinchart
7 * Copyright 2014-2015 Sebastian Lackner
8 *
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2.1 of the License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
18 *
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24 #include "config.h"
25 #include "wine/port.h"
26
27 #include <stdarg.h>
28
29 #include "windef.h"
30 #include "winbase.h"
31 #include "winternl.h"
32 #define WIN32_NO_STATUS
33 #include "ddk/wdm.h"
34 #include "excpt.h"
35 #include "wine/debug.h"
36 #include "wine/exception.h"
37
38 #ifdef __i386__
39
40 WINE_DEFAULT_DEBUG_CHANNEL(int);
41
42 #include "pshpack1.h"
43 struct idtr
44 {
45 WORD limit;
46 BYTE *base;
47 };
48 #include "poppack.h"
49
50 static LDT_ENTRY idt[256];
51
52 static inline struct idtr get_idtr(void)
53 {
54 struct idtr ret;
55 #ifdef __GNUC__
56 __asm__( "sidtl %0" : "=m" (ret) );
57 #else
58 ret.base = (BYTE *)idt;
59 ret.limit = sizeof(idt) - 1;
60 #endif
61 return ret;
62 }
63
64 /* store an operand into a register */
65 static void store_reg_word( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int long_op )
66 {
67 switch((regmodrm >> 3) & 7)
68 {
69 case 0:
70 if (long_op) context->Eax = *(const DWORD *)addr;
71 else context->Eax = (context->Eax & 0xffff0000) | *(const WORD *)addr;
72 break;
73 case 1:
74 if (long_op) context->Ecx = *(const DWORD *)addr;
75 else context->Ecx = (context->Ecx & 0xffff0000) | *(const WORD *)addr;
76 break;
77 case 2:
78 if (long_op) context->Edx = *(const DWORD *)addr;
79 else context->Edx = (context->Edx & 0xffff0000) | *(const WORD *)addr;
80 break;
81 case 3:
82 if (long_op) context->Ebx = *(const DWORD *)addr;
83 else context->Ebx = (context->Ebx & 0xffff0000) | *(const WORD *)addr;
84 break;
85 case 4:
86 if (long_op) context->Esp = *(const DWORD *)addr;
87 else context->Esp = (context->Esp & 0xffff0000) | *(const WORD *)addr;
88 break;
89 case 5:
90 if (long_op) context->Ebp = *(const DWORD *)addr;
91 else context->Ebp = (context->Ebp & 0xffff0000) | *(const WORD *)addr;
92 break;
93 case 6:
94 if (long_op) context->Esi = *(const DWORD *)addr;
95 else context->Esi = (context->Esi & 0xffff0000) | *(const WORD *)addr;
96 break;
97 case 7:
98 if (long_op) context->Edi = *(const DWORD *)addr;
99 else context->Edi = (context->Edi & 0xffff0000) | *(const WORD *)addr;
100 break;
101 }
102 }
103
104 /* store an operand into a byte register */
105 static void store_reg_byte( CONTEXT *context, BYTE regmodrm, const BYTE *addr )
106 {
107 switch((regmodrm >> 3) & 7)
108 {
109 case 0: context->Eax = (context->Eax & 0xffffff00) | *addr; break;
110 case 1: context->Ecx = (context->Ecx & 0xffffff00) | *addr; break;
111 case 2: context->Edx = (context->Edx & 0xffffff00) | *addr; break;
112 case 3: context->Ebx = (context->Ebx & 0xffffff00) | *addr; break;
113 case 4: context->Eax = (context->Eax & 0xffff00ff) | (*addr << 8); break;
114 case 5: context->Ecx = (context->Ecx & 0xffff00ff) | (*addr << 8); break;
115 case 6: context->Edx = (context->Edx & 0xffff00ff) | (*addr << 8); break;
116 case 7: context->Ebx = (context->Ebx & 0xffff00ff) | (*addr << 8); break;
117 }
118 }
119
120 /***********************************************************************
121 * INSTR_GetOperandAddr
122 *
123 * Return the address of an instruction operand (from the mod/rm byte).
124 */
125 static BYTE *INSTR_GetOperandAddr( CONTEXT *context, BYTE *instr,
126 int long_addr, int segprefix, int *len )
127 {
128 int mod, rm, base = 0, index = 0, ss = 0, off;
129
130 #define GET_VAL(val,type) \
131 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
132
133 *len = 0;
134 GET_VAL( &mod, BYTE );
135 rm = mod & 7;
136 mod >>= 6;
137
138 if (mod == 3)
139 {
140 switch(rm)
141 {
142 case 0: return (BYTE *)&context->Eax;
143 case 1: return (BYTE *)&context->Ecx;
144 case 2: return (BYTE *)&context->Edx;
145 case 3: return (BYTE *)&context->Ebx;
146 case 4: return (BYTE *)&context->Esp;
147 case 5: return (BYTE *)&context->Ebp;
148 case 6: return (BYTE *)&context->Esi;
149 case 7: return (BYTE *)&context->Edi;
150 }
151 }
152
153 if (long_addr)
154 {
155 if (rm == 4)
156 {
157 BYTE sib;
158 GET_VAL( &sib, BYTE );
159 rm = sib & 7;
160 ss = sib >> 6;
161 switch((sib >> 3) & 7)
162 {
163 case 0: index = context->Eax; break;
164 case 1: index = context->Ecx; break;
165 case 2: index = context->Edx; break;
166 case 3: index = context->Ebx; break;
167 case 4: index = 0; break;
168 case 5: index = context->Ebp; break;
169 case 6: index = context->Esi; break;
170 case 7: index = context->Edi; break;
171 }
172 }
173
174 switch(rm)
175 {
176 case 0: base = context->Eax; break;
177 case 1: base = context->Ecx; break;
178 case 2: base = context->Edx; break;
179 case 3: base = context->Ebx; break;
180 case 4: base = context->Esp; break;
181 case 5: base = context->Ebp; break;
182 case 6: base = context->Esi; break;
183 case 7: base = context->Edi; break;
184 }
185 switch (mod)
186 {
187 case 0:
188 if (rm == 5) /* special case: ds:(disp32) */
189 {
190 GET_VAL( &base, DWORD );
191 }
192 break;
193
194 case 1: /* 8-bit disp */
195 GET_VAL( &off, BYTE );
196 base += (signed char)off;
197 break;
198
199 case 2: /* 32-bit disp */
200 GET_VAL( &off, DWORD );
201 base += (signed long)off;
202 break;
203 }
204 }
205 else /* short address */
206 {
207 switch(rm)
208 {
209 case 0: /* ds:(bx,si) */
210 base = LOWORD(context->Ebx) + LOWORD(context->Esi);
211 break;
212 case 1: /* ds:(bx,di) */
213 base = LOWORD(context->Ebx) + LOWORD(context->Edi);
214 break;
215 case 2: /* ss:(bp,si) */
216 base = LOWORD(context->Ebp) + LOWORD(context->Esi);
217 break;
218 case 3: /* ss:(bp,di) */
219 base = LOWORD(context->Ebp) + LOWORD(context->Edi);
220 break;
221 case 4: /* ds:(si) */
222 base = LOWORD(context->Esi);
223 break;
224 case 5: /* ds:(di) */
225 base = LOWORD(context->Edi);
226 break;
227 case 6: /* ss:(bp) */
228 base = LOWORD(context->Ebp);
229 break;
230 case 7: /* ds:(bx) */
231 base = LOWORD(context->Ebx);
232 break;
233 }
234
235 switch(mod)
236 {
237 case 0:
238 if (rm == 6) /* special case: ds:(disp16) */
239 {
240 GET_VAL( &base, WORD );
241 }
242 break;
243
244 case 1: /* 8-bit disp */
245 GET_VAL( &off, BYTE );
246 base += (signed char)off;
247 break;
248
249 case 2: /* 16-bit disp */
250 GET_VAL( &off, WORD );
251 base += (signed short)off;
252 break;
253 }
254 base &= 0xffff;
255 }
256 /* FIXME: we assume that all segments have a base of 0 */
257 return (BYTE *)(base + (index << ss));
258 #undef GET_VAL
259 }
260
261
262 /***********************************************************************
263 * emulate_instruction
264 *
265 * Emulate a privileged instruction.
266 * Returns exception continuation status.
267 */
268 static DWORD emulate_instruction( EXCEPTION_RECORD *rec, CONTEXT *context )
269 {
270 int prefix, segprefix, prefixlen, len, long_op, long_addr;
271 BYTE *instr;
272
273 long_op = long_addr = 1;
274 instr = (BYTE *)context->Eip;
275 if (!instr) return ExceptionContinueSearch;
276
277 /* First handle any possible prefix */
278
279 segprefix = -1; /* no prefix */
280 prefix = 1;
281 prefixlen = 0;
282 while(prefix)
283 {
284 switch(*instr)
285 {
286 case 0x2e:
287 segprefix = context->SegCs;
288 break;
289 case 0x36:
290 segprefix = context->SegSs;
291 break;
292 case 0x3e:
293 segprefix = context->SegDs;
294 break;
295 case 0x26:
296 segprefix = context->SegEs;
297 break;
298 case 0x64:
299 segprefix = context->SegFs;
300 break;
301 case 0x65:
302 segprefix = context->SegGs;
303 break;
304 case 0x66:
305 long_op = !long_op; /* opcode size prefix */
306 break;
307 case 0x67:
308 long_addr = !long_addr; /* addr size prefix */
309 break;
310 case 0xf0: /* lock */
311 break;
312 case 0xf2: /* repne */
313 break;
314 case 0xf3: /* repe */
315 break;
316 default:
317 prefix = 0; /* no more prefixes */
318 break;
319 }
320 if (prefix)
321 {
322 instr++;
323 prefixlen++;
324 }
325 }
326
327 /* Now look at the actual instruction */
328
329 switch(*instr)
330 {
331 case 0x0f: /* extended instruction */
332 switch(instr[1])
333 {
334 case 0x22: /* mov eax, crX */
335 switch (instr[2])
336 {
337 case 0xc0:
338 TRACE("mov eax,cr0 at 0x%08x, EAX=0x%08x\n", context->Eip,context->Eax );
339 context->Eip += prefixlen+3;
340 return ExceptionContinueExecution;
341 case 0xe0:
342 TRACE("mov eax,cr4 at 0x%08x, EAX=0x%08x\n", context->Eip,context->Eax );
343 context->Eip += prefixlen+3;
344 return ExceptionContinueExecution;
345 default:
346 break; /*fallthrough to bad instruction handling */
347 }
348 ERR("Unsupported EAX -> CR register, eip+2 is %02x\n", instr[2]);
349 break; /*fallthrough to bad instruction handling */
350 case 0x20: /* mov crX, eax */
351 switch (instr[2])
352 {
353 case 0xe0: /* mov cr4, eax */
354 /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
355 * bit 0: VME Virtual Mode Exception ?
356 * bit 1: PVI Protected mode Virtual Interrupt
357 * bit 2: TSD Timestamp disable
358 * bit 3: DE Debugging extensions
359 * bit 4: PSE Page size extensions
360 * bit 5: PAE Physical address extension
361 * bit 6: MCE Machine check enable
362 * bit 7: PGE Enable global pages
363 * bit 8: PCE Enable performance counters at IPL3
364 */
365 TRACE("mov cr4,eax at 0x%08x\n",context->Eip);
366 context->Eax = 0;
367 context->Eip += prefixlen+3;
368 return ExceptionContinueExecution;
369 case 0xc0: /* mov cr0, eax */
370 TRACE("mov cr0,eax at 0x%08x\n",context->Eip);
371 context->Eax = 0x10; /* FIXME: set more bits ? */
372 context->Eip += prefixlen+3;
373 return ExceptionContinueExecution;
374 default: /* fallthrough to illegal instruction */
375 break;
376 }
377 /* fallthrough to illegal instruction */
378 break;
379 case 0x21: /* mov drX, eax */
380 switch (instr[2])
381 {
382 case 0xc8: /* mov dr1, eax */
383 TRACE("mov dr1,eax at 0x%08x\n",context->Eip);
384 context->Eax = context->Dr1;
385 context->Eip += prefixlen+3;
386 return ExceptionContinueExecution;
387 case 0xf8: /* mov dr7, eax */
388 TRACE("mov dr7,eax at 0x%08x\n",context->Eip);
389 context->Eax = 0x400;
390 context->Eip += prefixlen+3;
391 return ExceptionContinueExecution;
392 }
393 ERR("Unsupported DR register -> EAX, eip+2 is %02x\n", instr[2]);
394 /* fallthrough to illegal instruction */
395 break;
396 case 0x23: /* mov eax drX */
397 switch (instr[2])
398 {
399 case 0xc0: /* mov eax, dr0 */
400 context->Dr0 = context->Eax;
401 context->Eip += prefixlen+3;
402 return ExceptionContinueExecution;
403 case 0xc8: /* mov eax, dr1 */
404 context->Dr1 = context->Eax;
405 context->Eip += prefixlen+3;
406 return ExceptionContinueExecution;
407 case 0xd0: /* mov eax, dr2 */
408 context->Dr2 = context->Eax;
409 context->Eip += prefixlen+3;
410 return ExceptionContinueExecution;
411 case 0xd8: /* mov eax, dr3 */
412 context->Dr3 = context->Eax;
413 context->Eip += prefixlen+3;
414 return ExceptionContinueExecution;
415 case 0xf8: /* mov eax, dr7 */
416 context->Dr7 = context->Eax;
417 context->Eip += prefixlen+3;
418 return ExceptionContinueExecution;
419 }
420 ERR("Unsupported EAX -> DR register, eip+2 is %02x\n", instr[2]);
421 /* fallthrough to illegal instruction */
422 break;
423 }
424 break; /* Unable to emulate it */
425
426 case 0x8a: /* mov Eb, Gb */
427 case 0x8b: /* mov Ev, Gv */
428 {
429 BYTE *data = INSTR_GetOperandAddr(context, instr + 1, long_addr,
430 segprefix, &len);
431 unsigned int data_size = (*instr == 0x8b) ? (long_op ? 4 : 2) : 1;
432 struct idtr idtr = get_idtr();
433 unsigned int offset = data - idtr.base;
434
435 if (offset <= idtr.limit + 1 - data_size)
436 {
437 idt[1].LimitLow = 0x100; /* FIXME */
438 idt[2].LimitLow = 0x11E; /* FIXME */
439 idt[3].LimitLow = 0x500; /* FIXME */
440
441 switch (*instr)
442 {
443 case 0x8a: store_reg_byte( context, instr[1], (BYTE *)idt + offset ); break;
444 case 0x8b: store_reg_word( context, instr[1], (BYTE *)idt + offset, long_op ); break;
445 }
446 context->Eip += prefixlen + len + 1;
447 return ExceptionContinueExecution;
448 }
449 break; /* Unable to emulate it */
450 }
451
452 case 0xfa: /* cli */
453 case 0xfb: /* sti */
454 context->Eip += prefixlen + 1;
455 return ExceptionContinueExecution;
456 }
457 return ExceptionContinueSearch; /* Unable to emulate it */
458 }
459
460
461 /***********************************************************************
462 * vectored_handler
463 *
464 * Vectored exception handler used to emulate protected instructions
465 * from 32-bit code.
466 */
467 LONG CALLBACK vectored_handler( EXCEPTION_POINTERS *ptrs )
468 {
469 EXCEPTION_RECORD *record = ptrs->ExceptionRecord;
470 CONTEXT *context = ptrs->ContextRecord;
471
472 if ((record->ExceptionCode == EXCEPTION_ACCESS_VIOLATION ||
473 record->ExceptionCode == EXCEPTION_PRIV_INSTRUCTION))
474 {
475 if (emulate_instruction( record, context ) == ExceptionContinueExecution)
476 return EXCEPTION_CONTINUE_EXECUTION;
477 }
478 return EXCEPTION_CONTINUE_SEARCH;
479 }
480
481 #elif defined(__x86_64__) /* __i386__ */
482
483 WINE_DEFAULT_DEBUG_CHANNEL(int);
484
485 #define REX_B 1
486 #define REX_X 2
487 #define REX_R 4
488 #define REX_W 8
489
490 #define REGMODRM_MOD( regmodrm, rex ) ((regmodrm) >> 6)
491 #define REGMODRM_REG( regmodrm, rex ) (((regmodrm) >> 3) & 7) | (((rex) & REX_R) ? 8 : 0)
492 #define REGMODRM_RM( regmodrm, rex ) (((regmodrm) & 7) | (((rex) & REX_B) ? 8 : 0))
493
494 #define SIB_SS( sib, rex ) ((sib) >> 6)
495 #define SIB_INDEX( sib, rex ) (((sib) >> 3) & 7) | (((rex) & REX_R) ? 8 : 0)
496 #define SIB_BASE( sib, rex ) (((sib) & 7) | (((rex) & REX_B) ? 8 : 0))
497
498 /* keep in sync with dlls/ntdll/thread.c:thread_init */
499 static const BYTE *wine_user_shared_data = (BYTE *)0x7ffe0000;
500 static const BYTE *user_shared_data = (BYTE *)0xfffff78000000000;
501
502 static inline DWORD64 *get_int_reg( CONTEXT *context, int index )
503 {
504 return &context->Rax + index; /* index should be in range 0 .. 15 */
505 }
506
507 static inline int get_op_size( int long_op, int rex )
508 {
509 if (rex & REX_W)
510 return sizeof(DWORD64);
511 else if (long_op)
512 return sizeof(DWORD);
513 else
514 return sizeof(WORD);
515 }
516
517 /* store an operand into a register */
518 static void store_reg_word( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int long_op, int rex )
519 {
520 int index = REGMODRM_REG( regmodrm, rex );
521 BYTE *reg = (BYTE *)get_int_reg( context, index );
522 memcpy( reg, addr, get_op_size( long_op, rex ) );
523 }
524
525 /* store an operand into a byte register */
526 static void store_reg_byte( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int rex )
527 {
528 int index = REGMODRM_REG( regmodrm, rex );
529 BYTE *reg = (BYTE *)get_int_reg( context, index );
530 if (!rex && index >= 4 && index < 8) reg -= (4 * sizeof(DWORD64) - 1); /* special case: ah, ch, dh, bh */
531 *reg = *addr;
532 }
533
534 /***********************************************************************
535 * INSTR_GetOperandAddr
536 *
537 * Return the address of an instruction operand (from the mod/rm byte).
538 */
539 static BYTE *INSTR_GetOperandAddr( CONTEXT *context, BYTE *instr,
540 int long_addr, int rex, int segprefix, int *len )
541 {
542 int mod, rm, ss = 0, off, have_sib = 0;
543 DWORD64 base = 0, index = 0;
544
545 #define GET_VAL( val, type ) \
546 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
547
548 *len = 0;
549 GET_VAL( &mod, BYTE );
550 rm = REGMODRM_RM( mod, rex );
551 mod = REGMODRM_MOD( mod, rex );
552
553 if (mod == 3)
554 return (BYTE *)get_int_reg( context, rm );
555
556 if ((rm & 7) == 4)
557 {
558 BYTE sib;
559 int id;
560
561 GET_VAL( &sib, BYTE );
562 rm = SIB_BASE( sib, rex );
563 id = SIB_INDEX( sib, rex );
564 ss = SIB_SS( sib, rex );
565
566 index = (id != 4) ? *get_int_reg( context, id ) : 0;
567 if (!long_addr) index &= 0xffffffff;
568 have_sib = 1;
569 }
570
571 base = *get_int_reg( context, rm );
572 if (!long_addr) base &= 0xffffffff;
573
574 switch (mod)
575 {
576 case 0:
577 if (rm == 5) /* special case */
578 {
579 base = have_sib ? 0 : context->Rip;
580 if (!long_addr) base &= 0xffffffff;
581 GET_VAL( &off, DWORD );
582 base += (signed long)off;
583 }
584 break;
585
586 case 1: /* 8-bit disp */
587 GET_VAL( &off, BYTE );
588 base += (signed char)off;
589 break;
590
591 case 2: /* 32-bit disp */
592 GET_VAL( &off, DWORD );
593 base += (signed long)off;
594 break;
595 }
596
597 /* FIXME: we assume that all segments have a base of 0 */
598 return (BYTE *)(base + (index << ss));
599 #undef GET_VAL
600 }
601
602
603 /***********************************************************************
604 * emulate_instruction
605 *
606 * Emulate a privileged instruction.
607 * Returns exception continuation status.
608 */
609 static DWORD emulate_instruction( EXCEPTION_RECORD *rec, CONTEXT *context )
610 {
611 int prefix, segprefix, prefixlen, len, long_op, long_addr, rex;
612 BYTE *instr;
613
614 long_op = long_addr = 1;
615 instr = (BYTE *)context->Rip;
616 if (!instr) return ExceptionContinueSearch;
617
618 /* First handle any possible prefix */
619
620 segprefix = -1; /* no seg prefix */
621 rex = 0; /* no rex prefix */
622 prefix = 1;
623 prefixlen = 0;
624 while(prefix)
625 {
626 switch(*instr)
627 {
628 case 0x2e:
629 segprefix = context->SegCs;
630 break;
631 case 0x36:
632 segprefix = context->SegSs;
633 break;
634 case 0x3e:
635 segprefix = context->SegDs;
636 break;
637 case 0x26:
638 segprefix = context->SegEs;
639 break;
640 case 0x64:
641 segprefix = context->SegFs;
642 break;
643 case 0x65:
644 segprefix = context->SegGs;
645 break;
646 case 0x66:
647 long_op = !long_op; /* opcode size prefix */
648 break;
649 case 0x67:
650 long_addr = !long_addr; /* addr size prefix */
651 break;
652 case 0xf0: /* lock */
653 break;
654 case 0xf2: /* repne */
655 break;
656 case 0xf3: /* repe */
657 break;
658 default:
659 prefix = 0; /* no more prefixes */
660 break;
661 }
662 if (*instr >= 0x40 && *instr < 0x50) /* rex */
663 {
664 rex = *instr;
665 prefix = TRUE;
666 }
667 if (prefix)
668 {
669 instr++;
670 prefixlen++;
671 }
672 }
673
674 /* Now look at the actual instruction */
675
676 switch(*instr)
677 {
678 case 0x0f: /* extended instruction */
679 switch(instr[1])
680 {
681 case 0xb6: /* movzx Eb, Gv */
682 case 0xb7: /* movzx Ew, Gv */
683 {
684 BYTE *data = INSTR_GetOperandAddr( context, instr + 2, long_addr,
685 rex, segprefix, &len );
686 unsigned int data_size = (instr[1] == 0xb7) ? 2 : 1;
687 SIZE_T offset = data - user_shared_data;
688
689 if (offset <= sizeof(KSHARED_USER_DATA) - data_size)
690 {
691 ULONGLONG temp = 0;
692 memcpy( &temp, wine_user_shared_data + offset, data_size );
693 store_reg_word( context, instr[2], (BYTE *)&temp, long_op, rex );
694 context->Rip += prefixlen + len + 2;
695 return ExceptionContinueExecution;
696 }
697 break; /* Unable to emulate it */
698 }
699 }
700 break; /* Unable to emulate it */
701
702 case 0x8a: /* mov Eb, Gb */
703 case 0x8b: /* mov Ev, Gv */
704 {
705 BYTE *data = INSTR_GetOperandAddr( context, instr + 1, long_addr,
706 rex, segprefix, &len );
707 unsigned int data_size = (*instr == 0x8b) ? get_op_size( long_op, rex ) : 1;
708 SIZE_T offset = data - user_shared_data;
709
710 if (offset <= sizeof(KSHARED_USER_DATA) - data_size)
711 {
712 switch (*instr)
713 {
714 case 0x8a: store_reg_byte( context, instr[1], wine_user_shared_data + offset, rex ); break;
715 case 0x8b: store_reg_word( context, instr[1], wine_user_shared_data + offset, long_op, rex ); break;
716 }
717 context->Rip += prefixlen + len + 1;
718 return ExceptionContinueExecution;
719 }
720 break; /* Unable to emulate it */
721 }
722
723 case 0xa0: /* mov Ob, AL */
724 case 0xa1: /* mov Ovqp, rAX */
725 {
726 BYTE *data = (BYTE *)(long_addr ? *(DWORD64 *)(instr + 1) : *(DWORD *)(instr + 1));
727 unsigned int data_size = (*instr == 0xa1) ? get_op_size( long_op, rex ) : 1;
728 SIZE_T offset = data - user_shared_data;
729 len = long_addr ? sizeof(DWORD64) : sizeof(DWORD);
730
731 if (offset <= sizeof(KSHARED_USER_DATA) - data_size)
732 {
733 memcpy( &context->Rax, wine_user_shared_data + offset, data_size );
734 context->Rip += prefixlen + len + 1;
735 return ExceptionContinueExecution;
736 }
737 break; /* Unable to emulate it */
738 }
739 }
740 return ExceptionContinueSearch; /* Unable to emulate it */
741 }
742
743
744 /***********************************************************************
745 * vectored_handler
746 *
747 * Vectored exception handler used to emulate protected instructions
748 * from 64-bit code.
749 */
750 LONG CALLBACK vectored_handler( EXCEPTION_POINTERS *ptrs )
751 {
752 EXCEPTION_RECORD *record = ptrs->ExceptionRecord;
753 CONTEXT *context = ptrs->ContextRecord;
754
755 if (record->ExceptionCode == EXCEPTION_ACCESS_VIOLATION &&
756 record->ExceptionInformation[0] == EXCEPTION_READ_FAULT)
757 {
758 if (emulate_instruction( record, context ) == ExceptionContinueExecution)
759 {
760 TRACE( "next instruction rip=%lx\n", context->Rip );
761 TRACE( " rax=%016lx rbx=%016lx rcx=%016lx rdx=%016lx\n",
762 context->Rax, context->Rbx, context->Rcx, context->Rdx );
763 TRACE( " rsi=%016lx rdi=%016lx rbp=%016lx rsp=%016lx\n",
764 context->Rsi, context->Rdi, context->Rbp, context->Rsp );
765 TRACE( " r8=%016lx r9=%016lx r10=%016lx r11=%016lx\n",
766 context->R8, context->R9, context->R10, context->R11 );
767 TRACE( " r12=%016lx r13=%016lx r14=%016lx r15=%016lx\n",
768 context->R12, context->R13, context->R14, context->R15 );
769
770 return EXCEPTION_CONTINUE_EXECUTION;
771 }
772 }
773 return EXCEPTION_CONTINUE_SEARCH;
774 }
775
776 #endif /* __x86_64__ */
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