programs/winedbg/be_cpu.h

   1 /*
   2  * Debugger CPU backend definitions
   3  *
   4  * Copyright 2004 Eric Pouech
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  19  */
  20
  21 enum be_cpu_addr {be_cpu_addr_pc, be_cpu_addr_stack, be_cpu_addr_frame};
  22 enum be_xpoint_type {be_xpoint_break, be_xpoint_watch_exec, be_xpoint_watch_read,
  23                      be_xpoint_watch_write};
  24 struct backend_cpu
  25 {
  26     const DWORD         machine;
  27     const DWORD         pointer_size;
  28     /* ------------------------------------------------------------------------------
  29      * address manipulation
  30      * ------------------------------------------------------------------------------ */
  31     /* Linearizes an address. Only CPUs with segmented address model need this.
  32      * Otherwise, implementation is straightforward (be_cpu_linearize will do)
  33      */
  34     void*               (*linearize)(HANDLE hThread, const ADDRESS64*);
  35     /* Fills in an ADDRESS64 structure from a segment & an offset. CPUs without
  36      * segment address model should use 0 as seg. Required method to fill
  37      * in an ADDRESS64 (except an linear one).
  38      * Non segmented CPU shall use be_cpu_build_addr
  39      */
  40     BOOL                (*build_addr)(HANDLE hThread, const CONTEXT* ctx,
  41                                       ADDRESS64* addr, unsigned seg,
  42                                       unsigned long offset);
  43     /* Retrieves in addr an address related to the context (program counter, stack
  44      * pointer, frame pointer)
  45      */
  46     BOOL                (*get_addr)(HANDLE hThread, const CONTEXT* ctx,
  47                                     enum be_cpu_addr, ADDRESS64* addr);
  48
  49     /* returns which kind of information a given register number refers to */
  50     BOOL                (*get_register_info)(int regno, enum be_cpu_addr* kind);
  51
  52     /* -------------------------------------------------------------------------------
  53      * context manipulation
  54      * ------------------------------------------------------------------------------- */
  55     /* Enables/disables CPU single step mode (depending on enable) */
  56     void                (*single_step)(CONTEXT* ctx, BOOL enable);
  57     /* Dumps out the content of the context */
  58     void                (*print_context)(HANDLE hThread, const CONTEXT* ctx, int all_regs);
  59     /* Prints information about segments. Non segmented CPU should leave this
  60      * function empty
  61      */
  62     void                (*print_segment_info)(HANDLE hThread, const CONTEXT* ctx);
  63     /* all the CONTEXT's relative variables, bound to this CPU */
  64     const struct dbg_internal_var* context_vars;
  65
  66     /* -------------------------------------------------------------------------------
  67      * code inspection
  68      * -------------------------------------------------------------------------------*/
  69     /* Check whether the instruction at addr is an insn to step over
  70      * (like function call, interruption...)
  71      */
  72     BOOL                (*is_step_over_insn)(const void* addr);
  73     /* Check whether instruction at 'addr' is the return from a function call */
  74     BOOL                (*is_function_return)(const void* addr);
  75     /* Check whether instruction at 'addr' is the CPU break instruction. On i386,
  76      * it's INT3 (0xCC)
  77      */
  78     BOOL                (*is_break_insn)(const void*);
  79     /* Check whether instruction at 'addr' is a function call */
  80     BOOL                (*is_function_call)(const void* insn, ADDRESS64* callee);
  81     /* Check whether instruction at 'addr' is a jump */
  82     BOOL                (*is_jump)(const void* insn, ADDRESS64* jumpee);
  83     /* Ask for disassembling one instruction. If display is true, assembly code
  84      * will be printed. In all cases, 'addr' is advanced at next instruction
  85      */
  86     void                (*disasm_one_insn)(ADDRESS64* addr, int display);
  87     /* -------------------------------------------------------------------------------
  88      * break points / watchpoints handling
  89      * -------------------------------------------------------------------------------*/
  90     /* Inserts an Xpoint in the CPU context and/or debuggee address space */
  91     BOOL                (*insert_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
  92                                          CONTEXT* ctx, enum be_xpoint_type type,
  93                                          void* addr, unsigned long* val, unsigned size);
  94     /* Removes an Xpoint in the CPU context and/or debuggee address space */
  95     BOOL                (*remove_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
  96                                          CONTEXT* ctx, enum be_xpoint_type type,
  97                                          void* addr, unsigned long val, unsigned size);
  98     /* Checks whether a given watchpoint has been triggered */
  99     BOOL                (*is_watchpoint_set)(const CONTEXT* ctx, unsigned idx);
 100     /* Clears the watchpoint indicator */
 101     void                (*clear_watchpoint)(CONTEXT* ctx, unsigned idx);
 102     /* After a break instruction is executed, in the corresponding exception handler,
 103      * some CPUs report the address of the insn after the break insn, some others
 104      * report the address of the break insn itself.
 105      * This function lets adjust the context PC to reflect this behavior.
 106      */
 107     int                 (*adjust_pc_for_break)(CONTEXT* ctx, BOOL way);
 108     /* -------------------------------------------------------------------------------
 109      * basic type read/write
 110      * -------------------------------------------------------------------------------*/
 111     /* Reads an integer from memory and stores it inside a long long int */
 112     BOOL                (*fetch_integer)(const struct dbg_lvalue* lvalue, unsigned size, BOOL is_signed, LONGLONG*);
 113     /* Reads a real from memory and stores it inside a long double */
 114     BOOL                (*fetch_float)(const struct dbg_lvalue* lvalue, unsigned size, long double*);
 115     /* Writes an integer to memory */
 116     BOOL                (*store_integer)(const struct dbg_lvalue* lvalue, unsigned size, BOOL is_signed, LONGLONG);
 117 };
 118
 119 extern struct backend_cpu*      be_cpu;
 120
 121 /* some handy functions for non segmented CPUs */
 122 void*    be_cpu_linearize(HANDLE hThread, const ADDRESS64*);
 123 BOOL be_cpu_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
 124                        unsigned seg, unsigned long offset);