dlls/kernel/cpu.c

   1 /*
   2  * What processor?
   3  *
   4  * Copyright 1995,1997 Morten Welinder
   5  * Copyright 1997-1998 Marcus Meissner
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include "config.h"
  23 #include "wine/port.h"
  24
  25 #ifdef HAVE_SYS_PARAM_H
  26 # include <sys/param.h>
  27 #endif
  28 #ifdef HAVE_SYS_SYSCTL_H
  29 # include <sys/sysctl.h>
  30 #endif
  31 #ifdef HAVE_MACHINE_CPU_H
  32 # include <machine/cpu.h>
  33 #endif
  34 #ifdef HAVE_MACH_MACHINE_H
  35 # include <mach/machine.h>
  36 #endif
  37
  38 #include <ctype.h>
  39 #include <string.h>
  40 #include <stdarg.h>
  41 #include <stdio.h>
  42 #include <stdlib.h>
  43 #ifdef HAVE_SYS_TIME_H
  44 # include <sys/time.h>
  45 #endif
  46
  47
  48 #define NONAMELESSUNION
  49 #define NONAMELESSSTRUCT
  50 #include "windef.h"
  51 #include "winbase.h"
  52 #include "winnt.h"
  53 #include "winternl.h"
  54 #include "winerror.h"
  55 #include "wine/unicode.h"
  56 #include "wine/debug.h"
  57
  58 WINE_DEFAULT_DEBUG_CHANNEL(reg);
  59
  60 #define AUTH    0x68747541      /* "Auth" */
  61 #define ENTI    0x69746e65      /* "enti" */
  62 #define CAMD    0x444d4163      /* "cAMD" */
  63
  64 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
  65  * We are compiled with -fPIC, so we can't clobber ebx.
  66  */
  67 static inline void do_cpuid(int ax, int *p)
  68 {
  69 #ifdef __i386__
  70         __asm__("pushl %%ebx\n\t"
  71                 "cpuid\n\t"
  72                 "movl %%ebx, %%esi\n\t"
  73                 "popl %%ebx"
  74                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
  75                 :  "0" (ax));
  76 #endif
  77 }
  78
  79 /* From xf86info havecpuid.c 1.11 */
  80 static inline int have_cpuid(void)
  81 {
  82 #ifdef __i386__
  83         unsigned int f1, f2;
  84         __asm__("pushfl\n\t"
  85                 "pushfl\n\t"
  86                 "popl %0\n\t"
  87                 "movl %0,%1\n\t"
  88                 "xorl %2,%0\n\t"
  89                 "pushl %0\n\t"
  90                 "popfl\n\t"
  91                 "pushfl\n\t"
  92                 "popl %0\n\t"
  93                 "popfl"
  94                 : "=&r" (f1), "=&r" (f2)
  95                 : "ir" (0x00200000));
  96         return ((f1^f2) & 0x00200000) != 0;
  97 #else
  98         return 0;
  99 #endif
 100 }
 101
 102 static BYTE PF[64] = {0,};
 103 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
 104
 105 static void create_registry_keys( const SYSTEM_INFO *info )
 106 {
 107     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
 108                                     'H','a','r','d','w','a','r','e','\\',
 109                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
 110                                     'S','y','s','t','e','m',0};
 111     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
 112     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
 113     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
 114     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
 115     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
 116     static const WCHAR VendorIdentifierW[] = {'V','e','n','d','o','r','I','d','e','n','t','i','f','i','e','r',0};
 117     static const WCHAR VenidIntelW[] = {'G','e','n','u','i','n','e','I','n','t','e','l',0};
 118     /* static const WCHAR VenidAMDW[] = {'A','u','t','h','e','n','t','i','c','A','M','D',0}; */
 119
 120     unsigned int i;
 121     HANDLE hkey, system_key, cpu_key;
 122     OBJECT_ATTRIBUTES attr;
 123     UNICODE_STRING nameW, valueW;
 124
 125     attr.Length = sizeof(attr);
 126     attr.RootDirectory = 0;
 127     attr.ObjectName = &nameW;
 128     attr.Attributes = 0;
 129     attr.SecurityDescriptor = NULL;
 130     attr.SecurityQualityOfService = NULL;
 131
 132     RtlInitUnicodeString( &nameW, SystemW );
 133     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 134
 135     RtlInitUnicodeString( &valueW, IdentifierW );
 136     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
 137
 138     attr.RootDirectory = system_key;
 139     RtlInitUnicodeString( &nameW, fpuW );
 140     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
 141
 142     RtlInitUnicodeString( &nameW, cpuW );
 143     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 144     {
 145         for (i = 0; i < info->dwNumberOfProcessors; i++)
 146         {
 147             char num[10], id[60];
 148
 149             attr.RootDirectory = cpu_key;
 150             sprintf( num, "%d", i );
 151             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
 152             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 153             {
 154                 WCHAR idW[60];
 155                 DWORD cpuMHz = cpuHz / 1000000;
 156
 157                 /*TODO: report 64bit processors properly*/
 158                 RtlInitUnicodeString( &valueW, IdentifierW );
 159                 sprintf( id, "x86 Family %d Model %d Stepping %d",
 160                          info->wProcessorLevel /*model and family are messed up*/, info->wProcessorLevel, info->wProcessorRevision);
 161
 162                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 163                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 164
 165                 /*TODO; report amd's properly*/
 166                 RtlInitUnicodeString( &valueW, VendorIdentifierW );
 167                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, VenidIntelW, (strlenW(VenidIntelW)+1) * sizeof(WCHAR) );
 168
 169                 RtlInitUnicodeString( &valueW, mhzKeyW );
 170                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
 171                 NtClose( hkey );
 172             }
 173             RtlFreeUnicodeString( &nameW );
 174         }
 175         NtClose( cpu_key );
 176     }
 177     NtClose( system_key );
 178 }
 179
 180 /****************************************************************************
 181  *              QueryPerformanceCounter (KERNEL32.@)
 182  *
 183  * Get the current value of the performance counter.
 184  *
 185  * PARAMS
 186  *  counter [O] Destination for the current counter reading
 187  *
 188  * RETURNS
 189  *  Success: TRUE. counter contains the current reading
 190  *  Failure: FALSE.
 191  *
 192  * SEE ALSO
 193  *  See QueryPerformanceFrequency.
 194  */
 195 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
 196 {
 197     NtQueryPerformanceCounter( counter, NULL );
 198     return TRUE;
 199 }
 200
 201
 202 /****************************************************************************
 203  *              QueryPerformanceFrequency (KERNEL32.@)
 204  *
 205  * Get the resolution of the performace counter.
 206  *
 207  * PARAMS
 208  *  frequency [O] Destination for the counter resolution
 209  *
 210  * RETURNS
 211  *  Success. TRUE. Frequency contains the resolution of the counter.
 212  *  Failure: FALSE.
 213  *
 214  * SEE ALSO
 215  *  See QueryPerformanceCounter.
 216  */
 217 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
 218 {
 219     LARGE_INTEGER counter;
 220     NtQueryPerformanceCounter( &counter, frequency );
 221     return TRUE;
 222 }
 223
 224
 225 /***********************************************************************
 226  *                      GetSystemInfo                   [KERNEL32.@]
 227  *
 228  * Get information about the system.
 229  *
 230  * RETURNS
 231  *  Nothing.
 232  *
 233  * NOTES
 234  * On the first call it creates cached values, so it doesn't have to determine
 235  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
 236  *
 237  * It creates a registry subhierarchy, looking like:
 238  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
 239  * Note that there is a hierarchy for every processor installed, so this
 240  * supports multiprocessor systems. This is done like Win95 does it, I think.
 241  *
 242  * It also creates a cached flag array for IsProcessorFeaturePresent().
 243  */
 244 VOID WINAPI GetSystemInfo(
 245         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
 246 {
 247         static int cache = 0;
 248         static SYSTEM_INFO cachedsi;
 249
 250         TRACE("si=0x%p\n", si);
 251         if (cache) {
 252                 memcpy(si,&cachedsi,sizeof(*si));
 253                 return;
 254         }
 255         memset(PF,0,sizeof(PF));
 256
 257         /* choose sensible defaults ...
 258          * FIXME: perhaps overrideable with precompiler flags?
 259          */
 260         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
 261         cachedsi.dwPageSize                     = getpagesize();
 262
 263         /* FIXME: the two entries below should be computed somehow... */
 264         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
 265         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
 266         cachedsi.dwActiveProcessorMask          = 1;
 267         cachedsi.dwNumberOfProcessors           = 1;
 268         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
 269         cachedsi.dwAllocationGranularity        = 0x10000;
 270         cachedsi.wProcessorLevel                = 5; /* 586 */
 271         cachedsi.wProcessorRevision             = 0;
 272
 273         cache = 1; /* even if there is no more info, we now have a cacheentry */
 274         memcpy(si,&cachedsi,sizeof(*si));
 275
 276         /* Hmm, reasonable processor feature defaults? */
 277
 278 #ifdef linux
 279         {
 280         char line[200];
 281         FILE *f = fopen ("/proc/cpuinfo", "r");
 282
 283         if (!f)
 284                 return;
 285         while (fgets(line,200,f)!=NULL) {
 286                 char    *s,*value;
 287
 288                 /* NOTE: the ':' is the only character we can rely on */
 289                 if (!(value = strchr(line,':')))
 290                         continue;
 291
 292                 /* terminate the valuename */
 293                 s = value - 1;
 294                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
 295                 *(s + 1) = '\0';
 296
 297                 /* and strip leading spaces from value */
 298                 value += 1;
 299                 while (*value==' ') value++;
 300                 if ((s=strchr(value,'\n')))
 301                         *s='\0';
 302
 303                 /* 2.1 method */
 304                 if (!strcasecmp(line, "cpu family")) {
 305                         if (isdigit (value[0])) {
 306                                 switch (value[0] - '0') {
 307                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 308                                         cachedsi.wProcessorLevel= 3;
 309                                         break;
 310                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 311                                         cachedsi.wProcessorLevel= 4;
 312                                         break;
 313                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 314                                         cachedsi.wProcessorLevel= 5;
 315                                         break;
 316                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 317                                         cachedsi.wProcessorLevel= 6;
 318                                         break;
 319                                 case 1: /* two-figure levels */
 320                                     if (value[1] == '5')
 321                                     {
 322                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 323                                         cachedsi.wProcessorLevel= 6;
 324                                         break;
 325                                     }
 326                                     /* fall through */
 327                                 default:
 328                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
 329                                         break;
 330                                 }
 331                         }
 332                         continue;
 333                 }
 334                 /* old 2.0 method */
 335                 if (!strcasecmp(line, "cpu")) {
 336                         if (    isdigit (value[0]) && value[1] == '8' &&
 337                                 value[2] == '6' && value[3] == 0
 338                         ) {
 339                                 switch (value[0] - '0') {
 340                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 341                                         cachedsi.wProcessorLevel= 3;
 342                                         break;
 343                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 344                                         cachedsi.wProcessorLevel= 4;
 345                                         break;
 346                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 347                                         cachedsi.wProcessorLevel= 5;
 348                                         break;
 349                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 350                                         cachedsi.wProcessorLevel= 6;
 351                                         break;
 352                                 default:
 353                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
 354                                         break;
 355                                 }
 356                         }
 357                         continue;
 358                 }
 359                 if (!strcasecmp(line,"fdiv_bug")) {
 360                         if (!strncasecmp(value,"yes",3))
 361                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
 362
 363                         continue;
 364                 }
 365                 if (!strcasecmp(line,"fpu")) {
 366                         if (!strncasecmp(value,"no",2))
 367                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 368
 369                         continue;
 370                 }
 371                 if (!strcasecmp(line,"processor")) {
 372                         /* processor number counts up... */
 373                         unsigned int x;
 374
 375                         if (sscanf(value,"%d",&x))
 376                                 if (x+1>cachedsi.dwNumberOfProcessors)
 377                                         cachedsi.dwNumberOfProcessors=x+1;
 378
 379                         continue;
 380                 }
 381                 if (!strcasecmp(line,"stepping")) {
 382                         int     x;
 383
 384                         if (sscanf(value,"%d",&x))
 385                                 cachedsi.wProcessorRevision = x;
 386
 387                         continue;
 388                 }
 389                 if (!strcasecmp(line, "cpu MHz")) {
 390                         double cmz;
 391                         if (sscanf( value, "%lf", &cmz ) == 1) {
 392                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
 393                                 cpuHz = cmz * 1000 * 1000;
 394                                 TRACE("CPU speed read as %lld\n", cpuHz);
 395                         }
 396                         continue;
 397                 }
 398                 if (    !strcasecmp(line,"flags")       ||
 399                         !strcasecmp(line,"features")
 400                 ) {
 401                         if (strstr(value,"cx8"))
 402                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 403                         if (strstr(value,"mmx"))
 404                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 405                         if (strstr(value,"tsc"))
 406                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 407                         if (strstr(value,"3dnow"))
 408                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 409                         /* This will also catch sse2, but we have sse itself
 410                          * if we have sse2, so no problem */
 411                         if (strstr(value,"sse"))
 412                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 413                         if (strstr(value,"sse2"))
 414                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 415                         if (strstr(value,"pae"))
 416                                 PF[PF_PAE_ENABLED] = TRUE;
 417
 418                         continue;
 419                 }
 420         }
 421         fclose (f);
 422         }
 423         memcpy(si,&cachedsi,sizeof(*si));
 424 #elif defined (__NetBSD__)
 425         {
 426              int mib[2];
 427              int value[2];
 428              char model[256];
 429              char *cpuclass;
 430              FILE *f = fopen ("/var/run/dmesg.boot", "r");
 431
 432              /* first deduce as much as possible from the sysctls */
 433              mib[0] = CTL_MACHDEP;
 434 #ifdef CPU_FPU_PRESENT
 435              mib[1] = CPU_FPU_PRESENT;
 436              value[1] = sizeof(int);
 437              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 438                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 439                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 440 #endif
 441 #ifdef CPU_SSE
 442              mib[1] = CPU_SSE;   /* this should imply MMX */
 443              value[1] = sizeof(int);
 444              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 445                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 446 #endif
 447 #ifdef CPU_SSE2
 448              mib[1] = CPU_SSE2;  /* this should imply MMX */
 449              value[1] = sizeof(int);
 450              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 451                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 452 #endif
 453              mib[0] = CTL_HW;
 454              mib[1] = HW_NCPU;
 455              value[1] = sizeof(int);
 456              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 457                  if (value[0] > cachedsi.dwNumberOfProcessors)
 458                     cachedsi.dwNumberOfProcessors = value[0];
 459              mib[1] = HW_MODEL;
 460              value[1] = 255;
 461              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
 462                   model[value[1]] = '\0'; /* just in case */
 463                   cpuclass = strstr(model, "-class");
 464                   if (cpuclass != NULL) {
 465                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
 466                        if (!strncmp(cpuclass+1, "386", 3)) {
 467                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 468                             cachedsi.wProcessorLevel= 3;
 469                        }
 470                        if (!strncmp(cpuclass+1, "486", 3)) {
 471                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 472                             cachedsi.wProcessorLevel= 4;
 473                        }
 474                        if (!strncmp(cpuclass+1, "586", 3)) {
 475                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 476                             cachedsi.wProcessorLevel= 5;
 477                        }
 478                        if (!strncmp(cpuclass+1, "686", 3)) {
 479                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 480                             cachedsi.wProcessorLevel= 6;
 481                             /* this should imply MMX */
 482                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 483                        }
 484                   }
 485              }
 486
 487              /* it may be worth reading from /var/run/dmesg.boot for
 488                 additional information such as CX8, MMX and TSC
 489                 (however this information should be considered less
 490                  reliable than that from the sysctl calls) */
 491              if (f != NULL)
 492              {
 493                  while (fgets(model, 255, f) != NULL) {
 494                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
 495                             /* we could scan the string but it is easier
 496                                to test the bits directly */
 497                             if (value[1] & 0x1)
 498                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 499                             if (value[1] & 0x10)
 500                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 501                             if (value[1] & 0x100)
 502                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 503                             if (value[1] & 0x800000)
 504                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 505
 506                             break;
 507                         }
 508                  }
 509                  fclose(f);
 510              }
 511
 512         }
 513         memcpy(si,&cachedsi,sizeof(*si));
 514 #elif defined(__FreeBSD__)
 515         {
 516         unsigned int regs[4], regs2[4];
 517         int ret, len, num;
 518         if (!have_cpuid())
 519                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
 520         else
 521                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
 522         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
 523                 do_cpuid(0x00000001, regs2);    /* get cpu features */
 524                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
 525                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 526                         cachedsi.wProcessorLevel = 3;
 527                         break;
 528                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 529                         cachedsi.wProcessorLevel = 4;
 530                         break;
 531                 case 5:
 532                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 533                         cachedsi.wProcessorLevel = 5;
 534                         break;
 535                 case 6:
 536                 case 15: /* PPro/2/3/4 has same info as P1 */
 537                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 538                         cachedsi.wProcessorLevel = 6;
 539                         break;
 540                 default:
 541                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
 542                                 (regs2[0] >> 8)&0xf);
 543                         break;
 544                 }
 545                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
 546                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
 547                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
 548                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
 549                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
 550                 /*len = sizeof(num);
 551                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
 552                 if (!ret)
 553                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
 554
 555                 if (regs[1] == AUTH &&
 556                     regs[3] == ENTI &&
 557                     regs[2] == CAMD) {
 558                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
 559                         if (regs[0]>=0x80000001) {
 560                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
 561                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] =
 562                                     (regs2[3] & (1 << 31 )) >> 31;
 563                         }
 564                 }
 565         }
 566         len = sizeof(num);
 567         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
 568         if (!ret)
 569                 cachedsi.dwNumberOfProcessors = num;
 570         }
 571         memcpy(si,&cachedsi,sizeof(*si));
 572 #elif defined (__APPLE__)
 573         {
 574         size_t valSize;
 575         unsigned long long longVal;
 576         int value;
 577         int cputype;
 578
 579         valSize = sizeof(int);
 580         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
 581         {
 582             if (value)
 583                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 584             else
 585                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 586         }
 587         valSize = sizeof(int);
 588         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
 589         cachedsi.dwNumberOfProcessors = value;
 590
 591         valSize = sizeof(int);
 592         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
 593             cachedsi.dwActiveProcessorMask = value;
 594
 595         valSize = sizeof(int);
 596         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
 597         {
 598             valSize = sizeof(int);
 599             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
 600             {
 601                 switch (cputype)
 602                 {
 603                     case CPU_TYPE_POWERPC:
 604                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
 605                         switch (value)
 606                         {
 607                             case CPU_SUBTYPE_POWERPC_601:
 608                             case CPU_SUBTYPE_POWERPC_602:
 609                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
 610                                 cachedsi.wProcessorLevel = 1;
 611                                 break;
 612                             case CPU_SUBTYPE_POWERPC_603:
 613                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 614                                 cachedsi.wProcessorLevel = 3;
 615                                 break;
 616                             case CPU_SUBTYPE_POWERPC_603e:
 617                             case CPU_SUBTYPE_POWERPC_603ev:
 618                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 619                                 cachedsi.wProcessorLevel = 6;
 620                                 break;
 621                             case CPU_SUBTYPE_POWERPC_604:
 622                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 623                                 cachedsi.wProcessorLevel = 4;
 624                                 break;
 625                             case CPU_SUBTYPE_POWERPC_604e:
 626                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 627                                 cachedsi.wProcessorLevel = 9;
 628                                 break;
 629                             case CPU_SUBTYPE_POWERPC_620:
 630                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
 631                                 cachedsi.wProcessorLevel = 20;
 632                                 break;
 633                             case CPU_SUBTYPE_POWERPC_750:
 634                             case CPU_SUBTYPE_POWERPC_7400:
 635                             case CPU_SUBTYPE_POWERPC_7450:
 636                                 /* G3/G4 derivate from 603 so ... */
 637                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 638                                 cachedsi.wProcessorLevel = 6;
 639                                 break;
 640                             case CPU_SUBTYPE_POWERPC_970:
 641                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 642                                 cachedsi.wProcessorLevel = 9;
 643                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
 644                                 break;
 645                             default: break;
 646                         }
 647                         break; /* CPU_TYPE_POWERPC */
 648                     case CPU_TYPE_I386:
 649                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
 650                         switch (value)
 651                         {
 652                             case CPU_SUBTYPE_386:
 653                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 654                                 cachedsi.wProcessorLevel = 3;
 655                                 break;
 656                             case CPU_SUBTYPE_486:
 657                             case CPU_SUBTYPE_486SX:
 658                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 659                                 cachedsi.wProcessorLevel = 4;
 660                                 break;
 661                             case CPU_SUBTYPE_586:
 662                             case CPU_SUBTYPE_PENTPRO:
 663                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 664                                 cachedsi.wProcessorLevel = 5;
 665                                 break;
 666                             case CPU_SUBTYPE_PENTII_M3:
 667                             case CPU_SUBTYPE_PENTII_M5:
 668                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 669                                 cachedsi.wProcessorLevel = 5;
 670                                 /* this should imply MMX */
 671                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 672                                 break;
 673                             default: break;
 674                         }
 675                         break; /* CPU_TYPE_I386 */
 676                     default: break;
 677                 } /* switch (cputype) */
 678             }
 679         }
 680         valSize = sizeof(longVal);
 681         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
 682             cpuHz = longVal;
 683         }
 684         memcpy(si,&cachedsi,sizeof(*si));
 685 #else
 686         FIXME("not yet supported on this system\n");
 687 #endif
 688         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
 689               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
 690               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
 691               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
 692               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
 693               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
 694
 695         create_registry_keys( &cachedsi );
 696 }
 697
 698
 699 /***********************************************************************
 700  *                      IsProcessorFeaturePresent       [KERNEL32.@]
 701  *
 702  * Determine if the cpu supports a given feature.
 703  *
 704  * RETURNS
 705  *  TRUE, If the processor supports feature,
 706  *  FALSE otherwise.
 707  */
 708 BOOL WINAPI IsProcessorFeaturePresent (
 709         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */)
 710 {
 711   SYSTEM_INFO si;
 712   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
 713
 714   if (feature < 64)
 715     return PF[feature];
 716   else
 717     return FALSE;
 718 }