Added an extern "C" safeguard.
[wine/multimedia.git] / miscemu / instr.c
blob3ace37d025529ac260eab0e87bc777d8a8be84a1
1 /*
2 * Emulation of priviledged instructions
4 * Copyright 1995 Alexandre Julliard
5 */
7 #include "windows.h"
8 #include "ldt.h"
9 #include "global.h"
10 #include "module.h"
11 #include "dosexe.h"
12 #include "miscemu.h"
13 #include "sig_context.h"
14 #include "debug.h"
17 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
18 #define IS_SEL_32(context,seg) \
19 (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
21 #define STACK_sig(context) \
22 (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : SP_sig(context))
24 #define MAKE_PTR(seg,off) \
25 (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
27 #define MK_PTR(context,seg,off) \
28 (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
29 : MAKE_PTR(seg,off))
31 #define STACK_PTR(context) \
32 (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
33 (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
34 (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
37 /***********************************************************************
38 * INSTR_ReplaceSelector
40 * Try to replace an invalid selector by a valid one.
41 * The only selector where it is allowed to do "mov ax,40;mov es,ax"
42 * is the so called 'bimodal' selector 0x40, which points to the BIOS
43 * data segment. Used by (at least) Borland products (and programs compiled
44 * using Borland products).
46 * See Undocumented Windows, Chapter 5, __0040.
48 static WORD INSTR_ReplaceSelector( SIGCONTEXT *context, WORD sel)
50 if (sel == 0x40)
52 static WORD sys_timer = 0;
53 if (!sys_timer)
54 sys_timer = CreateSystemTimer( 55, (FARPROC16)DOSMEM_Tick );
55 return DOSMEM_BiosSeg;
57 return 0; /* Can't replace selector, crashdump */
61 /***********************************************************************
62 * INSTR_GetOperandAddr
64 * Return the address of an instruction operand (from the mod/rm byte).
66 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
67 int long_addr, int segprefix, int *len )
69 int mod, rm, base, index = 0, ss = 0, seg = 0, off;
71 #define GET_VAL(val,type) \
72 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
74 *len = 0;
75 GET_VAL( &mod, BYTE );
76 rm = mod & 7;
77 mod >>= 6;
79 if (mod == 3)
81 switch(rm)
83 case 0: return (BYTE *)&EAX_sig(context);
84 case 1: return (BYTE *)&ECX_sig(context);
85 case 2: return (BYTE *)&EDX_sig(context);
86 case 3: return (BYTE *)&EBX_sig(context);
87 case 4: return (BYTE *)&ESP_sig(context);
88 case 5: return (BYTE *)&EBP_sig(context);
89 case 6: return (BYTE *)&ESI_sig(context);
90 case 7: return (BYTE *)&EDI_sig(context);
94 if (long_addr)
96 if (rm == 4)
98 BYTE sib;
99 GET_VAL( &sib, BYTE );
100 rm = sib & 7;
101 ss = sib >> 6;
102 switch(sib >> 3)
104 case 0: index = EAX_sig(context); break;
105 case 1: index = ECX_sig(context); break;
106 case 2: index = EDX_sig(context); break;
107 case 3: index = EBX_sig(context); break;
108 case 4: index = 0; break;
109 case 5: index = EBP_sig(context); break;
110 case 6: index = ESI_sig(context); break;
111 case 7: index = EDI_sig(context); break;
115 switch(rm)
117 case 0: base = EAX_sig(context); seg = DS_sig(context); break;
118 case 1: base = ECX_sig(context); seg = DS_sig(context); break;
119 case 2: base = EDX_sig(context); seg = DS_sig(context); break;
120 case 3: base = EBX_sig(context); seg = DS_sig(context); break;
121 case 4: base = ESP_sig(context); seg = SS_sig(context); break;
122 case 5: base = EBP_sig(context); seg = SS_sig(context); break;
123 case 6: base = ESI_sig(context); seg = DS_sig(context); break;
124 case 7: base = EDI_sig(context); seg = DS_sig(context); break;
126 switch (mod)
128 case 0:
129 if (rm == 5) /* special case: ds:(disp32) */
131 GET_VAL( &base, DWORD );
132 seg = DS_sig(context);
134 break;
136 case 1: /* 8-bit disp */
137 GET_VAL( &off, BYTE );
138 base += (signed char)off;
139 break;
141 case 2: /* 32-bit disp */
142 GET_VAL( &off, DWORD );
143 base += (signed long)off;
144 break;
147 else /* short address */
149 switch(rm)
151 case 0: /* ds:(bx,si) */
152 base = BX_sig(context) + SI_sig(context);
153 seg = DS_sig(context);
154 break;
155 case 1: /* ds:(bx,di) */
156 base = BX_sig(context) + DI_sig(context);
157 seg = DS_sig(context);
158 break;
159 case 2: /* ss:(bp,si) */
160 base = BP_sig(context) + SI_sig(context);
161 seg = SS_sig(context);
162 break;
163 case 3: /* ss:(bp,di) */
164 base = BP_sig(context) + DI_sig(context);
165 seg = SS_sig(context);
166 break;
167 case 4: /* ds:(si) */
168 base = SI_sig(context);
169 seg = DS_sig(context);
170 break;
171 case 5: /* ds:(di) */
172 base = DI_sig(context);
173 seg = DS_sig(context);
174 break;
175 case 6: /* ss:(bp) */
176 base = BP_sig(context);
177 seg = SS_sig(context);
178 break;
179 case 7: /* ds:(bx) */
180 base = BX_sig(context);
181 seg = DS_sig(context);
182 break;
185 switch(mod)
187 case 0:
188 if (rm == 6) /* special case: ds:(disp16) */
190 GET_VAL( &base, WORD );
191 seg = DS_sig(context);
193 break;
195 case 1: /* 8-bit disp */
196 GET_VAL( &off, BYTE );
197 base += (signed char)off;
198 break;
200 case 2: /* 16-bit disp */
201 GET_VAL( &off, WORD );
202 base += (signed short)off;
203 break;
205 base &= 0xffff;
207 if (segprefix != -1) seg = segprefix;
209 /* Make sure the segment and offset are valid */
210 if (IS_SELECTOR_SYSTEM(seg)) return (BYTE *)(base + (index << ss));
211 if (((seg & 7) != 7) || IS_SELECTOR_FREE(seg)) return NULL;
212 if (GET_SEL_LIMIT(seg) < (base + (index << ss))) return NULL;
213 return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
214 #undef GET_VAL
218 /***********************************************************************
219 * INSTR_EmulateLDS
221 * Emulate the LDS (and LES,LFS,etc.) instruction.
223 static BOOL32 INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
224 int long_addr, int segprefix, int *len )
226 WORD seg;
227 BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
228 BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
229 long_addr, segprefix, len );
230 if (!addr)
231 return FALSE; /* Unable to emulate it */
232 seg = *(WORD *)(addr + (long_op ? 4 : 2));
234 if (!(seg = INSTR_ReplaceSelector( context, seg )))
235 return FALSE; /* Unable to emulate it */
237 /* Now store the offset in the correct register */
239 switch((*regmodrm >> 3) & 7)
241 case 0:
242 if (long_op) EAX_sig(context) = *(DWORD *)addr;
243 else AX_sig(context) = *(WORD *)addr;
244 break;
245 case 1:
246 if (long_op) ECX_sig(context) = *(DWORD *)addr;
247 else CX_sig(context) = *(WORD *)addr;
248 break;
249 case 2:
250 if (long_op) EDX_sig(context) = *(DWORD *)addr;
251 else DX_sig(context) = *(WORD *)addr;
252 break;
253 case 3:
254 if (long_op) EBX_sig(context) = *(DWORD *)addr;
255 else BX_sig(context) = *(WORD *)addr;
256 break;
257 case 4:
258 if (long_op) ESP_sig(context) = *(DWORD *)addr;
259 else SP_sig(context) = *(WORD *)addr;
260 break;
261 case 5:
262 if (long_op) EBP_sig(context) = *(DWORD *)addr;
263 else BP_sig(context) = *(WORD *)addr;
264 break;
265 case 6:
266 if (long_op) ESI_sig(context) = *(DWORD *)addr;
267 else SI_sig(context) = *(WORD *)addr;
268 break;
269 case 7:
270 if (long_op) EDI_sig(context) = *(DWORD *)addr;
271 else DI_sig(context) = *(WORD *)addr;
272 break;
275 /* Store the correct segment in the segment register */
277 switch(*instr)
279 case 0xc4: ES_sig(context) = seg; break; /* les */
280 case 0xc5: DS_sig(context) = seg; break; /* lds */
281 case 0x0f: switch(instr[1])
283 case 0xb2: SS_sig(context) = seg; break; /* lss */
284 #ifdef FS_sig
285 case 0xb4: FS_sig(context) = seg; break; /* lfs */
286 #endif
287 #ifdef GS_sig
288 case 0xb5: GS_sig(context) = seg; break; /* lgs */
289 #endif
291 break;
294 /* Add the opcode size to the total length */
296 *len += 1 + (*instr == 0x0f);
297 return TRUE;
301 /***********************************************************************
302 * INSTR_EmulateInstruction
304 * Emulate a priviledged instruction. Returns TRUE if emulation successful.
306 BOOL32 INSTR_EmulateInstruction( SIGCONTEXT *context )
308 int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
309 SEGPTR gpHandler;
310 BYTE *instr;
312 /* Check for page-fault */
314 #if defined(TRAP_sig) && defined(CR2_sig)
315 if (TRAP_sig(context) == 0x0e
316 && VIRTUAL_HandleFault( (LPVOID)CR2_sig(context) )) return TRUE;
317 #endif
319 long_op = long_addr = IS_SEL_32(context,CS_sig(context));
320 instr = (BYTE *)MK_PTR(context,CS_sig(context),EIP_sig(context));
321 if (!instr) return FALSE;
323 /* First handle any possible prefix */
325 segprefix = -1; /* no prefix */
326 prefix = 1;
327 repX = 0;
328 prefixlen = 0;
329 while(prefix)
331 switch(*instr)
333 case 0x2e:
334 segprefix = CS_sig(context);
335 break;
336 case 0x36:
337 segprefix = SS_sig(context);
338 break;
339 case 0x3e:
340 segprefix = DS_sig(context);
341 break;
342 case 0x26:
343 segprefix = ES_sig(context);
344 break;
345 #ifdef FS_sig
346 case 0x64:
347 segprefix = FS_sig(context);
348 break;
349 #endif
350 #ifdef GS_sig
351 case 0x65:
352 segprefix = GS_sig(context);
353 break;
354 #endif
355 case 0x66:
356 long_op = !long_op; /* opcode size prefix */
357 break;
358 case 0x67:
359 long_addr = !long_addr; /* addr size prefix */
360 break;
361 case 0xf0: /* lock */
362 break;
363 case 0xf2: /* repne */
364 repX = 1;
365 break;
366 case 0xf3: /* repe */
367 repX = 2;
368 break;
369 default:
370 prefix = 0; /* no more prefixes */
371 break;
373 if (prefix)
375 instr++;
376 prefixlen++;
380 /* Now look at the actual instruction */
382 switch(*instr)
384 case 0x07: /* pop es */
385 case 0x17: /* pop ss */
386 case 0x1f: /* pop ds */
388 WORD seg = *(WORD *)STACK_PTR( context );
389 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
391 switch(*instr)
393 case 0x07: ES_sig(context) = seg; break;
394 case 0x17: SS_sig(context) = seg; break;
395 case 0x1f: DS_sig(context) = seg; break;
397 STACK_sig(context) += long_op ? 4 : 2;
398 EIP_sig(context) += prefixlen + 1;
399 return TRUE;
402 break; /* Unable to emulate it */
404 case 0x0f: /* extended instruction */
405 switch(instr[1])
407 #ifdef FS_sig
408 case 0xa1: /* pop fs */
410 WORD seg = *(WORD *)STACK_PTR( context );
411 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
413 FS_sig(context) = seg;
414 STACK_sig(context) += long_op ? 4 : 2;
415 EIP_sig(context) += prefixlen + 2;
416 return TRUE;
419 break;
420 #endif /* FS_sig */
422 #ifdef GS_sig
423 case 0xa9: /* pop gs */
425 WORD seg = *(WORD *)STACK_PTR( context );
426 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
428 GS_sig(context) = seg;
429 STACK_sig(context) += long_op ? 4 : 2;
430 EIP_sig(context) += prefixlen + 2;
431 return TRUE;
434 break;
435 #endif /* GS_sig */
437 case 0xb2: /* lss addr,reg */
438 #ifdef FS_sig
439 case 0xb4: /* lfs addr,reg */
440 #endif
441 #ifdef GS_sig
442 case 0xb5: /* lgs addr,reg */
443 #endif
444 if (INSTR_EmulateLDS( context, instr, long_op,
445 long_addr, segprefix, &len ))
447 EIP_sig(context) += prefixlen + len;
448 return TRUE;
450 break;
452 break; /* Unable to emulate it */
454 case 0x6c: /* insb */
455 case 0x6d: /* insw/d */
456 case 0x6e: /* outsb */
457 case 0x6f: /* outsw/d */
459 int typ = *instr; /* Just in case it's overwritten. */
460 int outp = (typ >= 0x6e);
461 unsigned long count = repX ?
462 (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
463 int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
464 int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
465 int seg = outp ? DS_sig(context) : ES_sig(context); /* FIXME: is this right? */
467 if (outp)
468 /* FIXME: Check segment readable. */
469 (void)0;
470 else
471 /* FIXME: Check segment writeable. */
472 (void)0;
474 if (repX)
476 if (long_addr)
477 ECX_sig(context) = 0;
478 else
479 CX_sig(context) = 0;
482 while (count-- > 0)
484 void *data;
485 if (outp)
487 data = MAKE_PTR(seg,
488 long_addr ? ESI_sig(context) : SI_sig(context));
489 if (long_addr) ESI_sig(context) += step;
490 else SI_sig(context) += step;
492 else
494 data = MAKE_PTR(seg,
495 long_addr ? EDI_sig(context) : DI_sig(context));
496 if (long_addr) EDI_sig(context) += step;
497 else DI_sig(context) += step;
500 switch (typ)
502 case 0x6c:
503 *((BYTE *)data) = IO_inport( DX_sig(context), 1);
504 TRACE(io, "0x%x < %02x @ %04x:%04x\n", DX_sig(context),
505 *((BYTE *)data), CS_sig(context), IP_sig(context));
506 break;
507 case 0x6d:
508 if (long_op)
510 *((DWORD *)data) = IO_inport( DX_sig(context), 4);
511 TRACE(io, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
512 *((DWORD *)data), CS_sig(context), IP_sig(context));
514 else
516 *((WORD *)data) = IO_inport( DX_sig(context), 2);
517 TRACE(io, "0x%x < %04x @ %04x:%04x\n", DX_sig(context),
518 *((WORD *)data), CS_sig(context), IP_sig(context));
520 break;
521 case 0x6e:
522 IO_outport( DX_sig(context), 1, *((BYTE *)data));
523 TRACE(io, "0x%x > %02x @ %04x:%04x\n", DX_sig(context),
524 *((BYTE *)data), CS_sig(context), IP_sig(context));
525 break;
526 case 0x6f:
527 if (long_op)
529 IO_outport( DX_sig(context), 4, *((DWORD *)data));
530 TRACE(io, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
531 *((DWORD *)data), CS_sig(context), IP_sig(context));
533 else
535 IO_outport( DX_sig(context), 2, *((WORD *)data));
536 TRACE(io, "0x%x > %04x @ %04x:%04x\n", DX_sig(context),
537 *((WORD *)data), CS_sig(context), IP_sig(context));
539 break;
542 EIP_sig(context) += prefixlen + 1;
544 return TRUE;
546 case 0x8e: /* mov XX,segment_reg */
548 WORD seg;
549 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
550 long_addr, segprefix, &len );
551 if (!addr)
552 break; /* Unable to emulate it */
553 seg = *(WORD *)addr;
554 if (!(seg = INSTR_ReplaceSelector( context, seg )))
555 break; /* Unable to emulate it */
557 switch((instr[1] >> 3) & 7)
559 case 0:
560 ES_sig(context) = seg;
561 EIP_sig(context) += prefixlen + len + 1;
562 return TRUE;
563 case 1: /* cs */
564 break;
565 case 2:
566 SS_sig(context) = seg;
567 EIP_sig(context) += prefixlen + len + 1;
568 return TRUE;
569 case 3:
570 DS_sig(context) = seg;
571 EIP_sig(context) += prefixlen + len + 1;
572 return TRUE;
573 case 4:
574 #ifdef FS_sig
575 FS_sig(context) = seg;
576 EIP_sig(context) += prefixlen + len + 1;
577 return TRUE;
578 #endif
579 case 5:
580 #ifdef GS_sig
581 GS_sig(context) = seg;
582 EIP_sig(context) += prefixlen + len + 1;
583 return TRUE;
584 #endif
585 case 6: /* unused */
586 case 7: /* unused */
587 break;
590 break; /* Unable to emulate it */
592 case 0xc4: /* les addr,reg */
593 case 0xc5: /* lds addr,reg */
594 if (INSTR_EmulateLDS( context, instr, long_op,
595 long_addr, segprefix, &len ))
597 EIP_sig(context) += prefixlen + len;
598 return TRUE;
600 break; /* Unable to emulate it */
602 case 0xcd: /* int <XX> */
603 if (long_op)
605 ERR(int, "int xx from 32-bit code is not supported.\n");
606 break; /* Unable to emulate it */
608 else
610 FARPROC16 addr = INT_GetPMHandler( instr[1] );
611 WORD *stack = (WORD *)STACK_PTR( context );
612 /* Push the flags and return address on the stack */
613 *(--stack) = FL_sig(context);
614 *(--stack) = CS_sig(context);
615 *(--stack) = IP_sig(context) + prefixlen + 2;
616 STACK_sig(context) -= 3 * sizeof(WORD);
617 /* Jump to the interrupt handler */
618 CS_sig(context) = HIWORD(addr);
619 EIP_sig(context) = LOWORD(addr);
621 return TRUE;
623 case 0xcf: /* iret */
624 if (long_op)
626 DWORD *stack = (DWORD *)STACK_PTR( context );
627 EIP_sig(context) = *stack++;
628 CS_sig(context) = *stack++;
629 EFL_sig(context) = *stack;
630 STACK_sig(context) += 3*sizeof(DWORD); /* Pop the return address and flags */
632 else
634 WORD *stack = (WORD *)STACK_PTR( context );
635 EIP_sig(context) = *stack++;
636 CS_sig(context) = *stack++;
637 FL_sig(context) = *stack;
638 STACK_sig(context) += 3*sizeof(WORD); /* Pop the return address and flags */
640 return TRUE;
642 case 0xe4: /* inb al,XX */
643 AL_sig(context) = IO_inport( instr[1], 1 );
644 TRACE(io, "0x%x < %02x @ %04x:%04x\n", instr[1],
645 AL_sig(context), CS_sig(context), IP_sig(context));
646 EIP_sig(context) += prefixlen + 2;
647 return TRUE;
649 case 0xe5: /* in (e)ax,XX */
650 if (long_op)
652 EAX_sig(context) = IO_inport( instr[1], 4 );
653 TRACE(io, "0x%x < %08lx @ %04x:%04x\n", instr[1],
654 EAX_sig(context), CS_sig(context), IP_sig(context));
656 else
658 AX_sig(context) = IO_inport( instr[1], 2 );
659 TRACE(io, "0x%x < %04x @ %04x:%04x\n", instr[1],
660 AX_sig(context), CS_sig(context), IP_sig(context));
662 EIP_sig(context) += prefixlen + 2;
663 return TRUE;
665 case 0xe6: /* outb XX,al */
666 IO_outport( instr[1], 1, AL_sig(context) );
667 TRACE(io, "0x%x > %02x @ %04x:%04x\n", instr[1],
668 AL_sig(context), CS_sig(context), IP_sig(context));
669 EIP_sig(context) += prefixlen + 2;
670 return TRUE;
672 case 0xe7: /* out XX,(e)ax */
673 if (long_op)
675 IO_outport( instr[1], 4, EAX_sig(context) );
676 TRACE(io, "0x%x > %08lx @ %04x:%04x\n", instr[1],
677 EAX_sig(context), CS_sig(context), IP_sig(context));
679 else
681 IO_outport( instr[1], 2, AX_sig(context) );
682 TRACE(io, "0x%x > %04x @ %04x:%04x\n", instr[1],
683 AX_sig(context), CS_sig(context), IP_sig(context));
685 EIP_sig(context) += prefixlen + 2;
686 return TRUE;
688 case 0xec: /* inb al,dx */
689 AL_sig(context) = IO_inport( DX_sig(context), 1 );
690 TRACE(io, "0x%x < %02x @ %04x:%04x\n", DX_sig(context),
691 AL_sig(context), CS_sig(context), IP_sig(context));
692 EIP_sig(context) += prefixlen + 1;
693 return TRUE;
695 case 0xed: /* in (e)ax,dx */
696 if (long_op)
698 EAX_sig(context) = IO_inport( DX_sig(context), 4 );
699 TRACE(io, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
700 EAX_sig(context), CS_sig(context), IP_sig(context));
702 else
704 AX_sig(context) = IO_inport( DX_sig(context), 2 );
705 TRACE(io, "0x%x < %04x @ %04x:%04x\n", DX_sig(context),
706 AX_sig(context), CS_sig(context), IP_sig(context));
708 EIP_sig(context) += prefixlen + 1;
709 return TRUE;
711 case 0xee: /* outb dx,al */
712 IO_outport( DX_sig(context), 1, AL_sig(context) );
713 TRACE(io, "0x%x > %02x @ %04x:%04x\n", DX_sig(context),
714 AL_sig(context), CS_sig(context), IP_sig(context));
715 EIP_sig(context) += prefixlen + 1;
716 return TRUE;
718 case 0xef: /* out dx,(e)ax */
719 if (long_op)
721 IO_outport( DX_sig(context), 4, EAX_sig(context) );
722 TRACE(io, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
723 EAX_sig(context), CS_sig(context), IP_sig(context));
725 else
727 IO_outport( DX_sig(context), 2, AX_sig(context) );
728 TRACE(io, "0x%x > %04x @ %04x:%04x\n", DX_sig(context),
729 AX_sig(context), CS_sig(context), IP_sig(context));
731 EIP_sig(context) += prefixlen + 1;
732 return TRUE;
734 case 0xfa: /* cli, ignored */
735 EIP_sig(context) += prefixlen + 1;
736 return TRUE;
738 case 0xfb: /* sti, ignored */
739 EIP_sig(context) += prefixlen + 1;
740 return TRUE;
744 /* Check for Win16 __GP handler */
745 gpHandler = HasGPHandler( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context),
746 EIP_sig(context) ) );
747 if (gpHandler)
749 WORD *stack = (WORD *)STACK_PTR( context );
750 *--stack = CS_sig(context);
751 *--stack = EIP_sig(context);
752 STACK_sig(context) -= 2*sizeof(WORD);
754 CS_sig(context) = SELECTOROF( gpHandler );
755 EIP_sig(context) = OFFSETOF( gpHandler );
756 return TRUE;
759 MSG("Unexpected Windows program segfault"
760 " - opcode = %x\n", *instr);
761 return FALSE; /* Unable to emulate it */