programs/winedbg/be_arm.c

   1 /*
   2  * Debugger ARM specific functions
   3  *
   4  * Copyright 2000-2003 Marcus Meissner
   5  *                2004 Eric Pouech
   6  *                2010, 2011 André Hentschel
   7  *
   8  * This library is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU Lesser General Public
  10  * License as published by the Free Software Foundation; either
  11  * version 2.1 of the License, or (at your option) any later version.
  12  *
  13  * This library is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * Lesser General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU Lesser General Public
  19  * License along with this library; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  21  */
  22
  23 #include "debugger.h"
  24
  25 #if defined(__arm__) && !defined(__ARMEB__)
  26
  27 static unsigned be_arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
  28                                 enum be_cpu_addr bca, ADDRESS64* addr)
  29 {
  30     switch (bca)
  31     {
  32     case be_cpu_addr_pc:
  33         return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Pc);
  34     case be_cpu_addr_stack:
  35         return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Sp);
  36     case be_cpu_addr_frame:
  37         return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Fp);
  38     }
  39     return FALSE;
  40 }
  41
  42 static unsigned be_arm_get_register_info(int regno, enum be_cpu_addr* kind)
  43 {
  44     switch (regno)
  45     {
  46     case CV_ARM_PC:  *kind = be_cpu_addr_pc; return TRUE;
  47     case CV_ARM_R0 + 11: *kind = be_cpu_addr_frame; return TRUE;
  48     case CV_ARM_SP:  *kind = be_cpu_addr_stack; return TRUE;
  49     }
  50     return FALSE;
  51 }
  52
  53 static void be_arm_single_step(CONTEXT* ctx, unsigned enable)
  54 {
  55     dbg_printf("be_arm_single_step: not done\n");
  56 }
  57
  58 static void be_arm_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
  59 {
  60     static const char condflags[] = "NZCV";
  61     int i;
  62     char        buf[8];
  63
  64     switch (ctx->Cpsr & 0x1F)
  65     {
  66     case 0:  strcpy(buf, "User26"); break;
  67     case 1:  strcpy(buf, "FIQ26"); break;
  68     case 2:  strcpy(buf, "IRQ26"); break;
  69     case 3:  strcpy(buf, "SVC26"); break;
  70     case 16: strcpy(buf, "User"); break;
  71     case 17: strcpy(buf, "FIQ"); break;
  72     case 18: strcpy(buf, "IRQ"); break;
  73     case 19: strcpy(buf, "SVC"); break;
  74     case 23: strcpy(buf, "ABT"); break;
  75     case 27: strcpy(buf, "UND"); break;
  76     default: strcpy(buf, "UNKNWN"); break;
  77     }
  78
  79     dbg_printf("Register dump:\n");
  80     dbg_printf("%s %s Mode\n", (ctx->Cpsr & 0x20) ? "Thumb" : "ARM", buf);
  81
  82     strcpy(buf, condflags);
  83     for (i = 0; buf[i]; i++)
  84         if (!((ctx->Cpsr >> 26) & (1 << (sizeof(condflags) - i))))
  85             buf[i] = '-';
  86
  87     dbg_printf(" Pc:%04x Sp:%04x Lr:%04x Cpsr:%04x(%s)\n",
  88                ctx->Pc, ctx->Sp, ctx->Lr, ctx->Cpsr, buf);
  89     dbg_printf(" r0:%04x r1:%04x r2:%04x r3:%04x\n",
  90                ctx->R0, ctx->R1, ctx->R2, ctx->R3);
  91     dbg_printf(" r4:%04x r5:%04x  r6:%04x  r7:%04x r8:%04x\n",
  92                ctx->R4, ctx->R5, ctx->R6, ctx->R7, ctx->R8 );
  93     dbg_printf(" r9:%04x r10:%04x Fp:%04x Ip:%04x\n",
  94                ctx->R9, ctx->R10, ctx->Fp, ctx->Ip );
  95
  96     if (all_regs) dbg_printf( "Floating point ARM dump not implemented\n" );
  97 }
  98
  99 static void be_arm_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
 100 {
 101 }
 102
 103 static struct dbg_internal_var be_arm_ctx[] =
 104 {
 105     {CV_ARM_R0 +  0,    "r0",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R0),     dbg_itype_unsigned_int},
 106     {CV_ARM_R0 +  1,    "r1",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R1),     dbg_itype_unsigned_int},
 107     {CV_ARM_R0 +  2,    "r2",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R2),     dbg_itype_unsigned_int},
 108     {CV_ARM_R0 +  3,    "r3",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R3),     dbg_itype_unsigned_int},
 109     {CV_ARM_R0 +  4,    "r4",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R4),     dbg_itype_unsigned_int},
 110     {CV_ARM_R0 +  5,    "r5",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R5),     dbg_itype_unsigned_int},
 111     {CV_ARM_R0 +  6,    "r6",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R6),     dbg_itype_unsigned_int},
 112     {CV_ARM_R0 +  7,    "r7",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R7),     dbg_itype_unsigned_int},
 113     {CV_ARM_R0 +  8,    "r8",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R8),     dbg_itype_unsigned_int},
 114     {CV_ARM_R0 +  9,    "r9",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R9),     dbg_itype_unsigned_int},
 115     {CV_ARM_R0 +  10,   "r10",          (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R10),    dbg_itype_unsigned_int},
 116     {CV_ARM_R0 +  11,   "r11",          (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Fp),     dbg_itype_unsigned_int},
 117     {CV_ARM_R0 +  12,   "r12",          (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ip),     dbg_itype_unsigned_int},
 118     {CV_ARM_SP,         "sp",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp),     dbg_itype_unsigned_int},
 119     {CV_ARM_LR,         "lr",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Lr),     dbg_itype_unsigned_int},
 120     {CV_ARM_PC,         "pc",           (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc),     dbg_itype_unsigned_int},
 121     {CV_ARM_CPSR,       "cpsr",         (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Cpsr),   dbg_itype_unsigned_int},
 122     {0,                 NULL,           0,                                         dbg_itype_none}
 123 };
 124
 125 static unsigned be_arm_is_step_over_insn(const void* insn)
 126 {
 127     dbg_printf("be_arm_is_step_over_insn: not done\n");
 128     return FALSE;
 129 }
 130
 131 static unsigned be_arm_is_function_return(const void* insn)
 132 {
 133     dbg_printf("be_arm_is_function_return: not done\n");
 134     return FALSE;
 135 }
 136
 137 static unsigned be_arm_is_break_insn(const void* insn)
 138 {
 139     dbg_printf("be_arm_is_break_insn: not done\n");
 140     return FALSE;
 141 }
 142
 143 static unsigned be_arm_is_func_call(const void* insn, ADDRESS64* callee)
 144 {
 145     return FALSE;
 146 }
 147
 148 static unsigned be_arm_is_jump(const void* insn, ADDRESS64* jumpee)
 149 {
 150     return FALSE;
 151 }
 152
 153 static void be_arm_disasm_one_insn(ADDRESS64* addr, int display)
 154 {
 155     dbg_printf("Disasm NIY\n");
 156 }
 157
 158 static unsigned be_arm_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
 159                                      CONTEXT* ctx, enum be_xpoint_type type,
 160                                      void* addr, unsigned long* val, unsigned size)
 161 {
 162     SIZE_T              sz;
 163
 164     switch (type)
 165     {
 166     case be_xpoint_break:
 167         if (!size) return 0;
 168         if (!pio->read(hProcess, addr, val, 4, &sz) || sz != 4) return 0;
 169     default:
 170         dbg_printf("Unknown/unsupported bp type %c\n", type);
 171         return 0;
 172     }
 173     return 1;
 174 }
 175
 176 static unsigned be_arm_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
 177                                      CONTEXT* ctx, enum be_xpoint_type type,
 178                                      void* addr, unsigned long val, unsigned size)
 179 {
 180     SIZE_T              sz;
 181
 182     switch (type)
 183     {
 184     case be_xpoint_break:
 185         if (!size) return 0;
 186         if (!pio->write(hProcess, addr, &val, 4, &sz) || sz == 4) return 0;
 187         break;
 188     default:
 189         dbg_printf("Unknown/unsupported bp type %c\n", type);
 190         return 0;
 191     }
 192     return 1;
 193 }
 194
 195 static unsigned be_arm_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
 196 {
 197     dbg_printf("be_arm_is_watchpoint_set: not done\n");
 198     return FALSE;
 199 }
 200
 201 static void be_arm_clear_watchpoint(CONTEXT* ctx, unsigned idx)
 202 {
 203     dbg_printf("be_arm_clear_watchpoint: not done\n");
 204 }
 205
 206 static int be_arm_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
 207 {
 208     INT step = (ctx->Cpsr & 0x20) ? 2 : 4;
 209
 210     if (way)
 211     {
 212         ctx->Pc -= step;
 213         return -step;
 214     }
 215     ctx->Pc += step;
 216     return step;
 217 }
 218
 219 static int be_arm_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
 220                                 unsigned ext_sign, LONGLONG* ret)
 221 {
 222     if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
 223
 224     memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
 225     /* FIXME: this assumes that debuggee and debugger use the same
 226      * integral representation
 227      */
 228     if (!memory_read_value(lvalue, size, ret)) return FALSE;
 229
 230     /* propagate sign information */
 231     if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
 232     {
 233         ULONGLONG neg = -1;
 234         *ret |= neg << (size * 8);
 235     }
 236     return TRUE;
 237 }
 238
 239 static int be_arm_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
 240                               long double* ret)
 241 {
 242     char        tmp[sizeof(long double)];
 243
 244     /* FIXME: this assumes that debuggee and debugger use the same
 245      * representation for reals
 246      */
 247     if (!memory_read_value(lvalue, size, tmp)) return FALSE;
 248
 249     switch (size)
 250     {
 251     case sizeof(float):         *ret = *(float*)tmp;            break;
 252     case sizeof(double):        *ret = *(double*)tmp;           break;
 253     default:                    return FALSE;
 254     }
 255     return TRUE;
 256 }
 257
 258 static int be_arm_store_integer(const struct dbg_lvalue* lvalue, unsigned size,
 259                                 unsigned is_signed, LONGLONG val)
 260 {
 261     /* this is simple if we're on a little endian CPU */
 262     return memory_write_value(lvalue, size, &val);
 263 }
 264
 265 struct backend_cpu be_arm =
 266 {
 267     IMAGE_FILE_MACHINE_ARMV7,
 268     4,
 269     be_cpu_linearize,
 270     be_cpu_build_addr,
 271     be_arm_get_addr,
 272     be_arm_get_register_info,
 273     be_arm_single_step,
 274     be_arm_print_context,
 275     be_arm_print_segment_info,
 276     be_arm_ctx,
 277     be_arm_is_step_over_insn,
 278     be_arm_is_function_return,
 279     be_arm_is_break_insn,
 280     be_arm_is_func_call,
 281     be_arm_is_jump,
 282     be_arm_disasm_one_insn,
 283     be_arm_insert_Xpoint,
 284     be_arm_remove_Xpoint,
 285     be_arm_is_watchpoint_set,
 286     be_arm_clear_watchpoint,
 287     be_arm_adjust_pc_for_break,
 288     be_arm_fetch_integer,
 289     be_arm_fetch_float,
 290     be_arm_store_integer,
 291 };
 292 #endif