libs/port/interlocked.c

   1 /*
   2  * interlocked functions
   3  *
   4  * Copyright 1996 Alexandre Julliard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  19  */
  20
  21 #include "config.h"
  22 #include "wine/port.h"
  23 #include <assert.h>
  24
  25 #ifdef __i386__
  26
  27 #ifdef __GNUC__
  28
  29 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
  30                   "movl 12(%esp),%eax\n\t"
  31                   "movl 8(%esp),%ecx\n\t"
  32                   "movl 4(%esp),%edx\n\t"
  33                   "lock; cmpxchgl %ecx,(%edx)\n\t"
  34                   "ret")
  35 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
  36                   "movl 12(%esp),%eax\n\t"
  37                   "movl 8(%esp),%ecx\n\t"
  38                   "movl 4(%esp),%edx\n\t"
  39                   "lock; cmpxchgl %ecx,(%edx)\n\t"
  40                   "ret")
  41  __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
  42                    "push %ebx\n\t"
  43                    __ASM_CFI(".cfi_adjust_cfa_offset 4\n\t")
  44                    __ASM_CFI(".cfi_rel_offset %ebx,0\n\t")
  45                    "push %esi\n\t"
  46                    __ASM_CFI(".cfi_adjust_cfa_offset 4\n\t")
  47                    __ASM_CFI(".cfi_rel_offset %esi,0\n\t")
  48                    "movl 12(%esp),%esi\n\t"
  49                    "movl 16(%esp),%ebx\n\t"
  50                    "movl 20(%esp),%ecx\n\t"
  51                    "movl 24(%esp),%eax\n\t"
  52                    "movl 28(%esp),%edx\n\t"
  53                    "lock; cmpxchg8b (%esi)\n\t"
  54                    "pop %esi\n\t"
  55                    __ASM_CFI(".cfi_same_value %esi\n\t")
  56                    __ASM_CFI(".cfi_adjust_cfa_offset -4\n\t")
  57                    "pop %ebx\n\t"
  58                    __ASM_CFI(".cfi_same_value %ebx\n\t")
  59                    __ASM_CFI(".cfi_adjust_cfa_offset -4\n\t")
  60                    "ret")
  61 __ASM_GLOBAL_FUNC(interlocked_xchg,
  62                   "movl 8(%esp),%eax\n\t"
  63                   "movl 4(%esp),%edx\n\t"
  64                   "lock; xchgl %eax,(%edx)\n\t"
  65                   "ret")
  66 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
  67                   "movl 8(%esp),%eax\n\t"
  68                   "movl 4(%esp),%edx\n\t"
  69                   "lock; xchgl %eax,(%edx)\n\t"
  70                   "ret")
  71 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
  72                   "movl 8(%esp),%eax\n\t"
  73                   "movl 4(%esp),%edx\n\t"
  74                   "lock; xaddl %eax,(%edx)\n\t"
  75                   "ret")
  76
  77 #elif defined(_MSC_VER)
  78
  79 __declspec(naked) int interlocked_cmpxchg( int *dest, int xchg, int compare )
  80 {
  81     __asm mov eax, 12[esp];
  82     __asm mov ecx, 8[esp];
  83     __asm mov edx, 4[esp];
  84     __asm lock cmpxchg [edx], ecx;
  85     __asm ret;
  86 }
  87
  88 __declspec(naked) void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
  89 {
  90     __asm mov eax, 12[esp];
  91     __asm mov ecx, 8[esp];
  92     __asm mov edx, 4[esp];
  93     __asm lock cmpxchg [edx], ecx;
  94     __asm ret;
  95 }
  96
  97 __declspec(naked) __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
  98 {
  99     __asm push ebx;
 100     __asm push esi;
 101     __asm mov esi, 12[esp];
 102     __asm mov ebx, 16[esp];
 103     __asm mov ecx, 20[esp];
 104     __asm mov eax, 24[esp];
 105     __asm mov edx, 28[esp];
 106     __asm lock cmpxchg8b [esi];
 107     __asm pop esi;
 108     __asm pop ebx;
 109     __asm ret;
 110 }
 111
 112 __declspec(naked) int interlocked_xchg( int *dest, int val )
 113 {
 114     __asm mov eax, 8[esp];
 115     __asm mov edx, 4[esp];
 116     __asm lock xchg [edx], eax;
 117     __asm ret;
 118 }
 119
 120 __declspec(naked) void *interlocked_xchg_ptr( void **dest, void *val )
 121 {
 122     __asm mov eax, 8[esp];
 123     __asm mov edx, 4[esp];
 124     __asm lock xchg [edx], eax;
 125     __asm ret;
 126 }
 127
 128 __declspec(naked) int interlocked_xchg_add( int *dest, int incr )
 129 {
 130     __asm mov eax, 8[esp];
 131     __asm mov edx, 4[esp];
 132     __asm lock xadd [edx], eax;
 133     __asm ret;
 134 }
 135
 136 #else
 137 # error You must implement the interlocked* functions for your compiler
 138 #endif
 139
 140 #elif defined(__x86_64__)
 141
 142 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
 143                   "mov %edx, %eax\n\t"
 144                   "lock cmpxchgl %esi,(%rdi)\n\t"
 145                   "ret")
 146 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
 147                   "mov %rdx, %rax\n\t"
 148                   "lock cmpxchgq %rsi,(%rdi)\n\t"
 149                   "ret")
 150 __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
 151                   "mov %rdx, %rax\n\t"
 152                   "lock cmpxchgq %rsi,(%rdi)\n\t"
 153                   "ret")
 154 __ASM_GLOBAL_FUNC(interlocked_xchg,
 155                   "mov %esi, %eax\n\t"
 156                   "lock xchgl %eax, (%rdi)\n\t"
 157                   "ret")
 158 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
 159                   "mov %rsi, %rax\n\t"
 160                   "lock xchgq %rax,(%rdi)\n\t"
 161                   "ret")
 162 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
 163                   "mov %esi, %eax\n\t"
 164                   "lock xaddl %eax, (%rdi)\n\t"
 165                   "ret")
 166 __ASM_GLOBAL_FUNC(interlocked_cmpxchg128,
 167                   "push %rbx\n\t"
 168                    ".cfi_adjust_cfa_offset 8\n\t"
 169                    ".cfi_rel_offset %rbx,0\n\t"
 170                   "mov %rcx,%r8\n\t"  /* compare */
 171                   "mov %rdx,%rbx\n\t" /* xchg_low */
 172                   "mov %rsi,%rcx\n\t" /* xchg_high */
 173                   "mov 0(%r8),%rax\n\t"
 174                   "mov 8(%r8),%rdx\n\t"
 175                   "lock cmpxchg16b (%rdi)\n\t"
 176                   "mov %rax,0(%r8)\n\t"
 177                   "mov %rdx,8(%r8)\n\t"
 178                   "setz %al\n\t"
 179                   "pop %rbx\n\t"
 180                    ".cfi_adjust_cfa_offset -8\n\t"
 181                    ".cfi_same_value %rbx\n\t"
 182                   "ret")
 183
 184 #elif defined(__powerpc__)
 185 void* interlocked_cmpxchg_ptr( void **dest, void* xchg, void* compare)
 186 {
 187     void *ret = 0;
 188     void *scratch;
 189     __asm__ __volatile__(
 190         "0:    lwarx %0,0,%2\n"
 191         "      xor. %1,%4,%0\n"
 192         "      bne 1f\n"
 193         "      stwcx. %3,0,%2\n"
 194         "      bne- 0b\n"
 195         "      isync\n"
 196         "1:    "
 197         : "=&r"(ret), "=&r"(scratch)
 198         : "r"(dest), "r"(xchg), "r"(compare)
 199         : "cr0","memory");
 200     return ret;
 201 }
 202
 203 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
 204 {
 205     /* FIXME: add code */
 206     assert(0);
 207 }
 208
 209 int interlocked_cmpxchg( int *dest, int xchg, int compare)
 210 {
 211     int ret = 0;
 212     int scratch;
 213     __asm__ __volatile__(
 214         "0:    lwarx %0,0,%2\n"
 215         "      xor. %1,%4,%0\n"
 216         "      bne 1f\n"
 217         "      stwcx. %3,0,%2\n"
 218         "      bne- 0b\n"
 219         "      isync\n"
 220         "1:    "
 221         : "=&r"(ret), "=&r"(scratch)
 222         : "r"(dest), "r"(xchg), "r"(compare)
 223         : "cr0","memory","r0");
 224     return ret;
 225 }
 226
 227 int interlocked_xchg_add( int *dest, int incr )
 228 {
 229     int ret = 0;
 230     int zero = 0;
 231     __asm__ __volatile__(
 232         "0:    lwarx %0, %3, %1\n"
 233         "      add %0, %2, %0\n"
 234         "      stwcx. %0, %3, %1\n"
 235         "      bne- 0b\n"
 236         "      isync\n"
 237         : "=&r" (ret)
 238         : "r"(dest), "r"(incr), "r"(zero)
 239         : "cr0", "memory", "r0"
 240     );
 241     return ret-incr;
 242 }
 243
 244 int interlocked_xchg( int* dest, int val )
 245 {
 246     int ret = 0;
 247     __asm__ __volatile__(
 248         "0:    lwarx %0,0,%1\n"
 249         "      stwcx. %2,0,%1\n"
 250         "      bne- 0b\n"
 251         "      isync\n"
 252         : "=&r"(ret)
 253         : "r"(dest), "r"(val)
 254         : "cr0","memory","r0");
 255     return ret;
 256 }
 257
 258 void* interlocked_xchg_ptr( void** dest, void* val )
 259 {
 260     void *ret = NULL;
 261     __asm__ __volatile__(
 262         "0:    lwarx %0,0,%1\n"
 263         "      stwcx. %2,0,%1\n"
 264         "      bne- 0b\n"
 265         "      isync\n"
 266         : "=&r"(ret)
 267         : "r"(dest), "r"(val)
 268         : "cr0","memory","r0");
 269     return ret;
 270 }
 271
 272 #elif defined(__sparc__) && defined(__sun__)
 273
 274 /*
 275  * As the earlier Sparc processors lack necessary atomic instructions,
 276  * I'm simply falling back to the library-provided _lwp_mutex routines
 277  * to ensure mutual exclusion in a way appropriate for the current
 278  * architecture.
 279  *
 280  * FIXME:  If we have the compare-and-swap instruction (Sparc v9 and above)
 281  *         we could use this to speed up the Interlocked operations ...
 282  */
 283 #include <synch.h>
 284 static lwp_mutex_t interlocked_mutex = DEFAULTMUTEX;
 285
 286 int interlocked_cmpxchg( int *dest, int xchg, int compare )
 287 {
 288     _lwp_mutex_lock( &interlocked_mutex );
 289     if (*dest == compare) *dest = xchg;
 290     else compare = *dest;
 291     _lwp_mutex_unlock( &interlocked_mutex );
 292     return compare;
 293 }
 294
 295 void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
 296 {
 297     _lwp_mutex_lock( &interlocked_mutex );
 298     if (*dest == compare) *dest = xchg;
 299     else compare = *dest;
 300     _lwp_mutex_unlock( &interlocked_mutex );
 301     return compare;
 302 }
 303
 304 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare )
 305 {
 306     _lwp_mutex_lock( &interlocked_mutex );
 307     if (*dest == compare) *dest = xchg;
 308     else compare = *dest;
 309     _lwp_mutex_unlock( &interlocked_mutex );
 310     return compare;
 311 }
 312
 313 int interlocked_xchg( int *dest, int val )
 314 {
 315     int retv;
 316     _lwp_mutex_lock( &interlocked_mutex );
 317     retv = *dest;
 318     *dest = val;
 319     _lwp_mutex_unlock( &interlocked_mutex );
 320     return retv;
 321 }
 322
 323 void *interlocked_xchg_ptr( void **dest, void *val )
 324 {
 325     void *retv;
 326     _lwp_mutex_lock( &interlocked_mutex );
 327     retv = *dest;
 328     *dest = val;
 329     _lwp_mutex_unlock( &interlocked_mutex );
 330     return retv;
 331 }
 332
 333 int interlocked_xchg_add( int *dest, int incr )
 334 {
 335     int retv;
 336     _lwp_mutex_lock( &interlocked_mutex );
 337     retv = *dest;
 338     *dest += incr;
 339     _lwp_mutex_unlock( &interlocked_mutex );
 340     return retv;
 341 }
 342
 343 #elif defined(__ALPHA__) && defined(__GNUC__)
 344
 345 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
 346                   "L0cmpxchg:\n\t"
 347                   "ldl_l $0,0($16)\n\t"
 348                   "cmpeq $0,$18,$1\n\t"
 349                   "beq   $1,L1cmpxchg\n\t"
 350                   "mov   $17,$0\n\t"
 351                   "stl_c $0,0($16)\n\t"
 352                   "beq   $0,L0cmpxchg\n\t"
 353                   "mov   $18,$0\n"
 354                   "L1cmpxchg:\n\t"
 355                   "mb")
 356
 357 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
 358                   "L0cmpxchg_ptr:\n\t"
 359                   "ldq_l $0,0($16)\n\t"
 360                   "cmpeq $0,$18,$1\n\t"
 361                   "beq   $1,L1cmpxchg_ptr\n\t"
 362                   "mov   $17,$0\n\t"
 363                   "stq_c $0,0($16)\n\t"
 364                   "beq   $0,L0cmpxchg_ptr\n\t"
 365                   "mov   $18,$0\n"
 366                   "L1cmpxchg_ptr:\n\t"
 367                   "mb")
 368
 369 __int64 interlocked_cmpxchg64(__int64 *dest, __int64 xchg, __int64 compare)
 370 {
 371     /* FIXME: add code */
 372     assert(0);
 373 }
 374
 375 __ASM_GLOBAL_FUNC(interlocked_xchg,
 376                   "L0xchg:\n\t"
 377                   "ldl_l $0,0($16)\n\t"
 378                   "mov   $17,$1\n\t"
 379                   "stl_c $1,0($16)\n\t"
 380                   "beq   $1,L0xchg\n\t"
 381                   "mb")
 382
 383 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
 384                   "L0xchg_ptr:\n\t"
 385                   "ldq_l $0,0($16)\n\t"
 386                   "mov   $17,$1\n\t"
 387                   "stq_c $1,0($16)\n\t"
 388                   "beq   $1,L0xchg_ptr\n\t"
 389                   "mb")
 390
 391 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
 392                   "L0xchg_add:\n\t"
 393                   "ldl_l $0,0($16)\n\t"
 394                   "addl  $0,$17,$1\n\t"
 395                   "stl_c $1,0($16)\n\t"
 396                   "beq   $1,L0xchg_add\n\t"
 397                   "mb")
 398
 399 #else
 400 # error You must implement the interlocked* functions for your CPU
 401 #endif