oleaut32/tests: Add a test to show that support for coercion to arrays of variants...
[wine/multimedia.git] / libs / port / interlocked.c
blobefdfd2af1972b0799620c1b0e20d4f32a6f5eec7
1 /*
2 * interlocked functions
4 * Copyright 1996 Alexandre Julliard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
21 #include "config.h"
22 #include "wine/port.h"
23 #include <assert.h>
25 #ifdef __i386__
27 #if defined(_MSC_VER)
29 __declspec(naked) int interlocked_cmpxchg( int *dest, int xchg, int compare )
31 __asm mov eax, 12[esp];
32 __asm mov ecx, 8[esp];
33 __asm mov edx, 4[esp];
34 __asm lock cmpxchg [edx], ecx;
35 __asm ret;
38 __declspec(naked) void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
40 __asm mov eax, 12[esp];
41 __asm mov ecx, 8[esp];
42 __asm mov edx, 4[esp];
43 __asm lock cmpxchg [edx], ecx;
44 __asm ret;
47 __declspec(naked) __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
49 __asm push ebx;
50 __asm push esi;
51 __asm mov esi, 12[esp];
52 __asm mov ebx, 16[esp];
53 __asm mov ecx, 20[esp];
54 __asm mov eax, 24[esp];
55 __asm mov edx, 28[esp];
56 __asm lock cmpxchg8b [esi];
57 __asm pop esi;
58 __asm pop ebx;
59 __asm ret;
62 __declspec(naked) int interlocked_xchg( int *dest, int val )
64 __asm mov eax, 8[esp];
65 __asm mov edx, 4[esp];
66 __asm lock xchg [edx], eax;
67 __asm ret;
70 __declspec(naked) void *interlocked_xchg_ptr( void **dest, void *val )
72 __asm mov eax, 8[esp];
73 __asm mov edx, 4[esp];
74 __asm lock xchg [edx], eax;
75 __asm ret;
78 __declspec(naked) int interlocked_xchg_add( int *dest, int incr )
80 __asm mov eax, 8[esp];
81 __asm mov edx, 4[esp];
82 __asm lock xadd [edx], eax;
83 __asm ret;
86 #else
87 /* use gcc compatible asm code as default for __i386__ */
89 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
90 "movl 12(%esp),%eax\n\t"
91 "movl 8(%esp),%ecx\n\t"
92 "movl 4(%esp),%edx\n\t"
93 "lock; cmpxchgl %ecx,(%edx)\n\t"
94 "ret")
95 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
96 "movl 12(%esp),%eax\n\t"
97 "movl 8(%esp),%ecx\n\t"
98 "movl 4(%esp),%edx\n\t"
99 "lock; cmpxchgl %ecx,(%edx)\n\t"
100 "ret")
101 __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
102 "push %ebx\n\t"
103 __ASM_CFI(".cfi_adjust_cfa_offset 4\n\t")
104 __ASM_CFI(".cfi_rel_offset %ebx,0\n\t")
105 "push %esi\n\t"
106 __ASM_CFI(".cfi_adjust_cfa_offset 4\n\t")
107 __ASM_CFI(".cfi_rel_offset %esi,0\n\t")
108 "movl 12(%esp),%esi\n\t"
109 "movl 16(%esp),%ebx\n\t"
110 "movl 20(%esp),%ecx\n\t"
111 "movl 24(%esp),%eax\n\t"
112 "movl 28(%esp),%edx\n\t"
113 "lock; cmpxchg8b (%esi)\n\t"
114 "pop %esi\n\t"
115 __ASM_CFI(".cfi_same_value %esi\n\t")
116 __ASM_CFI(".cfi_adjust_cfa_offset -4\n\t")
117 "pop %ebx\n\t"
118 __ASM_CFI(".cfi_same_value %ebx\n\t")
119 __ASM_CFI(".cfi_adjust_cfa_offset -4\n\t")
120 "ret")
121 __ASM_GLOBAL_FUNC(interlocked_xchg,
122 "movl 8(%esp),%eax\n\t"
123 "movl 4(%esp),%edx\n\t"
124 "lock; xchgl %eax,(%edx)\n\t"
125 "ret")
126 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
127 "movl 8(%esp),%eax\n\t"
128 "movl 4(%esp),%edx\n\t"
129 "lock; xchgl %eax,(%edx)\n\t"
130 "ret")
131 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
132 "movl 8(%esp),%eax\n\t"
133 "movl 4(%esp),%edx\n\t"
134 "lock; xaddl %eax,(%edx)\n\t"
135 "ret")
137 #endif
139 #elif defined(__x86_64__)
141 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
142 "mov %edx, %eax\n\t"
143 "lock cmpxchgl %esi,(%rdi)\n\t"
144 "ret")
145 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
146 "mov %rdx, %rax\n\t"
147 "lock cmpxchgq %rsi,(%rdi)\n\t"
148 "ret")
149 __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
150 "mov %rdx, %rax\n\t"
151 "lock cmpxchgq %rsi,(%rdi)\n\t"
152 "ret")
153 __ASM_GLOBAL_FUNC(interlocked_xchg,
154 "mov %esi, %eax\n\t"
155 "lock xchgl %eax, (%rdi)\n\t"
156 "ret")
157 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
158 "mov %rsi, %rax\n\t"
159 "lock xchgq %rax,(%rdi)\n\t"
160 "ret")
161 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
162 "mov %esi, %eax\n\t"
163 "lock xaddl %eax, (%rdi)\n\t"
164 "ret")
165 __ASM_GLOBAL_FUNC(interlocked_cmpxchg128,
166 "push %rbx\n\t"
167 __ASM_CFI(".cfi_adjust_cfa_offset 8\n\t")
168 __ASM_CFI(".cfi_rel_offset %rbx,0\n\t")
169 "mov %rcx,%r8\n\t" /* compare */
170 "mov %rdx,%rbx\n\t" /* xchg_low */
171 "mov %rsi,%rcx\n\t" /* xchg_high */
172 "mov 0(%r8),%rax\n\t"
173 "mov 8(%r8),%rdx\n\t"
174 "lock cmpxchg16b (%rdi)\n\t"
175 "mov %rax,0(%r8)\n\t"
176 "mov %rdx,8(%r8)\n\t"
177 "setz %al\n\t"
178 "pop %rbx\n\t"
179 __ASM_CFI(".cfi_adjust_cfa_offset -8\n\t")
180 __ASM_CFI(".cfi_same_value %rbx\n\t")
181 "ret")
183 #elif defined(__powerpc__)
185 #if !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) && __SIZEOF_POINTER__ == 4) \
186 && !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) && __SIZEOF_POINTER__ == 8)
187 void* interlocked_cmpxchg_ptr( void **dest, void* xchg, void* compare)
189 void *ret = 0;
190 void *scratch;
191 __asm__ __volatile__(
192 "0: lwarx %0,0,%2\n"
193 " xor. %1,%4,%0\n"
194 " bne 1f\n"
195 " stwcx. %3,0,%2\n"
196 " bne- 0b\n"
197 " isync\n"
198 "1: "
199 : "=&r"(ret), "=&r"(scratch)
200 : "r"(dest), "r"(xchg), "r"(compare)
201 : "cr0","memory");
202 return ret;
204 #endif
206 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
207 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
209 /* FIXME: add code */
210 assert(0);
212 #endif
214 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
215 int interlocked_cmpxchg( int *dest, int xchg, int compare)
217 int ret = 0;
218 int scratch;
219 __asm__ __volatile__(
220 "0: lwarx %0,0,%2\n"
221 " xor. %1,%4,%0\n"
222 " bne 1f\n"
223 " stwcx. %3,0,%2\n"
224 " bne- 0b\n"
225 " isync\n"
226 "1: "
227 : "=&r"(ret), "=&r"(scratch)
228 : "r"(dest), "r"(xchg), "r"(compare)
229 : "cr0","memory","r0");
230 return ret;
232 #endif
234 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
235 int interlocked_xchg_add( int *dest, int incr )
237 int ret = 0;
238 int zero = 0;
239 __asm__ __volatile__(
240 "0: lwarx %0, %3, %1\n"
241 " add %0, %2, %0\n"
242 " stwcx. %0, %3, %1\n"
243 " bne- 0b\n"
244 " isync\n"
245 : "=&r" (ret)
246 : "r"(dest), "r"(incr), "r"(zero)
247 : "cr0", "memory", "r0"
249 return ret-incr;
251 #endif
253 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
254 int interlocked_xchg( int* dest, int val )
256 int ret = 0;
257 __asm__ __volatile__(
258 "0: lwarx %0,0,%1\n"
259 " stwcx. %2,0,%1\n"
260 " bne- 0b\n"
261 " isync\n"
262 : "=&r"(ret)
263 : "r"(dest), "r"(val)
264 : "cr0","memory","r0");
265 return ret;
267 #endif
269 #if !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) && __SIZEOF_POINTER__ == 4) \
270 && !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) && __SIZEOF_POINTER__ == 8)
271 void* interlocked_xchg_ptr( void** dest, void* val )
273 void *ret = NULL;
274 __asm__ __volatile__(
275 "0: lwarx %0,0,%1\n"
276 " stwcx. %2,0,%1\n"
277 " bne- 0b\n"
278 " isync\n"
279 : "=&r"(ret)
280 : "r"(dest), "r"(val)
281 : "cr0","memory","r0");
282 return ret;
284 #endif
286 #else
288 #include <pthread.h>
290 static pthread_mutex_t interlocked_mutex = PTHREAD_MUTEX_INITIALIZER;
292 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
293 int interlocked_cmpxchg( int *dest, int xchg, int compare )
295 pthread_mutex_lock( &interlocked_mutex );
297 if (*dest == compare)
298 *dest = xchg;
299 else
300 compare = *dest;
302 pthread_mutex_unlock( &interlocked_mutex );
303 return compare;
305 #endif
307 #if !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) && __SIZEOF_POINTER__ == 4) \
308 && !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) && __SIZEOF_POINTER__ == 8)
309 void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
311 pthread_mutex_lock( &interlocked_mutex );
313 if (*dest == compare)
314 *dest = xchg;
315 else
316 compare = *dest;
318 pthread_mutex_unlock( &interlocked_mutex );
319 return compare;
321 #endif
323 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
324 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare )
326 pthread_mutex_lock( &interlocked_mutex );
328 if (*dest == compare)
329 *dest = xchg;
330 else
331 compare = *dest;
333 pthread_mutex_unlock( &interlocked_mutex );
334 return compare;
336 #endif
338 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
339 int interlocked_xchg( int *dest, int val )
341 int retv;
342 pthread_mutex_lock( &interlocked_mutex );
343 retv = *dest;
344 *dest = val;
345 pthread_mutex_unlock( &interlocked_mutex );
346 return retv;
348 #endif
350 #if !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) && __SIZEOF_POINTER__ == 4) \
351 && !(defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) && __SIZEOF_POINTER__ == 8)
352 void *interlocked_xchg_ptr( void **dest, void *val )
354 void *retv;
355 pthread_mutex_lock( &interlocked_mutex );
356 retv = *dest;
357 *dest = val;
358 pthread_mutex_unlock( &interlocked_mutex );
359 return retv;
361 #endif
363 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
364 int interlocked_xchg_add( int *dest, int incr )
366 int retv;
367 pthread_mutex_lock( &interlocked_mutex );
368 retv = *dest;
369 *dest += incr;
370 pthread_mutex_unlock( &interlocked_mutex );
371 return retv;
373 #endif
375 unsigned char interlocked_cmpxchg128( __int64 *dest, __int64 xchg_high, __int64 xchg_low, __int64 *compare )
377 unsigned char retv;
378 pthread_mutex_lock( &interlocked_mutex );
379 if (dest[0] == compare[0] && dest[1] == compare[1])
381 dest[0] = xchg_low;
382 dest[1] = xchg_high;
383 retv = 1;
385 else
387 compare[0] = dest[0];
388 compare[1] = dest[1];
389 retv = 0;
391 pthread_mutex_unlock( &interlocked_mutex );
392 return retv;
395 #endif