dlls/dbghelp/cpu_arm.c

   1 /*
   2  * File cpu_arm.c
   3  *
   4  * Copyright (C) 2009 Eric Pouech
   5  * Copyright (C) 2010, 2011 André Hentschel
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <assert.h>
  23
  24 #include "ntstatus.h"
  25 #define WIN32_NO_STATUS
  26 #include "dbghelp_private.h"
  27 #include "winternl.h"
  28 #include "wine/debug.h"
  29
  30 WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
  31
  32 static BOOL arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
  33                          enum cpu_addr ca, ADDRESS64* addr)
  34 {
  35     addr->Mode    = AddrModeFlat;
  36     addr->Segment = 0; /* don't need segment */
  37     switch (ca)
  38     {
  39 #ifdef __arm__
  40     case cpu_addr_pc:    addr->Offset = ctx->Pc; return TRUE;
  41     case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
  42     case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
  43 #endif
  44     default: addr->Mode = -1;
  45         return FALSE;
  46     }
  47 }
  48
  49 #ifdef __arm__
  50 enum st_mode {stm_start, stm_arm, stm_done};
  51
  52 /* indexes in Reserved array */
  53 #define __CurrentModeCount      0
  54
  55 #define curr_mode   (frame->Reserved[__CurrentModeCount] & 0x0F)
  56 #define curr_count  (frame->Reserved[__CurrentModeCount] >> 4)
  57
  58 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);}
  59 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10)
  60
  61 /* fetch_next_frame()
  62  *
  63  * modify (at least) context.Pc using unwind information
  64  * either out of debug info (dwarf), or simple Lr trace
  65  */
  66 static BOOL fetch_next_frame(struct cpu_stack_walk* csw,
  67                                CONTEXT* context, DWORD_PTR curr_pc)
  68 {
  69     DWORD_PTR               xframe;
  70     DWORD                   oldReturn = context->Lr;
  71
  72     if (dwarf2_virtual_unwind(csw, curr_pc, context, &xframe))
  73     {
  74         context->Sp = xframe;
  75         context->Pc = oldReturn;
  76         return TRUE;
  77     }
  78
  79     if (context->Pc == context->Lr) return FALSE;
  80     context->Pc = oldReturn;
  81
  82     return TRUE;
  83 }
  84
  85 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
  86 {
  87     unsigned    deltapc = curr_count <= 1 ? 0 : 4;
  88
  89     /* sanity check */
  90     if (curr_mode >= stm_done) return FALSE;
  91
  92     TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n",
  93           wine_dbgstr_addr(&frame->AddrPC),
  94           wine_dbgstr_addr(&frame->AddrFrame),
  95           wine_dbgstr_addr(&frame->AddrReturn),
  96           wine_dbgstr_addr(&frame->AddrStack),
  97           curr_mode == stm_start ? "start" : "ARM",
  98           wine_dbgstr_longlong(curr_count));
  99
 100     if (curr_mode == stm_start)
 101     {
 102         /* Init done */
 103         set_curr_mode(stm_arm);
 104         frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat;
 105         /* don't set up AddrStack on first call. Either the caller has set it up, or
 106          * we will get it in the next frame
 107          */
 108         memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore));
 109     }
 110     else
 111     {
 112         if (context->Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n");
 113         if (context->Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n");
 114
 115         if (frame->AddrReturn.Offset == 0) goto done_err;
 116         if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc))
 117             goto done_err;
 118     }
 119
 120     memset(&frame->Params, 0, sizeof(frame->Params));
 121
 122     /* set frame information */
 123     frame->AddrStack.Offset = context->Sp;
 124     frame->AddrReturn.Offset = context->Lr;
 125     frame->AddrFrame.Offset = context->Fp;
 126     frame->AddrPC.Offset = context->Pc;
 127
 128     frame->Far = TRUE;
 129     frame->Virtual = TRUE;
 130     inc_curr_count();
 131
 132     TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n",
 133           wine_dbgstr_addr(&frame->AddrPC),
 134           wine_dbgstr_addr(&frame->AddrFrame),
 135           wine_dbgstr_addr(&frame->AddrReturn),
 136           wine_dbgstr_addr(&frame->AddrStack),
 137           curr_mode == stm_start ? "start" : "ARM",
 138           wine_dbgstr_longlong(curr_count),
 139           frame->FuncTableEntry);
 140
 141     return TRUE;
 142 done_err:
 143     set_curr_mode(stm_done);
 144     return FALSE;
 145 }
 146 #else
 147 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
 148 {
 149     return FALSE;
 150 }
 151 #endif
 152
 153 static unsigned arm_map_dwarf_register(unsigned regno, BOOL eh_frame)
 154 {
 155     if (regno <= 15) return CV_ARM_R0 + regno;
 156     if (regno == 128) return CV_ARM_CPSR;
 157
 158     FIXME("Don't know how to map register %d\n", regno);
 159     return CV_ARM_NOREG;
 160 }
 161
 162 static void* arm_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* size)
 163 {
 164 #ifdef __arm__
 165     switch (regno)
 166     {
 167     case CV_ARM_R0 +  0: *size = sizeof(ctx->R0); return &ctx->R0;
 168     case CV_ARM_R0 +  1: *size = sizeof(ctx->R1); return &ctx->R1;
 169     case CV_ARM_R0 +  2: *size = sizeof(ctx->R2); return &ctx->R2;
 170     case CV_ARM_R0 +  3: *size = sizeof(ctx->R3); return &ctx->R3;
 171     case CV_ARM_R0 +  4: *size = sizeof(ctx->R4); return &ctx->R4;
 172     case CV_ARM_R0 +  5: *size = sizeof(ctx->R5); return &ctx->R5;
 173     case CV_ARM_R0 +  6: *size = sizeof(ctx->R6); return &ctx->R6;
 174     case CV_ARM_R0 +  7: *size = sizeof(ctx->R7); return &ctx->R7;
 175     case CV_ARM_R0 +  8: *size = sizeof(ctx->R8); return &ctx->R8;
 176     case CV_ARM_R0 +  9: *size = sizeof(ctx->R9); return &ctx->R9;
 177     case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
 178     case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
 179     case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
 180
 181     case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
 182     case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
 183     case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
 184     case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
 185     }
 186 #endif
 187     FIXME("Unknown register %x\n", regno);
 188     return NULL;
 189 }
 190
 191 static const char* arm_fetch_regname(unsigned regno)
 192 {
 193     switch (regno)
 194     {
 195     case CV_ARM_R0 +  0: return "r0";
 196     case CV_ARM_R0 +  1: return "r1";
 197     case CV_ARM_R0 +  2: return "r2";
 198     case CV_ARM_R0 +  3: return "r3";
 199     case CV_ARM_R0 +  4: return "r4";
 200     case CV_ARM_R0 +  5: return "r5";
 201     case CV_ARM_R0 +  6: return "r6";
 202     case CV_ARM_R0 +  7: return "r7";
 203     case CV_ARM_R0 +  8: return "r8";
 204     case CV_ARM_R0 +  9: return "r9";
 205     case CV_ARM_R0 + 10: return "r10";
 206     case CV_ARM_R0 + 11: return "r11";
 207     case CV_ARM_R0 + 12: return "r12";
 208
 209     case CV_ARM_SP: return "sp";
 210     case CV_ARM_LR: return "lr";
 211     case CV_ARM_PC: return "pc";
 212     case CV_ARM_CPSR: return "cpsr";
 213     }
 214     FIXME("Unknown register %x\n", regno);
 215     return NULL;
 216 }
 217
 218 static BOOL arm_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
 219 {
 220     if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
 221     {
 222         /* FIXME: crop values across module boundaries, */
 223 #ifdef __arm__
 224         ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
 225         minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
 226 #endif
 227     }
 228
 229     return TRUE;
 230 }
 231
 232 static BOOL arm_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
 233 {
 234     /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
 235      * function table minidump stream
 236      */
 237     return FALSE;
 238 }
 239
 240 DECLSPEC_HIDDEN struct cpu cpu_arm = {
 241     IMAGE_FILE_MACHINE_ARMNT,
 242     4,
 243     CV_ARM_R0 + 11,
 244     arm_get_addr,
 245     arm_stack_walk,
 246     NULL,
 247     arm_map_dwarf_register,
 248     arm_fetch_context_reg,
 249     arm_fetch_regname,
 250     arm_fetch_minidump_thread,
 251     arm_fetch_minidump_module,
 252 };