miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include "wine/winuser16.h"
   8 #include "ldt.h"
   9 #include "global.h"
  10 #include "module.h"
  11 #include "dosexe.h"
  12 #include "miscemu.h"
  13 #include "sig_context.h"
  14 #include "selectors.h"
  15 #include "debugtools.h"
  16
  17 DECLARE_DEBUG_CHANNEL(int)
  18 DECLARE_DEBUG_CHANNEL(io)
  19
  20
  21 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
  22 #define IS_SEL_32(context,seg) \
  23    (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
  24
  25 #define STACK_sig(context) \
  26    (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : (DWORD)SP_sig(context))
  27
  28 #define ADD_STACK_sig(context,offset) \
  29    do { if (IS_SEL_32(context,SS_sig(context))) ESP_sig(context) += (offset); \
  30         else SP_sig(context) += (offset); } while(0)
  31
  32 #define MAKE_PTR(seg,off) \
  33    (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
  34
  35 #define MK_PTR(context,seg,off) \
  36    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
  37                     : MAKE_PTR(seg,off))
  38
  39 #define STACK_PTR(context) \
  40    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
  41     (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
  42      (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
  43
  44 /* For invalid registers fixup */
  45 extern DWORD CallFrom16_Start,CallFrom16_End;
  46 extern DWORD CALLTO16_Start,CALLTO16_End;
  47
  48
  49 /***********************************************************************
  50  *           INSTR_ReplaceSelector
  51  *
  52  * Try to replace an invalid selector by a valid one.
  53  * The only selector where it is allowed to do "mov ax,40;mov es,ax"
  54  * is the so called 'bimodal' selector 0x40, which points to the BIOS
  55  * data segment. Used by (at least) Borland products (and programs compiled
  56  * using Borland products).
  57  *
  58  * See Undocumented Windows, Chapter 5, __0040.
  59  */
  60 static BOOL INSTR_ReplaceSelector( SIGCONTEXT *context, WORD *sel )
  61 {
  62     if ( IS_SELECTOR_SYSTEM(CS_sig(context)) )
  63         if (    ( EIP_sig(context) >= (DWORD)&CallFrom16_Start &&
  64                   EIP_sig(context) <  (DWORD)&CallFrom16_End )
  65              || ( EIP_sig(context) >= (DWORD)&CALLTO16_Start &&
  66                   EIP_sig(context) <  (DWORD)&CALLTO16_End ) )
  67         {
  68             /* Saved selector may have become invalid when the relay code */
  69             /* tries to restore it. We simply clear it. */
  70             *sel = 0;
  71             return TRUE;
  72         }
  73
  74     if (*sel == 0x40)
  75     {
  76         static WORD sys_timer = 0;
  77         if (!sys_timer)
  78             sys_timer = CreateSystemTimer( 55, DOSMEM_Tick );
  79         *sel = DOSMEM_BiosDataSeg;
  80         return TRUE;
  81     }
  82     return FALSE;  /* Can't replace selector, crashdump */
  83 }
  84
  85
  86 /***********************************************************************
  87  *           INSTR_GetOperandAddr
  88  *
  89  * Return the address of an instruction operand (from the mod/rm byte).
  90  */
  91 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
  92                                    int long_addr, int segprefix, int *len )
  93 {
  94     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  95
  96 #define GET_VAL(val,type) \
  97     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  98
  99     *len = 0;
 100     GET_VAL( &mod, BYTE );
 101     rm = mod & 7;
 102     mod >>= 6;
 103
 104     if (mod == 3)
 105     {
 106         switch(rm)
 107         {
 108         case 0: return (BYTE *)&EAX_sig(context);
 109         case 1: return (BYTE *)&ECX_sig(context);
 110         case 2: return (BYTE *)&EDX_sig(context);
 111         case 3: return (BYTE *)&EBX_sig(context);
 112         case 4: return (BYTE *)&ESP_sig(context);
 113         case 5: return (BYTE *)&EBP_sig(context);
 114         case 6: return (BYTE *)&ESI_sig(context);
 115         case 7: return (BYTE *)&EDI_sig(context);
 116         }
 117     }
 118
 119     if (long_addr)
 120     {
 121         if (rm == 4)
 122         {
 123             BYTE sib;
 124             GET_VAL( &sib, BYTE );
 125             rm = sib & 7;
 126             ss = sib >> 6;
 127             switch(sib >> 3)
 128             {
 129             case 0: index = EAX_sig(context); break;
 130             case 1: index = ECX_sig(context); break;
 131             case 2: index = EDX_sig(context); break;
 132             case 3: index = EBX_sig(context); break;
 133             case 4: index = 0; break;
 134             case 5: index = EBP_sig(context); break;
 135             case 6: index = ESI_sig(context); break;
 136             case 7: index = EDI_sig(context); break;
 137             }
 138         }
 139
 140         switch(rm)
 141         {
 142         case 0: base = EAX_sig(context); seg = DS_sig(context); break;
 143         case 1: base = ECX_sig(context); seg = DS_sig(context); break;
 144         case 2: base = EDX_sig(context); seg = DS_sig(context); break;
 145         case 3: base = EBX_sig(context); seg = DS_sig(context); break;
 146         case 4: base = ESP_sig(context); seg = SS_sig(context); break;
 147         case 5: base = EBP_sig(context); seg = SS_sig(context); break;
 148         case 6: base = ESI_sig(context); seg = DS_sig(context); break;
 149         case 7: base = EDI_sig(context); seg = DS_sig(context); break;
 150         }
 151         switch (mod)
 152         {
 153         case 0:
 154             if (rm == 5)  /* special case: ds:(disp32) */
 155             {
 156                 GET_VAL( &base, DWORD );
 157                 seg = DS_sig(context);
 158             }
 159             break;
 160
 161         case 1:  /* 8-bit disp */
 162             GET_VAL( &off, BYTE );
 163             base += (signed char)off;
 164             break;
 165
 166         case 2:  /* 32-bit disp */
 167             GET_VAL( &off, DWORD );
 168             base += (signed long)off;
 169             break;
 170         }
 171     }
 172     else  /* short address */
 173     {
 174         switch(rm)
 175         {
 176         case 0:  /* ds:(bx,si) */
 177             base = BX_sig(context) + SI_sig(context);
 178             seg  = DS_sig(context);
 179             break;
 180         case 1:  /* ds:(bx,di) */
 181             base = BX_sig(context) + DI_sig(context);
 182             seg  = DS_sig(context);
 183             break;
 184         case 2:  /* ss:(bp,si) */
 185             base = BP_sig(context) + SI_sig(context);
 186             seg  = SS_sig(context);
 187             break;
 188         case 3:  /* ss:(bp,di) */
 189             base = BP_sig(context) + DI_sig(context);
 190             seg  = SS_sig(context);
 191             break;
 192         case 4:  /* ds:(si) */
 193             base = SI_sig(context);
 194             seg  = DS_sig(context);
 195             break;
 196         case 5:  /* ds:(di) */
 197             base = DI_sig(context);
 198             seg  = DS_sig(context);
 199             break;
 200         case 6:  /* ss:(bp) */
 201             base = BP_sig(context);
 202             seg  = SS_sig(context);
 203             break;
 204         case 7:  /* ds:(bx) */
 205             base = BX_sig(context);
 206             seg  = DS_sig(context);
 207             break;
 208         }
 209
 210         switch(mod)
 211         {
 212         case 0:
 213             if (rm == 6)  /* special case: ds:(disp16) */
 214             {
 215                 GET_VAL( &base, WORD );
 216                 seg  = DS_sig(context);
 217             }
 218             break;
 219
 220         case 1:  /* 8-bit disp */
 221             GET_VAL( &off, BYTE );
 222             base += (signed char)off;
 223             break;
 224
 225         case 2:  /* 16-bit disp */
 226             GET_VAL( &off, WORD );
 227             base += (signed short)off;
 228             break;
 229         }
 230         base &= 0xffff;
 231     }
 232     if (segprefix != -1) seg = segprefix;
 233
 234     /* Make sure the segment and offset are valid */
 235     if (IS_SELECTOR_SYSTEM(seg)) return (BYTE *)(base + (index << ss));
 236     if (((seg & 7) != 7) || IS_SELECTOR_FREE(seg)) return NULL;
 237     if (GET_SEL_LIMIT(seg) < (base + (index << ss))) return NULL;
 238     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 239 #undef GET_VAL
 240 }
 241
 242
 243 /***********************************************************************
 244  *           INSTR_EmulateLDS
 245  *
 246  * Emulate the LDS (and LES,LFS,etc.) instruction.
 247  */
 248 static BOOL INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
 249                                 int long_addr, int segprefix, int *len )
 250 {
 251     WORD seg;
 252     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 253     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 254                                        long_addr, segprefix, len );
 255     if (!addr)
 256         return FALSE;  /* Unable to emulate it */
 257     seg = *(WORD *)(addr + (long_op ? 4 : 2));
 258
 259     if (!INSTR_ReplaceSelector( context, &seg ))
 260         return FALSE;  /* Unable to emulate it */
 261
 262     /* Now store the offset in the correct register */
 263
 264     switch((*regmodrm >> 3) & 7)
 265     {
 266     case 0:
 267         if (long_op) EAX_sig(context) = *(DWORD *)addr;
 268         else AX_sig(context) = *(WORD *)addr;
 269         break;
 270     case 1:
 271         if (long_op) ECX_sig(context) = *(DWORD *)addr;
 272         else CX_sig(context) = *(WORD *)addr;
 273         break;
 274     case 2:
 275         if (long_op) EDX_sig(context) = *(DWORD *)addr;
 276         else DX_sig(context) = *(WORD *)addr;
 277         break;
 278     case 3:
 279         if (long_op) EBX_sig(context) = *(DWORD *)addr;
 280         else BX_sig(context) = *(WORD *)addr;
 281         break;
 282     case 4:
 283         if (long_op) ESP_sig(context) = *(DWORD *)addr;
 284         else SP_sig(context) = *(WORD *)addr;
 285         break;
 286     case 5:
 287         if (long_op) EBP_sig(context) = *(DWORD *)addr;
 288         else BP_sig(context) = *(WORD *)addr;
 289         break;
 290     case 6:
 291         if (long_op) ESI_sig(context) = *(DWORD *)addr;
 292         else SI_sig(context) = *(WORD *)addr;
 293         break;
 294     case 7:
 295         if (long_op) EDI_sig(context) = *(DWORD *)addr;
 296         else DI_sig(context) = *(WORD *)addr;
 297         break;
 298     }
 299
 300     /* Store the correct segment in the segment register */
 301
 302     switch(*instr)
 303     {
 304     case 0xc4: ES_sig(context) = seg; break;  /* les */
 305     case 0xc5: DS_sig(context) = seg; break;  /* lds */
 306     case 0x0f: switch(instr[1])
 307                {
 308                case 0xb2: SS_sig(context) = seg; break;  /* lss */
 309 #ifdef FS_sig
 310                case 0xb4: FS_sig(context) = seg; break;  /* lfs */
 311 #endif
 312 #ifdef GS_sig
 313                case 0xb5: GS_sig(context) = seg; break;  /* lgs */
 314 #endif
 315                }
 316                break;
 317     }
 318
 319     /* Add the opcode size to the total length */
 320
 321     *len += 1 + (*instr == 0x0f);
 322     return TRUE;
 323 }
 324
 325
 326 /***********************************************************************
 327  *           INSTR_EmulateInstruction
 328  *
 329  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 330  */
 331 BOOL INSTR_EmulateInstruction( SIGCONTEXT *context )
 332 {
 333     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 334     SEGPTR gpHandler;
 335     BYTE *instr;
 336
 337     long_op = long_addr = IS_SEL_32(context,CS_sig(context));
 338     instr = (BYTE *)MK_PTR(context,CS_sig(context),EIP_sig(context));
 339     if (!instr) return FALSE;
 340
 341     /* First handle any possible prefix */
 342
 343     segprefix = -1;  /* no prefix */
 344     prefix = 1;
 345     repX = 0;
 346     prefixlen = 0;
 347     while(prefix)
 348     {
 349         switch(*instr)
 350         {
 351         case 0x2e:
 352             segprefix = CS_sig(context);
 353             break;
 354         case 0x36:
 355             segprefix = SS_sig(context);
 356             break;
 357         case 0x3e:
 358             segprefix = DS_sig(context);
 359             break;
 360         case 0x26:
 361             segprefix = ES_sig(context);
 362             break;
 363 #ifdef FS_sig
 364         case 0x64:
 365             segprefix = FS_sig(context);
 366             break;
 367 #endif
 368 #ifdef GS_sig
 369         case 0x65:
 370             segprefix = GS_sig(context);
 371             break;
 372 #endif
 373         case 0x66:
 374             long_op = !long_op;  /* opcode size prefix */
 375             break;
 376         case 0x67:
 377             long_addr = !long_addr;  /* addr size prefix */
 378             break;
 379         case 0xf0:  /* lock */
 380             break;
 381         case 0xf2:  /* repne */
 382             repX = 1;
 383             break;
 384         case 0xf3:  /* repe */
 385             repX = 2;
 386             break;
 387         default:
 388             prefix = 0;  /* no more prefixes */
 389             break;
 390         }
 391         if (prefix)
 392         {
 393             instr++;
 394             prefixlen++;
 395         }
 396     }
 397
 398     /* Now look at the actual instruction */
 399
 400     switch(*instr)
 401     {
 402         case 0x07: /* pop es */
 403         case 0x17: /* pop ss */
 404         case 0x1f: /* pop ds */
 405             {
 406                 WORD seg = *(WORD *)STACK_PTR( context );
 407                 if (INSTR_ReplaceSelector( context, &seg ))
 408                 {
 409                     switch(*instr)
 410                     {
 411                     case 0x07: ES_sig(context) = seg; break;
 412                     case 0x17: SS_sig(context) = seg; break;
 413                     case 0x1f: DS_sig(context) = seg; break;
 414                     }
 415                     ADD_STACK_sig(context, long_op ? 4 : 2);
 416                     EIP_sig(context) += prefixlen + 1;
 417                     return TRUE;
 418                 }
 419             }
 420             break;  /* Unable to emulate it */
 421
 422         case 0x0f: /* extended instruction */
 423             switch(instr[1])
 424             {
 425             case 0x22: /* mov eax, crX */
 426                 switch (instr[2]) {
 427                 case 0xc0:
 428                         fprintf(stderr,"mov eax,cr0 at 0x%08lx, EAX=0x%08lx\n",
 429                                 EIP_sig(context),EAX_sig(context)
 430                         );
 431                         EIP_sig(context) += prefixlen+3;
 432                         return TRUE;
 433                 default:
 434                         break; /*fallthrough to bad instruction handling */
 435                 }
 436                 break; /*fallthrough to bad instruction handling */
 437             case 0x20: /* mov crX, eax */
 438                 switch (instr[2]) {
 439                 case 0xe0: /* mov cr4, eax */
 440                     /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
 441                      * bit 0: VME       Virtual Mode Exception ?
 442                      * bit 1: PVI       Protected mode Virtual Interrupt
 443                      * bit 2: TSD       Timestamp disable
 444                      * bit 3: DE        Debugging extensions
 445                      * bit 4: PSE       Page size extensions
 446                      * bit 5: PAE   Physical address extension
 447                      * bit 6: MCE       Machine check enable
 448                      * bit 7: PGE   Enable global pages
 449                      * bit 8: PCE       Enable performance counters at IPL3
 450                      */
 451                     fprintf(stderr,"mov cr4,eax at 0x%08lx\n",EIP_sig(context));
 452                     EAX_sig(context) = 0;
 453                     EIP_sig(context) += prefixlen+3;
 454                     return TRUE;
 455                 case 0xc0: /* mov cr0, eax */
 456                     fprintf(stderr,"mov cr0,eax at 0x%08lx\n",EIP_sig(context));
 457                     EAX_sig(context) = 0x10; /* FIXME: set more bits ? */
 458                     EIP_sig(context) += prefixlen+3;
 459                     return TRUE;
 460                 default: /* fallthrough to illegal instruction */
 461                     break;
 462                 }
 463                 /* fallthrough to illegal instruction */
 464                 break;
 465 #ifdef FS_sig
 466             case 0xa1: /* pop fs */
 467                 {
 468                     WORD seg = *(WORD *)STACK_PTR( context );
 469                     if (INSTR_ReplaceSelector( context, &seg ))
 470                     {
 471                         FS_sig(context) = seg;
 472                         ADD_STACK_sig(context, long_op ? 4 : 2);
 473                         EIP_sig(context) += prefixlen + 2;
 474                         return TRUE;
 475                     }
 476                 }
 477                 break;
 478 #endif  /* FS_sig */
 479
 480 #ifdef GS_sig
 481             case 0xa9: /* pop gs */
 482                 {
 483                     WORD seg = *(WORD *)STACK_PTR( context );
 484                     if (INSTR_ReplaceSelector( context, &seg ))
 485                     {
 486                         GS_sig(context) = seg;
 487                         ADD_STACK_sig(context, long_op ? 4 : 2);
 488                         EIP_sig(context) += prefixlen + 2;
 489                         return TRUE;
 490                     }
 491                 }
 492                 break;
 493 #endif  /* GS_sig */
 494
 495             case 0xb2: /* lss addr,reg */
 496 #ifdef FS_sig
 497             case 0xb4: /* lfs addr,reg */
 498 #endif
 499 #ifdef GS_sig
 500             case 0xb5: /* lgs addr,reg */
 501 #endif
 502                 if (INSTR_EmulateLDS( context, instr, long_op,
 503                                       long_addr, segprefix, &len ))
 504                 {
 505                     EIP_sig(context) += prefixlen + len;
 506                     return TRUE;
 507                 }
 508                 break;
 509             }
 510             break;  /* Unable to emulate it */
 511
 512         case 0x6c: /* insb     */
 513         case 0x6d: /* insw/d   */
 514         case 0x6e: /* outsb    */
 515         case 0x6f: /* outsw/d  */
 516             {
 517               int typ = *instr;  /* Just in case it's overwritten.  */
 518               int outp = (typ >= 0x6e);
 519               unsigned long count = repX ?
 520                           (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
 521               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 522               int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
 523               int seg = outp ? DS_sig(context) : ES_sig(context);  /* FIXME: is this right? */
 524
 525               if (outp)
 526                 /* FIXME: Check segment readable.  */
 527                 (void)0;
 528               else
 529                 /* FIXME: Check segment writeable.  */
 530                 (void)0;
 531
 532               if (repX)
 533               {
 534                 if (long_addr)
 535                   ECX_sig(context) = 0;
 536                 else
 537                   CX_sig(context) = 0;
 538               }
 539
 540               while (count-- > 0)
 541                 {
 542                   void *data;
 543                   if (outp)
 544                   {
 545                       data = MK_PTR(context, seg,
 546                                long_addr ? ESI_sig(context) : SI_sig(context));
 547                       if (long_addr) ESI_sig(context) += step;
 548                       else SI_sig(context) += step;
 549                   }
 550                   else
 551                   {
 552                       data = MK_PTR(context, seg,
 553                                long_addr ? EDI_sig(context) : DI_sig(context));
 554                       if (long_addr) EDI_sig(context) += step;
 555                       else DI_sig(context) += step;
 556                   }
 557
 558                   switch (typ)
 559                   {
 560                     case 0x6c:
 561                       *((BYTE *)data) = IO_inport( DX_sig(context), 1);
 562                       TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 563                         *((BYTE *)data), CS_sig(context), IP_sig(context));
 564                       break;
 565                     case 0x6d:
 566                       if (long_op)
 567                       {
 568                         *((DWORD *)data) = IO_inport( DX_sig(context), 4);
 569                         TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 570                           *((DWORD *)data), CS_sig(context), IP_sig(context));
 571                       }
 572                       else
 573                       {
 574                         *((WORD *)data) = IO_inport( DX_sig(context), 2);
 575                         TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 576                           *((WORD *)data), CS_sig(context), IP_sig(context));
 577                       }
 578                       break;
 579                     case 0x6e:
 580                         IO_outport( DX_sig(context), 1, *((BYTE *)data));
 581                         TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 582                           *((BYTE *)data), CS_sig(context), IP_sig(context));
 583                         break;
 584                     case 0x6f:
 585                         if (long_op)
 586                         {
 587                             IO_outport( DX_sig(context), 4, *((DWORD *)data));
 588                             TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 589                               *((DWORD *)data), CS_sig(context), IP_sig(context));
 590                         }
 591                         else
 592                         {
 593                             IO_outport( DX_sig(context), 2, *((WORD *)data));
 594                             TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 595                               *((WORD *)data), CS_sig(context), IP_sig(context));
 596                         }
 597                         break;
 598                     }
 599                 }
 600               EIP_sig(context) += prefixlen + 1;
 601             }
 602             return TRUE;
 603
 604         case 0x8e: /* mov XX,segment_reg */
 605             {
 606                 WORD seg;
 607                 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
 608                                                   long_addr, segprefix, &len );
 609                 if (!addr)
 610                     break;  /* Unable to emulate it */
 611                 seg = *(WORD *)addr;
 612                 if (!INSTR_ReplaceSelector( context, &seg ))
 613                     break;  /* Unable to emulate it */
 614
 615                 switch((instr[1] >> 3) & 7)
 616                 {
 617                 case 0:
 618                     ES_sig(context) = seg;
 619                     EIP_sig(context) += prefixlen + len + 1;
 620                     return TRUE;
 621                 case 1:  /* cs */
 622                     break;
 623                 case 2:
 624                     SS_sig(context) = seg;
 625                     EIP_sig(context) += prefixlen + len + 1;
 626                     return TRUE;
 627                 case 3:
 628                     DS_sig(context) = seg;
 629                     EIP_sig(context) += prefixlen + len + 1;
 630                     return TRUE;
 631                 case 4:
 632 #ifdef FS_sig
 633                     FS_sig(context) = seg;
 634                     EIP_sig(context) += prefixlen + len + 1;
 635                     return TRUE;
 636 #endif
 637                 case 5:
 638 #ifdef GS_sig
 639                     GS_sig(context) = seg;
 640                     EIP_sig(context) += prefixlen + len + 1;
 641                     return TRUE;
 642 #endif
 643                 case 6:  /* unused */
 644                 case 7:  /* unused */
 645                     break;
 646                 }
 647             }
 648             break;  /* Unable to emulate it */
 649
 650         case 0xc4: /* les addr,reg */
 651         case 0xc5: /* lds addr,reg */
 652             if (INSTR_EmulateLDS( context, instr, long_op,
 653                                   long_addr, segprefix, &len ))
 654             {
 655                 EIP_sig(context) += prefixlen + len;
 656                 return TRUE;
 657             }
 658             break;  /* Unable to emulate it */
 659
 660         case 0xcd: /* int <XX> */
 661             if (long_op)
 662             {
 663                 ERR_(int)("int xx from 32-bit code is not supported.\n");
 664                 break;  /* Unable to emulate it */
 665             }
 666             else
 667             {
 668                 FARPROC16 addr = INT_GetPMHandler( instr[1] );
 669                 WORD *stack = (WORD *)STACK_PTR( context );
 670                 /* Push the flags and return address on the stack */
 671                 *(--stack) = FL_sig(context);
 672                 *(--stack) = CS_sig(context);
 673                 *(--stack) = IP_sig(context) + prefixlen + 2;
 674                 ADD_STACK_sig(context, -3 * sizeof(WORD));
 675                 /* Jump to the interrupt handler */
 676                 CS_sig(context)  = HIWORD(addr);
 677                 EIP_sig(context) = LOWORD(addr);
 678             }
 679             return TRUE;
 680
 681         case 0xcf: /* iret */
 682             if (long_op)
 683             {
 684                 DWORD *stack = (DWORD *)STACK_PTR( context );
 685                 EIP_sig(context) = *stack++;
 686                 CS_sig(context)  = *stack++;
 687                 EFL_sig(context) = *stack;
 688                 ADD_STACK_sig(context, 3*sizeof(DWORD));  /* Pop the return address and flags */
 689             }
 690             else
 691             {
 692                 WORD *stack = (WORD *)STACK_PTR( context );
 693                 EIP_sig(context) = *stack++;
 694                 CS_sig(context)  = *stack++;
 695                 FL_sig(context)  = *stack;
 696                 ADD_STACK_sig(context, 3*sizeof(WORD));  /* Pop the return address and flags */
 697             }
 698             return TRUE;
 699
 700         case 0xe4: /* inb al,XX */
 701             AL_sig(context) = IO_inport( instr[1], 1 );
 702             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", instr[1],
 703                 AL_sig(context), CS_sig(context), IP_sig(context));
 704             EIP_sig(context) += prefixlen + 2;
 705             return TRUE;
 706
 707         case 0xe5: /* in (e)ax,XX */
 708             if (long_op)
 709             {
 710                 EAX_sig(context) = IO_inport( instr[1], 4 );
 711                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", instr[1],
 712                     EAX_sig(context), CS_sig(context), IP_sig(context));
 713             }
 714             else
 715             {
 716                 AX_sig(context) = IO_inport( instr[1], 2 );
 717                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", instr[1],
 718                     AX_sig(context), CS_sig(context), IP_sig(context));
 719             }
 720             EIP_sig(context) += prefixlen + 2;
 721             return TRUE;
 722
 723         case 0xe6: /* outb XX,al */
 724             IO_outport( instr[1], 1, AL_sig(context) );
 725             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", instr[1],
 726                 AL_sig(context), CS_sig(context), IP_sig(context));
 727             EIP_sig(context) += prefixlen + 2;
 728             return TRUE;
 729
 730         case 0xe7: /* out XX,(e)ax */
 731             if (long_op)
 732             {
 733                 IO_outport( instr[1], 4, EAX_sig(context) );
 734                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", instr[1],
 735                     EAX_sig(context), CS_sig(context), IP_sig(context));
 736             }
 737             else
 738             {
 739                 IO_outport( instr[1], 2, AX_sig(context) );
 740                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", instr[1],
 741                     AX_sig(context), CS_sig(context), IP_sig(context));
 742             }
 743             EIP_sig(context) += prefixlen + 2;
 744             return TRUE;
 745
 746         case 0xec: /* inb al,dx */
 747             AL_sig(context) = IO_inport( DX_sig(context), 1 );
 748             TRACE_(io)("0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 749                 AL_sig(context), CS_sig(context), IP_sig(context));
 750             EIP_sig(context) += prefixlen + 1;
 751             return TRUE;
 752
 753         case 0xed: /* in (e)ax,dx */
 754             if (long_op)
 755             {
 756                 EAX_sig(context) = IO_inport( DX_sig(context), 4 );
 757                 TRACE_(io)("0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 758                     EAX_sig(context), CS_sig(context), IP_sig(context));
 759             }
 760             else
 761             {
 762                 AX_sig(context) = IO_inport( DX_sig(context), 2 );
 763                 TRACE_(io)("0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 764                     AX_sig(context), CS_sig(context), IP_sig(context));
 765             }
 766             EIP_sig(context) += prefixlen + 1;
 767             return TRUE;
 768
 769         case 0xee: /* outb dx,al */
 770             IO_outport( DX_sig(context), 1, AL_sig(context) );
 771             TRACE_(io)("0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 772                 AL_sig(context), CS_sig(context), IP_sig(context));
 773             EIP_sig(context) += prefixlen + 1;
 774             return TRUE;
 775
 776         case 0xef: /* out dx,(e)ax */
 777             if (long_op)
 778             {
 779                 IO_outport( DX_sig(context), 4, EAX_sig(context) );
 780                 TRACE_(io)("0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 781                     EAX_sig(context), CS_sig(context), IP_sig(context));
 782             }
 783             else
 784             {
 785                 IO_outport( DX_sig(context), 2, AX_sig(context) );
 786                 TRACE_(io)("0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 787                     AX_sig(context), CS_sig(context), IP_sig(context));
 788             }
 789             EIP_sig(context) += prefixlen + 1;
 790             return TRUE;
 791
 792         case 0xfa: /* cli, ignored */
 793             EIP_sig(context) += prefixlen + 1;
 794             return TRUE;
 795
 796         case 0xfb: /* sti, ignored */
 797             EIP_sig(context) += prefixlen + 1;
 798             return TRUE;
 799     }
 800
 801
 802     /* Check for Win16 __GP handler */
 803     gpHandler = HasGPHandler16( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context),
 804                                                      EIP_sig(context) ) );
 805     if (gpHandler)
 806     {
 807         WORD *stack = (WORD *)STACK_PTR( context );
 808         *--stack = CS_sig(context);
 809         *--stack = EIP_sig(context);
 810         ADD_STACK_sig(context, -2*sizeof(WORD));
 811
 812         CS_sig(context) = SELECTOROF( gpHandler );
 813         EIP_sig(context) = OFFSETOF( gpHandler );
 814         return TRUE;
 815     }
 816
 817     MESSAGE("Unexpected Windows program segfault"
 818                     " - opcode = %x\n", *instr);
 819     return FALSE;  /* Unable to emulate it */
 820 }