Release 970202
[wine/multimedia.git] / miscemu / instr.c
blob0d50be603222f6ab833786413504170014dd9004
1 /*
2 * Emulation of priviledged instructions
4 * Copyright 1995 Alexandre Julliard
5 */
7 #include <stdio.h>
8 #include "windows.h"
9 #include "ldt.h"
10 #include "miscemu.h"
11 #include "sigcontext.h"
14 #define STACK_sig(context) \
15 ((GET_SEL_FLAGS(SS_sig(context)) & LDT_FLAGS_32BIT) ? \
16 ESP_sig(context) : SP_sig(context))
18 #define STACK_PTR(context) \
19 (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))
21 /***********************************************************************
22 * INSTR_ReplaceSelector
24 * Try to replace an invalid selector by a valid one.
25 * For now, only selector 0x40 is handled here.
27 static WORD INSTR_ReplaceSelector( SIGCONTEXT *context, WORD sel)
29 if (sel == 0x40)
31 extern void SIGNAL_StartBIOSTimer(void);
32 fprintf( stderr, "Direct access to segment 0x40 (cs:ip=%04x:%04lx).\n",
33 CS_sig(context), EIP_sig(context) );
34 SIGNAL_StartBIOSTimer();
35 return DOSMEM_BiosSeg;
37 return 0; /* Can't replace selector */
41 /***********************************************************************
42 * INSTR_GetOperandAddr
44 * Return the address of an instruction operand (from the mod/rm byte).
46 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
47 int long_addr, int segprefix, int *len )
49 int mod, rm, base, index = 0, ss = 0, seg = 0, off;
51 #define GET_VAL(val,type) \
52 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
54 *len = 0;
55 GET_VAL( &mod, BYTE );
56 rm = mod & 7;
57 mod >>= 6;
59 if (mod == 3)
61 switch(rm)
63 case 0: return (BYTE *)&EAX_sig(context);
64 case 1: return (BYTE *)&ECX_sig(context);
65 case 2: return (BYTE *)&EDX_sig(context);
66 case 3: return (BYTE *)&EBX_sig(context);
67 case 4: return (BYTE *)&ESP_sig(context);
68 case 5: return (BYTE *)&EBP_sig(context);
69 case 6: return (BYTE *)&ESI_sig(context);
70 case 7: return (BYTE *)&EDI_sig(context);
74 if (long_addr)
76 if (rm == 4)
78 BYTE sib;
79 GET_VAL( &sib, BYTE );
80 rm = sib & 7;
81 ss = sib >> 6;
82 switch(sib >> 3)
84 case 0: index = EAX_sig(context); break;
85 case 1: index = ECX_sig(context); break;
86 case 2: index = EDX_sig(context); break;
87 case 3: index = EBX_sig(context); break;
88 case 4: index = 0; break;
89 case 5: index = EBP_sig(context); break;
90 case 6: index = ESI_sig(context); break;
91 case 7: index = EDI_sig(context); break;
95 switch(rm)
97 case 0: base = EAX_sig(context); seg = DS_sig(context); break;
98 case 1: base = ECX_sig(context); seg = DS_sig(context); break;
99 case 2: base = EDX_sig(context); seg = DS_sig(context); break;
100 case 3: base = EBX_sig(context); seg = DS_sig(context); break;
101 case 4: base = ESP_sig(context); seg = SS_sig(context); break;
102 case 5: base = EBP_sig(context); seg = SS_sig(context); break;
103 case 6: base = ESI_sig(context); seg = DS_sig(context); break;
104 case 7: base = EDI_sig(context); seg = DS_sig(context); break;
106 switch (mod)
108 case 0:
109 if (rm == 5) /* special case: ds:(disp32) */
111 GET_VAL( &base, DWORD );
112 seg = DS_sig(context);
114 break;
116 case 1: /* 8-bit disp */
117 GET_VAL( &off, BYTE );
118 base += (signed char)off;
119 break;
121 case 2: /* 32-bit disp */
122 GET_VAL( &off, DWORD );
123 base += (signed long)off;
124 break;
127 else /* short address */
129 switch(rm)
131 case 0: /* ds:(bx,si) */
132 base = BX_sig(context) + SI_sig(context);
133 seg = DS_sig(context);
134 break;
135 case 1: /* ds:(bx,di) */
136 base = BX_sig(context) + DI_sig(context);
137 seg = DS_sig(context);
138 break;
139 case 2: /* ss:(bp,si) */
140 base = BP_sig(context) + SI_sig(context);
141 seg = SS_sig(context);
142 break;
143 case 3: /* ss:(bp,di) */
144 base = BP_sig(context) + DI_sig(context);
145 seg = SS_sig(context);
146 break;
147 case 4: /* ds:(si) */
148 base = SI_sig(context);
149 seg = DS_sig(context);
150 break;
151 case 5: /* ds:(di) */
152 base = DI_sig(context);
153 seg = DS_sig(context);
154 break;
155 case 6: /* ss:(bp) */
156 base = BP_sig(context);
157 seg = SS_sig(context);
158 break;
159 case 7: /* ds:(bx) */
160 base = BX_sig(context);
161 seg = DS_sig(context);
162 break;
165 switch(mod)
167 case 0:
168 if (rm == 6) /* special case: ds:(disp16) */
170 GET_VAL( &base, WORD );
171 seg = DS_sig(context);
173 break;
175 case 1: /* 8-bit disp */
176 GET_VAL( &off, BYTE );
177 base += (signed char)off;
178 break;
180 case 2: /* 16-bit disp */
181 GET_VAL( &off, WORD );
182 base += (signed short)off;
183 break;
185 base &= 0xffff;
187 if (segprefix != -1) seg = segprefix;
189 /* FIXME: should check limit of the segment here */
190 return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
191 #undef GET_VAL
195 /***********************************************************************
196 * INSTR_EmulateLDS
198 * Emulate the LDS (and LES,LFS,etc.) instruction.
200 static BOOL32 INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
201 int long_addr, int segprefix, int *len )
203 WORD seg;
204 BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
205 BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
206 long_addr, segprefix, len );
207 if (!addr)
208 return FALSE; /* Unable to emulate it */
209 seg = *(WORD *)(addr + (long_op ? 4 : 2));
211 if (!(seg = INSTR_ReplaceSelector( context, seg )))
212 return FALSE; /* Unable to emulate it */
214 /* Now store the offset in the correct register */
216 switch((*regmodrm >> 3) & 7)
218 case 0:
219 if (long_op) EAX_sig(context) = *(DWORD *)addr;
220 else AX_sig(context) = *(WORD *)addr;
221 break;
222 case 1:
223 if (long_op) ECX_sig(context) = *(DWORD *)addr;
224 else CX_sig(context) = *(WORD *)addr;
225 break;
226 case 2:
227 if (long_op) EDX_sig(context) = *(DWORD *)addr;
228 else DX_sig(context) = *(WORD *)addr;
229 break;
230 case 3:
231 if (long_op) EBX_sig(context) = *(DWORD *)addr;
232 else BX_sig(context) = *(WORD *)addr;
233 break;
234 case 4:
235 if (long_op) ESP_sig(context) = *(DWORD *)addr;
236 else SP_sig(context) = *(WORD *)addr;
237 break;
238 case 5:
239 if (long_op) EBP_sig(context) = *(DWORD *)addr;
240 else BP_sig(context) = *(WORD *)addr;
241 break;
242 case 6:
243 if (long_op) ESI_sig(context) = *(DWORD *)addr;
244 else SI_sig(context) = *(WORD *)addr;
245 break;
246 case 7:
247 if (long_op) EDI_sig(context) = *(DWORD *)addr;
248 else DI_sig(context) = *(WORD *)addr;
249 break;
252 /* Store the correct segment in the segment register */
254 switch(*instr)
256 case 0xc4: ES_sig(context) = seg; break; /* les */
257 case 0xc5: DS_sig(context) = seg; break; /* lds */
258 case 0x0f: switch(instr[1])
260 case 0xb2: SS_sig(context) = seg; break; /* lss */
261 #ifdef FS_sig
262 case 0xb4: FS_sig(context) = seg; break; /* lfs */
263 #endif
264 #ifdef GS_sig
265 case 0xb5: GS_sig(context) = seg; break; /* lgs */
266 #endif
268 break;
271 /* Add the opcode size to the total length */
273 *len += 1 + (*instr == 0x0f);
274 return TRUE;
278 /***********************************************************************
279 * INSTR_EmulateInstruction
281 * Emulate a priviledged instruction. Returns TRUE if emulation successful.
283 BOOL32 INSTR_EmulateInstruction( SIGCONTEXT *context )
285 int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
286 BYTE *instr;
288 long_op = long_addr = (GET_SEL_FLAGS(CS_sig(context)) & LDT_FLAGS_32BIT) != 0;
289 instr = (BYTE *) PTR_SEG_OFF_TO_LIN( CS_sig(context), EIP_sig(context) );
291 /* First handle any possible prefix */
293 segprefix = -1; /* no prefix */
294 prefix = 1;
295 repX = 0;
296 prefixlen = 0;
297 while(prefix)
299 switch(*instr)
301 case 0x2e:
302 segprefix = CS_sig(context);
303 break;
304 case 0x36:
305 segprefix = SS_sig(context);
306 break;
307 case 0x3e:
308 segprefix = DS_sig(context);
309 break;
310 case 0x26:
311 segprefix = ES_sig(context);
312 break;
313 #ifdef FS_sig
314 case 0x64:
315 segprefix = FS_sig(context);
316 break;
317 #endif
318 #ifdef GS_sig
319 case 0x65:
320 segprefix = GS_sig(context);
321 break;
322 #endif
323 case 0x66:
324 long_op = !long_op; /* opcode size prefix */
325 break;
326 case 0x67:
327 long_addr = !long_addr; /* addr size prefix */
328 break;
329 case 0xf0: /* lock */
330 break;
331 case 0xf2: /* repne */
332 repX = 1;
333 break;
334 case 0xf3: /* repe */
335 repX = 2;
336 break;
337 default:
338 prefix = 0; /* no more prefixes */
339 break;
341 if (prefix)
343 instr++;
344 prefixlen++;
348 /* Now look at the actual instruction */
350 switch(*instr)
352 case 0x07: /* pop es */
353 case 0x17: /* pop ss */
354 case 0x1f: /* pop ds */
356 WORD seg = *(WORD *)STACK_PTR( context );
357 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
359 switch(*instr)
361 case 0x07: ES_sig(context) = seg; break;
362 case 0x17: SS_sig(context) = seg; break;
363 case 0x1f: DS_sig(context) = seg; break;
365 STACK_sig(context) += long_op ? 4 : 2;
366 EIP_sig(context) += prefixlen + 1;
367 return TRUE;
370 break; /* Unable to emulate it */
372 case 0x0f: /* extended instruction */
373 switch(instr[1])
375 #ifdef FS_sig
376 case 0xa1: /* pop fs */
378 WORD seg = *(WORD *)STACK_PTR( context );
379 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
381 FS_sig(context) = seg;
382 STACK_sig(context) += long_op ? 4 : 2;
383 EIP_sig(context) += prefixlen + 2;
384 return TRUE;
387 break;
388 #endif /* FS_sig */
390 #ifdef GS_sig
391 case 0xa9: /* pop gs */
393 WORD seg = *(WORD *)STACK_PTR( context );
394 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
396 GS_sig(context) = seg;
397 STACK_sig(context) += long_op ? 4 : 2;
398 EIP_sig(context) += prefixlen + 2;
399 return TRUE;
402 break;
403 #endif /* GS_sig */
405 case 0xb2: /* lss addr,reg */
406 #ifdef FS_sig
407 case 0xb4: /* lfs addr,reg */
408 #endif
409 #ifdef GS_sig
410 case 0xb5: /* lgs addr,reg */
411 #endif
412 if (INSTR_EmulateLDS( context, instr, long_op,
413 long_addr, segprefix, &len ))
415 EIP_sig(context) += prefixlen + len;
416 return TRUE;
418 break;
420 break; /* Unable to emulate it */
422 case 0x6c: /* insb */
423 case 0x6d: /* insw/d */
424 case 0x6e: /* outsb */
425 case 0x6f: /* outsw/d */
427 int typ = *instr; /* Just in case it's overwritten. */
428 int outp = (typ >= 0x6e);
429 unsigned long count = repX ?
430 (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
431 int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
432 int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
433 int seg = outp ? DS_sig(context) : ES_sig(context); /* FIXME: is this right? */
435 if (outp)
436 /* FIXME: Check segment readable. */
437 (void)0;
438 else
439 /* FIXME: Check segment writeable. */
440 (void)0;
442 if (repX)
443 if (long_addr)
444 ECX_sig(context) = 0;
445 else
446 CX_sig(context) = 0;
448 while (count-- > 0)
450 void *data;
451 if (outp)
453 data = PTR_SEG_OFF_TO_LIN (seg,
454 long_addr ? ESI_sig(context) : SI_sig(context));
455 if (long_addr) ESI_sig(context) += step;
456 else SI_sig(context) += step;
458 else
460 data = PTR_SEG_OFF_TO_LIN (seg,
461 long_addr ? EDI_sig(context) : DI_sig(context));
462 if (long_addr) EDI_sig(context) += step;
463 else DI_sig(context) += step;
466 switch (typ)
468 case 0x6c:
469 *((BYTE *)data) = IO_inport( DX_sig(context), 1);
470 break;
471 case 0x6d:
472 if (long_op)
473 *((DWORD *)data) = IO_inport( DX_sig(context), 4);
474 else
475 *((WORD *)data) = IO_inport( DX_sig(context), 2);
476 break;
477 case 0x6e:
478 IO_outport( DX_sig(context), 1, *((BYTE *)data));
479 break;
480 case 0x6f:
481 if (long_op)
482 IO_outport( DX_sig(context), 4, *((DWORD *)data));
483 else
484 IO_outport( DX_sig(context), 2, *((WORD *)data));
485 break;
488 EIP_sig(context) += prefixlen + 1;
490 return TRUE;
492 case 0x8e: /* mov XX,segment_reg */
494 WORD seg;
495 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
496 long_addr, segprefix, &len );
497 if (!addr)
498 break; /* Unable to emulate it */
499 seg = *(WORD *)addr;
500 if (!(seg = INSTR_ReplaceSelector( context, seg )))
501 break; /* Unable to emulate it */
503 switch((instr[1] >> 3) & 7)
505 case 0:
506 ES_sig(context) = seg;
507 EIP_sig(context) += prefixlen + len + 1;
508 return TRUE;
509 case 1: /* cs */
510 break;
511 case 2:
512 SS_sig(context) = seg;
513 EIP_sig(context) += prefixlen + len + 1;
514 return TRUE;
515 case 3:
516 DS_sig(context) = seg;
517 EIP_sig(context) += prefixlen + len + 1;
518 return TRUE;
519 case 4:
520 #ifdef FS_sig
521 FS_sig(context) = seg;
522 EIP_sig(context) += prefixlen + len + 1;
523 return TRUE;
524 #endif
525 case 5:
526 #ifdef GS_sig
527 GS_sig(context) = seg;
528 EIP_sig(context) += prefixlen + len + 1;
529 return TRUE;
530 #endif
531 case 6: /* unused */
532 case 7: /* unused */
533 break;
536 break; /* Unable to emulate it */
538 case 0xc4: /* les addr,reg */
539 case 0xc5: /* lds addr,reg */
540 if (INSTR_EmulateLDS( context, instr, long_op,
541 long_addr, segprefix, &len ))
543 EIP_sig(context) += prefixlen + len;
544 return TRUE;
546 break; /* Unable to emulate it */
548 case 0xcd: /* int <XX> */
549 if (long_op)
551 fprintf(stderr, "int xx from 32-bit code is not supported.\n");
552 break; /* Unable to emulate it */
554 else
556 FARPROC16 addr = INT_GetHandler( instr[1] );
557 WORD *stack = (WORD *)STACK_PTR( context );
558 /* Push the flags and return address on the stack */
559 *(--stack) = FL_sig(context);
560 *(--stack) = CS_sig(context);
561 *(--stack) = IP_sig(context) + prefixlen + 2;
562 STACK_sig(context) -= 3 * sizeof(WORD);
563 /* Jump to the interrupt handler */
564 CS_sig(context) = HIWORD(addr);
565 EIP_sig(context) = LOWORD(addr);
567 return TRUE;
569 case 0xcf: /* iret */
570 if (long_op)
572 DWORD *stack = (DWORD *)STACK_PTR( context );
573 EIP_sig(context) = *stack++;
574 CS_sig(context) = *stack++;
575 EFL_sig(context) = *stack;
576 STACK_sig(context) += 3*sizeof(DWORD); /* Pop the return address and flags */
578 else
580 WORD *stack = (WORD *)STACK_PTR( context );
581 EIP_sig(context) = *stack++;
582 CS_sig(context) = *stack++;
583 FL_sig(context) = *stack;
584 STACK_sig(context) += 3*sizeof(WORD); /* Pop the return address and flags */
586 return TRUE;
588 case 0xe4: /* inb al,XX */
589 AL_sig(context) = IO_inport( instr[1], 1 );
590 EIP_sig(context) += prefixlen + 2;
591 return TRUE;
593 case 0xe5: /* in (e)ax,XX */
594 if (long_op) EAX_sig(context) = IO_inport( instr[1], 4 );
595 else AX_sig(context) = IO_inport( instr[1], 2 );
596 EIP_sig(context) += prefixlen + 2;
597 return TRUE;
599 case 0xe6: /* outb XX,al */
600 IO_outport( instr[1], 1, AL_sig(context) );
601 EIP_sig(context) += prefixlen + 2;
602 return TRUE;
604 case 0xe7: /* out XX,(e)ax */
605 if (long_op) IO_outport( instr[1], 4, EAX_sig(context) );
606 else IO_outport( instr[1], 2, AX_sig(context) );
607 EIP_sig(context) += prefixlen + 2;
608 return TRUE;
610 case 0xec: /* inb al,dx */
611 AL_sig(context) = IO_inport( DX_sig(context), 1 );
612 EIP_sig(context) += prefixlen + 1;
613 return TRUE;
615 case 0xed: /* in (e)ax,dx */
616 if (long_op) EAX_sig(context) = IO_inport( DX_sig(context), 4 );
617 else AX_sig(context) = IO_inport( DX_sig(context), 2 );
618 EIP_sig(context) += prefixlen + 1;
619 return TRUE;
621 case 0xee: /* outb dx,al */
622 IO_outport( DX_sig(context), 1, AL_sig(context) );
623 EIP_sig(context) += prefixlen + 1;
624 return TRUE;
626 case 0xef: /* out dx,(e)ax */
627 if (long_op) IO_outport( DX_sig(context), 4, EAX_sig(context) );
628 else IO_outport( DX_sig(context), 2, AX_sig(context) );
629 EIP_sig(context) += prefixlen + 1;
630 return TRUE;
632 case 0xfa: /* cli, ignored */
633 EIP_sig(context) += prefixlen + 1;
634 return TRUE;
636 case 0xfb: /* sti, ignored */
637 EIP_sig(context) += prefixlen + 1;
638 return TRUE;
640 fprintf(stderr, "Unexpected Windows program segfault"
641 " - opcode = %x\n", *instr);
642 return FALSE; /* Unable to emulate it */