msvcr90/tests: Fix the type info test for 64-bit.
[wine.git] / programs / winedbg / be_x86_64.c
blob253b4ac781c649d63760e8757a4c2b0db4a80e0c
1 /*
2 * Debugger x86_64 specific functions
4 * Copyright 2004 Vincent BĂ©ron
5 * Copyright 2009 Eric Pouech
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
22 #include "debugger.h"
23 #include "wine/debug.h"
25 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
27 #if defined(__x86_64__)
29 #define STEP_FLAG 0x00000100 /* single step flag */
31 static unsigned be_x86_64_get_addr(HANDLE hThread, const CONTEXT* ctx,
32 enum be_cpu_addr bca, ADDRESS64* addr)
34 addr->Mode = AddrModeFlat;
35 switch (bca)
37 case be_cpu_addr_pc:
38 addr->Segment = ctx->SegCs;
39 addr->Offset = ctx->Rip;
40 return TRUE;
41 case be_cpu_addr_stack:
42 addr->Segment = ctx->SegSs;
43 addr->Offset = ctx->Rsp;
44 return TRUE;
45 case be_cpu_addr_frame:
46 addr->Segment = ctx->SegSs;
47 addr->Offset = ctx->Rbp;
48 return TRUE;
49 default:
50 addr->Mode = -1;
51 return FALSE;
55 static unsigned be_x86_64_get_register_info(int regno, enum be_cpu_addr* kind)
57 /* this is true when running in 32bit mode... and wrong in 64 :-/ */
58 switch (regno)
60 case CV_AMD64_RIP: *kind = be_cpu_addr_pc; return TRUE;
61 case CV_AMD64_EBP: *kind = be_cpu_addr_frame; return TRUE;
62 case CV_AMD64_ESP: *kind = be_cpu_addr_stack; return TRUE;
64 return FALSE;
67 static void be_x86_64_single_step(CONTEXT* ctx, unsigned enable)
69 if (enable) ctx->EFlags |= STEP_FLAG;
70 else ctx->EFlags &= ~STEP_FLAG;
73 static void be_x86_64_print_context(HANDLE hThread, const CONTEXT* ctx,
74 int all_regs)
76 static const char mxcsr_flags[16][4] = { "IE", "DE", "ZE", "OE", "UE", "PE", "DAZ", "IM",
77 "DM", "ZM", "OM", "UM", "PM", "R-", "R+", "FZ" };
78 static const char flags[] = "aVR-N--ODITSZ-A-P-C";
79 char buf[33];
80 int i;
82 strcpy(buf, flags);
83 for (i = 0; buf[i]; i++)
84 if (buf[i] != '-' && !(ctx->EFlags & (1 << (sizeof(flags) - 2 - i))))
85 buf[i] = ' ';
87 dbg_printf("Register dump:\n");
88 dbg_printf(" rip:%016lx rsp:%016lx rbp:%016lx eflags:%08x (%s)\n",
89 ctx->Rip, ctx->Rsp, ctx->Rbp, ctx->EFlags, buf);
90 dbg_printf(" rax:%016lx rbx:%016lx rcx:%016lx rdx:%016lx\n",
91 ctx->Rax, ctx->Rbx, ctx->Rcx, ctx->Rdx);
92 dbg_printf(" rsi:%016lx rdi:%016lx r8:%016lx r9:%016lx r10:%016lx\n",
93 ctx->Rsi, ctx->Rdi, ctx->R8, ctx->R9, ctx->R10 );
94 dbg_printf(" r11:%016lx r12:%016lx r13:%016lx r14:%016lx r15:%016lx\n",
95 ctx->R11, ctx->R12, ctx->R13, ctx->R14, ctx->R15 );
97 if (!all_regs) return;
99 dbg_printf(" cs:%04x ds:%04x es:%04x fs:%04x gs:%04x ss:%04x\n",
100 ctx->SegCs, ctx->SegDs, ctx->SegEs, ctx->SegFs, ctx->SegGs, ctx->SegSs );
102 dbg_printf("Debug:\n");
103 dbg_printf(" dr0:%016lx dr1:%016lx dr2:%016lx dr3:%016lx\n",
104 ctx->Dr0, ctx->Dr1, ctx->Dr2, ctx->Dr3 );
105 dbg_printf(" dr6:%016lx dr7:%016lx\n", ctx->Dr6, ctx->Dr7 );
107 dbg_printf("Floating point:\n");
108 dbg_printf(" flcw:%04x ", LOWORD(ctx->u.FltSave.ControlWord));
109 dbg_printf(" fltw:%04x ", LOWORD(ctx->u.FltSave.TagWord));
110 dbg_printf(" flsw:%04x", LOWORD(ctx->u.FltSave.StatusWord));
112 dbg_printf("(cc:%d%d%d%d", (ctx->u.FltSave.StatusWord & 0x00004000) >> 14,
113 (ctx->u.FltSave.StatusWord & 0x00000400) >> 10,
114 (ctx->u.FltSave.StatusWord & 0x00000200) >> 9,
115 (ctx->u.FltSave.StatusWord & 0x00000100) >> 8);
117 dbg_printf(" top:%01x", (unsigned int) (ctx->u.FltSave.StatusWord & 0x00003800) >> 11);
119 if (ctx->u.FltSave.StatusWord & 0x00000001) /* Invalid Fl OP */
121 if (ctx->u.FltSave.StatusWord & 0x00000040) /* Stack Fault */
123 if (ctx->u.FltSave.StatusWord & 0x00000200) /* C1 says Overflow */
124 dbg_printf(" #IE(Stack Overflow)");
125 else
126 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
128 else dbg_printf(" #IE(Arithmetic error)"); /* Invalid Fl OP */
130 if (ctx->u.FltSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
131 if (ctx->u.FltSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
132 if (ctx->u.FltSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
133 if (ctx->u.FltSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
134 if (ctx->u.FltSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
135 if (ctx->u.FltSave.StatusWord & 0x00000040)
136 if (!(ctx->u.FltSave.StatusWord & 0x00000001))
137 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
138 if (ctx->u.FltSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
139 if (ctx->u.FltSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
140 dbg_printf(")\n");
141 dbg_printf(" flerr:%04x:%08x fldata:%04x:%08x\n",
142 ctx->u.FltSave.ErrorSelector, ctx->u.FltSave.ErrorOffset,
143 ctx->u.FltSave.DataSelector, ctx->u.FltSave.DataOffset );
145 for (i = 0; i < 4; i++)
147 long double st;
148 memcpy(&st, &ctx->u.FltSave.FloatRegisters[i * 10], 10);
149 dbg_printf(" st%u:%-16Lg ", i, st);
151 dbg_printf("\n");
152 for (i = 4; i < 8; i++)
154 long double st;
155 memcpy(&st, &ctx->u.FltSave.FloatRegisters[i * 10], 10);
156 dbg_printf(" st%u:%-16Lg ", i, st);
158 dbg_printf("\n");
160 dbg_printf(" mxcsr: %04x (", ctx->u.FltSave.MxCsr );
161 for (i = 0; i < 16; i++)
162 if (ctx->u.FltSave.MxCsr & (1 << i)) dbg_printf( " %s", mxcsr_flags[i] );
163 dbg_printf(" )\n");
165 for (i = 0; i < 16; i++)
167 dbg_printf( " %sxmm%u: uint=%016lx%016lx", (i > 9) ? "" : " ", i,
168 ctx->u.FltSave.XmmRegisters[i].High, ctx->u.FltSave.XmmRegisters[i].Low );
169 dbg_printf( " double={%g; %g}", *(double *)&ctx->u.FltSave.XmmRegisters[i].Low,
170 *(double *)&ctx->u.FltSave.XmmRegisters[i].High );
171 dbg_printf( " float={%g; %g; %g; %g}\n",
172 (double)*((float *)&ctx->u.FltSave.XmmRegisters[i] + 0),
173 (double)*((float *)&ctx->u.FltSave.XmmRegisters[i] + 1),
174 (double)*((float *)&ctx->u.FltSave.XmmRegisters[i] + 2),
175 (double)*((float *)&ctx->u.FltSave.XmmRegisters[i] + 3) );
179 static void be_x86_64_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
183 static struct dbg_internal_var be_x86_64_ctx[] =
185 {CV_AMD64_AL, "AL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_char_int},
186 {CV_AMD64_BL, "BL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_char_int},
187 {CV_AMD64_CL, "CL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_char_int},
188 {CV_AMD64_DL, "DL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_char_int},
189 {CV_AMD64_AH, "AH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rax)+1), dbg_itype_unsigned_char_int},
190 {CV_AMD64_BH, "BH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rbx)+1), dbg_itype_unsigned_char_int},
191 {CV_AMD64_CH, "CH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rcx)+1), dbg_itype_unsigned_char_int},
192 {CV_AMD64_DH, "DH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rdx)+1), dbg_itype_unsigned_char_int},
193 {CV_AMD64_AX, "AX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_short_int},
194 {CV_AMD64_BX, "BX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_short_int},
195 {CV_AMD64_CX, "CX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_short_int},
196 {CV_AMD64_DX, "DX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_short_int},
197 {CV_AMD64_SP, "SP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_short_int},
198 {CV_AMD64_BP, "BP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_short_int},
199 {CV_AMD64_SI, "SI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_short_int},
200 {CV_AMD64_DI, "DI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_short_int},
201 {CV_AMD64_EAX, "EAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_int},
202 {CV_AMD64_EBX, "EBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_int},
203 {CV_AMD64_ECX, "ECX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_int},
204 {CV_AMD64_EDX, "EDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_int},
205 {CV_AMD64_ESP, "ESP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_int},
206 {CV_AMD64_EBP, "EBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_int},
207 {CV_AMD64_ESI, "ESI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_int},
208 {CV_AMD64_EDI, "EDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_int},
209 {CV_AMD64_ES, "ES", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
210 {CV_AMD64_CS, "CS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
211 {CV_AMD64_SS, "SS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
212 {CV_AMD64_DS, "DS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
213 {CV_AMD64_FS, "FS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
214 {CV_AMD64_GS, "GS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
215 {CV_AMD64_FLAGS, "FLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
216 {CV_AMD64_EFLAGS, "EFLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
217 {CV_AMD64_RIP, "RIP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rip), dbg_itype_unsigned_long_int},
218 {CV_AMD64_RAX, "RAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_long_int},
219 {CV_AMD64_RBX, "RBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_long_int},
220 {CV_AMD64_RCX, "RCX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_long_int},
221 {CV_AMD64_RDX, "RDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_long_int},
222 {CV_AMD64_RSP, "RSP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_long_int},
223 {CV_AMD64_RBP, "RBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_long_int},
224 {CV_AMD64_RSI, "RSI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_long_int},
225 {CV_AMD64_RDI, "RDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_long_int},
226 {CV_AMD64_R8, "R8", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R8), dbg_itype_unsigned_long_int},
227 {CV_AMD64_R9, "R9", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R9), dbg_itype_unsigned_long_int},
228 {CV_AMD64_R10, "R10", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R10), dbg_itype_unsigned_long_int},
229 {CV_AMD64_R11, "R11", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R11), dbg_itype_unsigned_long_int},
230 {CV_AMD64_R12, "R12", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R12), dbg_itype_unsigned_long_int},
231 {CV_AMD64_R13, "R13", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R13), dbg_itype_unsigned_long_int},
232 {CV_AMD64_R14, "R14", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R14), dbg_itype_unsigned_long_int},
233 {CV_AMD64_R15, "R15", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R15), dbg_itype_unsigned_long_int},
234 {0, NULL, 0, dbg_itype_none}
237 #define f_mod(b) ((b)>>6)
238 #define f_reg(b) (((b)>>3)&0x7)
239 #define f_rm(b) ((b)&0x7)
241 static unsigned be_x86_64_is_step_over_insn(const void* insn)
243 BYTE ch;
245 for (;;)
247 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
249 switch (ch)
251 /* Skip all prefixes */
252 case 0x2e: /* cs: */
253 case 0x36: /* ss: */
254 case 0x3e: /* ds: */
255 case 0x26: /* es: */
256 case 0x64: /* fs: */
257 case 0x65: /* gs: */
258 case 0x66: /* opcode size prefix */
259 case 0x67: /* addr size prefix */
260 case 0xf0: /* lock */
261 case 0xf2: /* repne */
262 case 0xf3: /* repe */
263 insn = (const char*)insn + 1;
264 continue;
266 /* Handle call instructions */
267 case 0xcd: /* int <intno> */
268 case 0xe8: /* call <offset> */
269 case 0x9a: /* lcall <seg>:<off> */
270 return TRUE;
272 case 0xff: /* call <regmodrm> */
273 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
274 return FALSE;
275 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
277 /* Handle string instructions */
278 case 0x6c: /* insb */
279 case 0x6d: /* insw */
280 case 0x6e: /* outsb */
281 case 0x6f: /* outsw */
282 case 0xa4: /* movsb */
283 case 0xa5: /* movsw */
284 case 0xa6: /* cmpsb */
285 case 0xa7: /* cmpsw */
286 case 0xaa: /* stosb */
287 case 0xab: /* stosw */
288 case 0xac: /* lodsb */
289 case 0xad: /* lodsw */
290 case 0xae: /* scasb */
291 case 0xaf: /* scasw */
292 return TRUE;
294 default:
295 return FALSE;
300 static unsigned be_x86_64_is_function_return(const void* insn)
302 BYTE c;
303 return dbg_read_memory(insn, &c, sizeof(c)) && ((c == 0xC2) || (c == 0xC3));
306 static unsigned be_x86_64_is_break_insn(const void* insn)
308 BYTE c;
309 return dbg_read_memory(insn, &c, sizeof(c)) && c == 0xCC;
312 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
314 char value8;
315 short value16;
317 switch (sz)
319 case 8:
320 if (!dbg_read_memory(addr, &value8, sizeof(value8))) return FALSE;
321 *value = value8;
322 break;
323 case 16:
324 if (!dbg_read_memory(addr, &value16, sizeof(value16))) return FALSE;
325 *value = value16;
326 case 32:
327 if (!dbg_read_memory(addr, value, sizeof(*value))) return FALSE;
328 break;
329 default: return FALSE;
331 return TRUE;
334 static unsigned be_x86_64_is_func_call(const void* insn, ADDRESS64* callee)
336 BYTE ch;
337 LONG delta;
338 short segment;
339 unsigned op_size = 32, rex = 0;
340 DWORD64 dst;
342 /* we assume 64bit mode all over the place */
343 for (;;)
345 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
346 if (ch == 0x66) op_size = 16;
347 else if (ch == 0x67) WINE_FIXME("prefix not supported %x\n", ch);
348 else if (ch >= 0x40 && ch <= 0x4f) rex = ch & 0xf;
349 else break;
350 insn = (const char*)insn + 1;
351 } while (0);
353 /* that's the only mode we support anyway */
354 callee->Mode = AddrModeFlat;
355 callee->Segment = dbg_context.SegCs;
357 switch (ch)
359 case 0xe8: /* relative near call */
360 assert(op_size == 32);
361 if (!fetch_value((const char*)insn + 1, sizeof(delta), &delta))
362 return FALSE;
363 callee->Offset = (DWORD_PTR)insn + 1 + 4 + delta;
364 return TRUE;
366 case 0xff:
367 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
368 return FALSE;
369 WINE_TRACE("Got 0xFF %x (&C7=%x) with rex=%x\n", ch, ch & 0xC7, rex);
370 /* keep only the CALL and LCALL insn:s */
371 switch (f_reg(ch))
373 case 0x02:
374 segment = dbg_context.SegCs;
375 break;
376 default: return FALSE;
378 if (rex == 0) switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
380 case 0x04:
381 case 0x44:
382 case 0x84:
383 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
384 return FALSE;
385 case 0x05: /* addr32 */
386 if (f_reg(ch) == 0x2)
388 /* rip-relative to next insn */
389 if (!dbg_read_memory((const char*)insn + 2, &delta, sizeof(delta)) ||
390 !dbg_read_memory((const char*)insn + 6 + delta, &dst, sizeof(dst)))
391 return FALSE;
393 callee->Offset = dst;
394 return TRUE;
396 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) at %p\n", ch, insn);
397 return FALSE;
398 default:
399 switch (f_rm(ch))
401 case 0x00: dst = dbg_context.Rax; break;
402 case 0x01: dst = dbg_context.Rcx; break;
403 case 0x02: dst = dbg_context.Rdx; break;
404 case 0x03: dst = dbg_context.Rbx; break;
405 case 0x04: dst = dbg_context.Rsp; break;
406 case 0x05: dst = dbg_context.Rbp; break;
407 case 0x06: dst = dbg_context.Rsi; break;
408 case 0x07: dst = dbg_context.Rdi; break;
410 if (f_mod(ch) != 0x03)
411 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) at %p\n", ch, insn);
412 else
414 callee->Offset = dst;
416 break;
418 else
419 WINE_FIXME("Unsupported yet call insn (rex=0x%02x 0xFF 0x%02x) at %p\n", rex, ch, insn);
420 return FALSE;
422 default:
423 return FALSE;
427 static unsigned be_x86_64_is_jump(const void* insn, ADDRESS64* jumpee)
429 return FALSE;
432 extern void be_x86_64_disasm_one_insn(ADDRESS64* addr, int display);
434 #define DR7_CONTROL_SHIFT 16
435 #define DR7_CONTROL_SIZE 4
437 #define DR7_RW_EXECUTE (0x0)
438 #define DR7_RW_WRITE (0x1)
439 #define DR7_RW_READ (0x3)
441 #define DR7_LEN_1 (0x0)
442 #define DR7_LEN_2 (0x4)
443 #define DR7_LEN_4 (0xC)
444 #define DR7_LEN_8 (0x8)
446 #define DR7_LOCAL_ENABLE_SHIFT 0
447 #define DR7_GLOBAL_ENABLE_SHIFT 1
448 #define DR7_ENABLE_SIZE 2
450 #define DR7_LOCAL_ENABLE_MASK (0x55)
451 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
453 #define DR7_CONTROL_RESERVED (0xFC00)
454 #define DR7_LOCAL_SLOWDOWN (0x100)
455 #define DR7_GLOBAL_SLOWDOWN (0x200)
457 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
458 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
460 static inline int be_x86_64_get_unused_DR(CONTEXT* ctx, DWORD64** r)
462 if (!IS_DR7_SET(ctx->Dr7, 0))
464 *r = &ctx->Dr0;
465 return 0;
467 if (!IS_DR7_SET(ctx->Dr7, 1))
469 *r = &ctx->Dr1;
470 return 1;
472 if (!IS_DR7_SET(ctx->Dr7, 2))
474 *r = &ctx->Dr2;
475 return 2;
477 if (!IS_DR7_SET(ctx->Dr7, 3))
479 *r = &ctx->Dr3;
480 return 3;
482 dbg_printf("All hardware registers have been used\n");
484 return -1;
487 static unsigned be_x86_64_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
488 CONTEXT* ctx, enum be_xpoint_type type,
489 void* addr, unsigned long* val, unsigned size)
491 unsigned char ch;
492 SIZE_T sz;
493 DWORD64 *pr;
494 int reg;
495 unsigned long bits;
497 switch (type)
499 case be_xpoint_break:
500 if (size != 0) return 0;
501 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
502 *val = ch;
503 ch = 0xcc;
504 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
505 break;
506 case be_xpoint_watch_exec:
507 bits = DR7_RW_EXECUTE;
508 goto hw_bp;
509 case be_xpoint_watch_read:
510 bits = DR7_RW_READ;
511 goto hw_bp;
512 case be_xpoint_watch_write:
513 bits = DR7_RW_WRITE;
514 hw_bp:
515 if ((reg = be_x86_64_get_unused_DR(ctx, &pr)) == -1) return 0;
516 *pr = (DWORD64)addr;
517 if (type != be_xpoint_watch_exec) switch (size)
519 case 8: bits |= DR7_LEN_8; break;
520 case 4: bits |= DR7_LEN_4; break;
521 case 2: bits |= DR7_LEN_2; break;
522 case 1: bits |= DR7_LEN_1; break;
523 default: WINE_FIXME("Unsupported xpoint_watch of size %d\n", size); return 0;
525 *val = reg;
526 /* clear old values */
527 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
528 /* set the correct ones */
529 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
530 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
531 break;
532 default:
533 dbg_printf("Unknown bp type %c\n", type);
534 return 0;
536 return 1;
539 static unsigned be_x86_64_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
540 CONTEXT* ctx, enum be_xpoint_type type,
541 void* addr, unsigned long val, unsigned size)
543 SIZE_T sz;
544 unsigned char ch;
546 switch (type)
548 case be_xpoint_break:
549 if (size != 0) return 0;
550 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
551 if (ch != (unsigned char)0xCC)
552 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
553 ch, (unsigned long)addr);
554 ch = (unsigned char)val;
555 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
556 break;
557 case be_xpoint_watch_exec:
558 case be_xpoint_watch_read:
559 case be_xpoint_watch_write:
560 /* simply disable the entry */
561 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
562 break;
563 default:
564 dbg_printf("Unknown bp type %c\n", type);
565 return 0;
567 return 1;
570 static unsigned be_x86_64_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
572 return ctx->Dr6 & (1 << idx);
575 static void be_x86_64_clear_watchpoint(CONTEXT* ctx, unsigned idx)
577 ctx->Dr6 &= ~(1 << idx);
580 static int be_x86_64_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
582 if (way)
584 ctx->Rip--;
585 return -1;
587 ctx->Rip++;
588 return 1;
591 static int be_x86_64_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
592 unsigned ext_sign, LONGLONG* ret)
594 if (size != 1 && size != 2 && size != 4 && size != 8 && size != 16)
595 return FALSE;
597 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
598 /* FIXME: this assumes that debuggee and debugger use the same
599 * integral representation
601 if (!memory_read_value(lvalue, size, ret)) return FALSE;
603 /* propagate sign information */
604 if (ext_sign && size < 16 && (*ret >> (size * 8 - 1)) != 0)
606 ULONGLONG neg = -1;
607 *ret |= neg << (size * 8);
609 return TRUE;
612 static int be_x86_64_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
613 long double* ret)
615 char tmp[sizeof(long double)];
617 /* FIXME: this assumes that debuggee and debugger use the same
618 * representation for reals
620 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
622 /* float & double types have to be promoted to a long double */
623 switch (size)
625 case sizeof(float): *ret = *(float*)tmp; break;
626 case sizeof(double): *ret = *(double*)tmp; break;
627 case sizeof(long double): *ret = *(long double*)tmp; break;
628 default: return FALSE;
630 return TRUE;
633 struct backend_cpu be_x86_64 =
635 IMAGE_FILE_MACHINE_AMD64,
637 be_cpu_linearize,
638 be_cpu_build_addr,
639 be_x86_64_get_addr,
640 be_x86_64_get_register_info,
641 be_x86_64_single_step,
642 be_x86_64_print_context,
643 be_x86_64_print_segment_info,
644 be_x86_64_ctx,
645 be_x86_64_is_step_over_insn,
646 be_x86_64_is_function_return,
647 be_x86_64_is_break_insn,
648 be_x86_64_is_func_call,
649 be_x86_64_is_jump,
650 be_x86_64_disasm_one_insn,
651 be_x86_64_insert_Xpoint,
652 be_x86_64_remove_Xpoint,
653 be_x86_64_is_watchpoint_set,
654 be_x86_64_clear_watchpoint,
655 be_x86_64_adjust_pc_for_break,
656 be_x86_64_fetch_integer,
657 be_x86_64_fetch_float,
659 #endif