msvcrt: Add declaration for _sc[w]printf to header.
[wine.git] / dlls / dbghelp / cpu_arm.c
blob769bc958fccd9225b517eee72206c30570e3ed06
1 /*
2 * File cpu_arm.c
4 * Copyright (C) 2009 Eric Pouech
5 * Copyright (C) 2010, 2011 André Hentschel
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
22 #include <assert.h>
24 #include "ntstatus.h"
25 #define WIN32_NO_STATUS
26 #include "dbghelp_private.h"
27 #include "winternl.h"
28 #include "wine/debug.h"
30 WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
32 static unsigned arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
33 enum cpu_addr ca, ADDRESS64* addr)
35 addr->Mode = AddrModeFlat;
36 addr->Segment = 0; /* don't need segment */
37 switch (ca)
39 #ifdef __arm__
40 case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
41 case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
42 case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
43 #endif
44 default: addr->Mode = -1;
45 return FALSE;
49 #ifdef __arm__
50 enum st_mode {stm_start, stm_arm, stm_done};
52 /* indexes in Reserved array */
53 #define __CurrentModeCount 0
55 #define curr_mode (frame->Reserved[__CurrentModeCount] & 0x0F)
56 #define curr_count (frame->Reserved[__CurrentModeCount] >> 4)
58 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);}
59 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10)
61 /* fetch_next_frame()
63 * modify (at least) context.Pc using unwind information
64 * either out of debug info (dwarf), or simple Lr trace
66 static BOOL fetch_next_frame(struct cpu_stack_walk* csw,
67 CONTEXT* context, DWORD_PTR curr_pc)
69 DWORD_PTR xframe;
70 DWORD oldReturn = context->Lr;
72 if (dwarf2_virtual_unwind(csw, curr_pc, context, &xframe))
74 context->Sp = xframe;
75 context->Pc = oldReturn;
76 return TRUE;
79 if (context->Pc == context->Lr) return FALSE;
80 context->Pc = oldReturn;
82 return TRUE;
85 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
87 unsigned deltapc = curr_count <= 1 ? 0 : 4;
89 /* sanity check */
90 if (curr_mode >= stm_done) return FALSE;
92 TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n",
93 wine_dbgstr_addr(&frame->AddrPC),
94 wine_dbgstr_addr(&frame->AddrFrame),
95 wine_dbgstr_addr(&frame->AddrReturn),
96 wine_dbgstr_addr(&frame->AddrStack),
97 curr_mode == stm_start ? "start" : "ARM",
98 wine_dbgstr_longlong(curr_count));
100 if (curr_mode == stm_start)
102 if ((frame->AddrPC.Mode == AddrModeFlat) &&
103 (frame->AddrFrame.Mode != AddrModeFlat))
105 WARN("Bad AddrPC.Mode / AddrFrame.Mode combination\n");
106 goto done_err;
109 /* Init done */
110 set_curr_mode(stm_arm);
111 frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat;
112 /* don't set up AddrStack on first call. Either the caller has set it up, or
113 * we will get it in the next frame
115 memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore));
117 else
119 if (context->Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n");
120 if (context->Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n");
122 if (frame->AddrReturn.Offset == 0) goto done_err;
123 if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc))
124 goto done_err;
127 memset(&frame->Params, 0, sizeof(frame->Params));
129 /* set frame information */
130 frame->AddrStack.Offset = context->Sp;
131 frame->AddrReturn.Offset = context->Lr;
132 frame->AddrFrame.Offset = context->Fp;
133 frame->AddrPC.Offset = context->Pc;
135 frame->Far = TRUE;
136 frame->Virtual = TRUE;
137 inc_curr_count();
139 TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n",
140 wine_dbgstr_addr(&frame->AddrPC),
141 wine_dbgstr_addr(&frame->AddrFrame),
142 wine_dbgstr_addr(&frame->AddrReturn),
143 wine_dbgstr_addr(&frame->AddrStack),
144 curr_mode == stm_start ? "start" : "ARM",
145 wine_dbgstr_longlong(curr_count),
146 frame->FuncTableEntry);
148 return TRUE;
149 done_err:
150 set_curr_mode(stm_done);
151 return FALSE;
153 #else
154 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
156 return FALSE;
158 #endif
160 static unsigned arm_map_dwarf_register(unsigned regno)
162 if (regno <= 15) return CV_ARM_R0 + regno;
163 if (regno == 128) return CV_ARM_CPSR;
165 FIXME("Don't know how to map register %d\n", regno);
166 return CV_ARM_NOREG;
169 static void* arm_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* size)
171 #ifdef __arm__
172 switch (regno)
174 case CV_ARM_R0 + 0: *size = sizeof(ctx->R0); return &ctx->R0;
175 case CV_ARM_R0 + 1: *size = sizeof(ctx->R1); return &ctx->R1;
176 case CV_ARM_R0 + 2: *size = sizeof(ctx->R2); return &ctx->R2;
177 case CV_ARM_R0 + 3: *size = sizeof(ctx->R3); return &ctx->R3;
178 case CV_ARM_R0 + 4: *size = sizeof(ctx->R4); return &ctx->R4;
179 case CV_ARM_R0 + 5: *size = sizeof(ctx->R5); return &ctx->R5;
180 case CV_ARM_R0 + 6: *size = sizeof(ctx->R6); return &ctx->R6;
181 case CV_ARM_R0 + 7: *size = sizeof(ctx->R7); return &ctx->R7;
182 case CV_ARM_R0 + 8: *size = sizeof(ctx->R8); return &ctx->R8;
183 case CV_ARM_R0 + 9: *size = sizeof(ctx->R9); return &ctx->R9;
184 case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
185 case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
186 case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
188 case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
189 case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
190 case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
191 case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
193 #endif
194 FIXME("Unknown register %x\n", regno);
195 return NULL;
198 static const char* arm_fetch_regname(unsigned regno)
200 switch (regno)
202 case CV_ARM_R0 + 0: return "r0";
203 case CV_ARM_R0 + 1: return "r1";
204 case CV_ARM_R0 + 2: return "r2";
205 case CV_ARM_R0 + 3: return "r3";
206 case CV_ARM_R0 + 4: return "r4";
207 case CV_ARM_R0 + 5: return "r5";
208 case CV_ARM_R0 + 6: return "r6";
209 case CV_ARM_R0 + 7: return "r7";
210 case CV_ARM_R0 + 8: return "r8";
211 case CV_ARM_R0 + 9: return "r9";
212 case CV_ARM_R0 + 10: return "r10";
213 case CV_ARM_R0 + 11: return "r11";
214 case CV_ARM_R0 + 12: return "r12";
216 case CV_ARM_SP: return "sp";
217 case CV_ARM_LR: return "lr";
218 case CV_ARM_PC: return "pc";
219 case CV_ARM_CPSR: return "cpsr";
221 FIXME("Unknown register %x\n", regno);
222 return NULL;
225 static BOOL arm_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
227 if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
229 /* FIXME: crop values across module boundaries, */
230 #ifdef __arm__
231 ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
232 minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
233 #endif
236 return TRUE;
239 static BOOL arm_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
241 /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
242 * function table minidump stream
244 return FALSE;
247 DECLSPEC_HIDDEN struct cpu cpu_arm = {
248 IMAGE_FILE_MACHINE_ARMNT,
250 CV_ARM_R0 + 11,
251 arm_get_addr,
252 arm_stack_walk,
253 NULL,
254 arm_map_dwarf_register,
255 arm_fetch_context_reg,
256 arm_fetch_regname,
257 arm_fetch_minidump_thread,
258 arm_fetch_minidump_module,