dlls/dbghelp/cpu_arm.c

   1 /*
   2  * File cpu_arm.c
   3  *
   4  * Copyright (C) 2009 Eric Pouech
   5  * Copyright (C) 2010, 2011 André Hentschel
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <assert.h>
  23
  24 #include "ntstatus.h"
  25 #define WIN32_NO_STATUS
  26 #include "dbghelp_private.h"
  27 #include "winternl.h"
  28 #include "wine/debug.h"
  29
  30 WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
  31
  32 static BOOL arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
  33                          enum cpu_addr ca, ADDRESS64* addr)
  34 {
  35     addr->Mode    = AddrModeFlat;
  36     addr->Segment = 0; /* don't need segment */
  37     switch (ca)
  38     {
  39 #ifdef __arm__
  40     case cpu_addr_pc:    addr->Offset = ctx->Pc; return TRUE;
  41     case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
  42     case cpu_addr_frame: addr->Offset = ctx->R11; return TRUE;
  43 #endif
  44     default: addr->Mode = -1;
  45         return FALSE;
  46     }
  47 }
  48
  49 #ifdef __arm__
  50 enum st_mode {stm_start, stm_arm, stm_done};
  51
  52 /* indexes in Reserved array */
  53 #define __CurrentModeCount      0
  54
  55 #define curr_mode   (frame->Reserved[__CurrentModeCount] & 0x0F)
  56 #define curr_count  (frame->Reserved[__CurrentModeCount] >> 4)
  57
  58 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);}
  59 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10)
  60
  61 /* fetch_next_frame()
  62  *
  63  * modify (at least) context.Pc using unwind information
  64  * either out of debug info (dwarf), or simple Lr trace
  65  */
  66 static BOOL fetch_next_frame(struct cpu_stack_walk* csw, union ctx *pcontext,
  67     DWORD_PTR curr_pc)
  68 {
  69     DWORD64 xframe;
  70     CONTEXT *context = &pcontext->ctx;
  71     DWORD                   oldReturn = context->Lr;
  72
  73     if (dwarf2_virtual_unwind(csw, curr_pc, pcontext, &xframe))
  74     {
  75         context->Sp = xframe;
  76         context->Pc = oldReturn;
  77         return TRUE;
  78     }
  79
  80     if (context->Pc == context->Lr) return FALSE;
  81     context->Pc = oldReturn;
  82
  83     return TRUE;
  84 }
  85
  86 static BOOL arm_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame,
  87     union ctx *context)
  88 {
  89     unsigned    deltapc = curr_count <= 1 ? 0 : 4;
  90
  91     /* sanity check */
  92     if (curr_mode >= stm_done) return FALSE;
  93
  94     TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n",
  95           wine_dbgstr_addr(&frame->AddrPC),
  96           wine_dbgstr_addr(&frame->AddrFrame),
  97           wine_dbgstr_addr(&frame->AddrReturn),
  98           wine_dbgstr_addr(&frame->AddrStack),
  99           curr_mode == stm_start ? "start" : "ARM",
 100           wine_dbgstr_longlong(curr_count));
 101
 102     if (curr_mode == stm_start)
 103     {
 104         /* Init done */
 105         set_curr_mode(stm_arm);
 106         frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat;
 107         /* don't set up AddrStack on first call. Either the caller has set it up, or
 108          * we will get it in the next frame
 109          */
 110         memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore));
 111     }
 112     else
 113     {
 114         if (context->ctx.Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n");
 115         if (context->ctx.Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n");
 116
 117         if (frame->AddrReturn.Offset == 0) goto done_err;
 118         if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc))
 119             goto done_err;
 120     }
 121
 122     memset(&frame->Params, 0, sizeof(frame->Params));
 123
 124     /* set frame information */
 125     frame->AddrStack.Offset = context->ctx.Sp;
 126     frame->AddrReturn.Offset = context->ctx.Lr;
 127     frame->AddrFrame.Offset = context->ctx.R11;
 128     frame->AddrPC.Offset = context->ctx.Pc;
 129
 130     frame->Far = TRUE;
 131     frame->Virtual = TRUE;
 132     inc_curr_count();
 133
 134     TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n",
 135           wine_dbgstr_addr(&frame->AddrPC),
 136           wine_dbgstr_addr(&frame->AddrFrame),
 137           wine_dbgstr_addr(&frame->AddrReturn),
 138           wine_dbgstr_addr(&frame->AddrStack),
 139           curr_mode == stm_start ? "start" : "ARM",
 140           wine_dbgstr_longlong(curr_count),
 141           frame->FuncTableEntry);
 142
 143     return TRUE;
 144 done_err:
 145     set_curr_mode(stm_done);
 146     return FALSE;
 147 }
 148 #else
 149 static BOOL arm_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame,
 150     union ctx *context)
 151 {
 152     return FALSE;
 153 }
 154 #endif
 155
 156 static unsigned arm_map_dwarf_register(unsigned regno, const struct module* module, BOOL eh_frame)
 157 {
 158     if (regno <= 15) return CV_ARM_R0 + regno;
 159     if (regno == 128) return CV_ARM_CPSR;
 160
 161     FIXME("Don't know how to map register %d\n", regno);
 162     return CV_ARM_NOREG;
 163 }
 164
 165 static void *arm_fetch_context_reg(union ctx *pctx, unsigned regno, unsigned *size)
 166 {
 167 #ifdef __arm__
 168     CONTEXT *ctx = &pctx->ctx;
 169
 170     switch (regno)
 171     {
 172     case CV_ARM_R0 +  0: *size = sizeof(ctx->R0); return &ctx->R0;
 173     case CV_ARM_R0 +  1: *size = sizeof(ctx->R1); return &ctx->R1;
 174     case CV_ARM_R0 +  2: *size = sizeof(ctx->R2); return &ctx->R2;
 175     case CV_ARM_R0 +  3: *size = sizeof(ctx->R3); return &ctx->R3;
 176     case CV_ARM_R0 +  4: *size = sizeof(ctx->R4); return &ctx->R4;
 177     case CV_ARM_R0 +  5: *size = sizeof(ctx->R5); return &ctx->R5;
 178     case CV_ARM_R0 +  6: *size = sizeof(ctx->R6); return &ctx->R6;
 179     case CV_ARM_R0 +  7: *size = sizeof(ctx->R7); return &ctx->R7;
 180     case CV_ARM_R0 +  8: *size = sizeof(ctx->R8); return &ctx->R8;
 181     case CV_ARM_R0 +  9: *size = sizeof(ctx->R9); return &ctx->R9;
 182     case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
 183     case CV_ARM_R0 + 11: *size = sizeof(ctx->R11); return &ctx->R11;
 184     case CV_ARM_R0 + 12: *size = sizeof(ctx->R12); return &ctx->R12;
 185
 186     case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
 187     case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
 188     case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
 189     case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
 190     }
 191 #endif
 192     FIXME("Unknown register %x\n", regno);
 193     return NULL;
 194 }
 195
 196 static const char* arm_fetch_regname(unsigned regno)
 197 {
 198     switch (regno)
 199     {
 200     case CV_ARM_R0 +  0: return "r0";
 201     case CV_ARM_R0 +  1: return "r1";
 202     case CV_ARM_R0 +  2: return "r2";
 203     case CV_ARM_R0 +  3: return "r3";
 204     case CV_ARM_R0 +  4: return "r4";
 205     case CV_ARM_R0 +  5: return "r5";
 206     case CV_ARM_R0 +  6: return "r6";
 207     case CV_ARM_R0 +  7: return "r7";
 208     case CV_ARM_R0 +  8: return "r8";
 209     case CV_ARM_R0 +  9: return "r9";
 210     case CV_ARM_R0 + 10: return "r10";
 211     case CV_ARM_R0 + 11: return "r11";
 212     case CV_ARM_R0 + 12: return "r12";
 213
 214     case CV_ARM_SP: return "sp";
 215     case CV_ARM_LR: return "lr";
 216     case CV_ARM_PC: return "pc";
 217     case CV_ARM_CPSR: return "cpsr";
 218     }
 219     FIXME("Unknown register %x\n", regno);
 220     return NULL;
 221 }
 222
 223 static BOOL arm_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
 224 {
 225     if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
 226     {
 227         /* FIXME: crop values across module boundaries, */
 228 #ifdef __arm__
 229         ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
 230         minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
 231 #endif
 232     }
 233
 234     return TRUE;
 235 }
 236
 237 static BOOL arm_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
 238 {
 239     /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
 240      * function table minidump stream
 241      */
 242     return FALSE;
 243 }
 244
 245 DECLSPEC_HIDDEN struct cpu cpu_arm = {
 246     IMAGE_FILE_MACHINE_ARMNT,
 247     4,
 248     CV_ARM_R0 + 11,
 249     arm_get_addr,
 250     arm_stack_walk,
 251     NULL,
 252     arm_map_dwarf_register,
 253     arm_fetch_context_reg,
 254     arm_fetch_regname,
 255     arm_fetch_minidump_thread,
 256     arm_fetch_minidump_module,
 257 };