Release 970824
[wine.git] / miscemu / instr.c
blob9e414c4ede836b1a1eb211ceabb0a0dd528713f6
1 /*
2 * Emulation of priviledged instructions
4 * Copyright 1995 Alexandre Julliard
5 */
7 #include <stdio.h>
8 #include "windows.h"
9 #include "ldt.h"
10 #include "miscemu.h"
11 #include "sig_context.h"
14 #define STACK_sig(context) \
15 ((GET_SEL_FLAGS(SS_sig(context)) & LDT_FLAGS_32BIT) ? \
16 ESP_sig(context) : SP_sig(context))
18 #define STACK_PTR(context) \
19 (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))
21 /***********************************************************************
22 * INSTR_ReplaceSelector
24 * Try to replace an invalid selector by a valid one.
25 * For now, only selector 0x40 is handled here.
27 static WORD INSTR_ReplaceSelector( SIGCONTEXT *context, WORD sel)
29 if (sel == 0x40)
31 static WORD sys_timer = 0;
32 fprintf( stderr, "Direct access to segment 0x40 (cs:ip=%04x:%04lx).\n",
33 CS_sig(context), EIP_sig(context) );
34 if (!sys_timer)
35 sys_timer = CreateSystemTimer( 55, (FARPROC16)DOSMEM_Tick );
36 return DOSMEM_BiosSeg;
38 return 0; /* Can't replace selector */
42 /***********************************************************************
43 * INSTR_GetOperandAddr
45 * Return the address of an instruction operand (from the mod/rm byte).
47 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
48 int long_addr, int segprefix, int *len )
50 int mod, rm, base, index = 0, ss = 0, seg = 0, off;
52 #define GET_VAL(val,type) \
53 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
55 *len = 0;
56 GET_VAL( &mod, BYTE );
57 rm = mod & 7;
58 mod >>= 6;
60 if (mod == 3)
62 switch(rm)
64 case 0: return (BYTE *)&EAX_sig(context);
65 case 1: return (BYTE *)&ECX_sig(context);
66 case 2: return (BYTE *)&EDX_sig(context);
67 case 3: return (BYTE *)&EBX_sig(context);
68 case 4: return (BYTE *)&ESP_sig(context);
69 case 5: return (BYTE *)&EBP_sig(context);
70 case 6: return (BYTE *)&ESI_sig(context);
71 case 7: return (BYTE *)&EDI_sig(context);
75 if (long_addr)
77 if (rm == 4)
79 BYTE sib;
80 GET_VAL( &sib, BYTE );
81 rm = sib & 7;
82 ss = sib >> 6;
83 switch(sib >> 3)
85 case 0: index = EAX_sig(context); break;
86 case 1: index = ECX_sig(context); break;
87 case 2: index = EDX_sig(context); break;
88 case 3: index = EBX_sig(context); break;
89 case 4: index = 0; break;
90 case 5: index = EBP_sig(context); break;
91 case 6: index = ESI_sig(context); break;
92 case 7: index = EDI_sig(context); break;
96 switch(rm)
98 case 0: base = EAX_sig(context); seg = DS_sig(context); break;
99 case 1: base = ECX_sig(context); seg = DS_sig(context); break;
100 case 2: base = EDX_sig(context); seg = DS_sig(context); break;
101 case 3: base = EBX_sig(context); seg = DS_sig(context); break;
102 case 4: base = ESP_sig(context); seg = SS_sig(context); break;
103 case 5: base = EBP_sig(context); seg = SS_sig(context); break;
104 case 6: base = ESI_sig(context); seg = DS_sig(context); break;
105 case 7: base = EDI_sig(context); seg = DS_sig(context); break;
107 switch (mod)
109 case 0:
110 if (rm == 5) /* special case: ds:(disp32) */
112 GET_VAL( &base, DWORD );
113 seg = DS_sig(context);
115 break;
117 case 1: /* 8-bit disp */
118 GET_VAL( &off, BYTE );
119 base += (signed char)off;
120 break;
122 case 2: /* 32-bit disp */
123 GET_VAL( &off, DWORD );
124 base += (signed long)off;
125 break;
128 else /* short address */
130 switch(rm)
132 case 0: /* ds:(bx,si) */
133 base = BX_sig(context) + SI_sig(context);
134 seg = DS_sig(context);
135 break;
136 case 1: /* ds:(bx,di) */
137 base = BX_sig(context) + DI_sig(context);
138 seg = DS_sig(context);
139 break;
140 case 2: /* ss:(bp,si) */
141 base = BP_sig(context) + SI_sig(context);
142 seg = SS_sig(context);
143 break;
144 case 3: /* ss:(bp,di) */
145 base = BP_sig(context) + DI_sig(context);
146 seg = SS_sig(context);
147 break;
148 case 4: /* ds:(si) */
149 base = SI_sig(context);
150 seg = DS_sig(context);
151 break;
152 case 5: /* ds:(di) */
153 base = DI_sig(context);
154 seg = DS_sig(context);
155 break;
156 case 6: /* ss:(bp) */
157 base = BP_sig(context);
158 seg = SS_sig(context);
159 break;
160 case 7: /* ds:(bx) */
161 base = BX_sig(context);
162 seg = DS_sig(context);
163 break;
166 switch(mod)
168 case 0:
169 if (rm == 6) /* special case: ds:(disp16) */
171 GET_VAL( &base, WORD );
172 seg = DS_sig(context);
174 break;
176 case 1: /* 8-bit disp */
177 GET_VAL( &off, BYTE );
178 base += (signed char)off;
179 break;
181 case 2: /* 16-bit disp */
182 GET_VAL( &off, WORD );
183 base += (signed short)off;
184 break;
186 base &= 0xffff;
188 if (segprefix != -1) seg = segprefix;
190 /* FIXME: should check limit of the segment here */
191 return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
192 #undef GET_VAL
196 /***********************************************************************
197 * INSTR_EmulateLDS
199 * Emulate the LDS (and LES,LFS,etc.) instruction.
201 static BOOL32 INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
202 int long_addr, int segprefix, int *len )
204 WORD seg;
205 BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
206 BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
207 long_addr, segprefix, len );
208 if (!addr)
209 return FALSE; /* Unable to emulate it */
210 seg = *(WORD *)(addr + (long_op ? 4 : 2));
212 if (!(seg = INSTR_ReplaceSelector( context, seg )))
213 return FALSE; /* Unable to emulate it */
215 /* Now store the offset in the correct register */
217 switch((*regmodrm >> 3) & 7)
219 case 0:
220 if (long_op) EAX_sig(context) = *(DWORD *)addr;
221 else AX_sig(context) = *(WORD *)addr;
222 break;
223 case 1:
224 if (long_op) ECX_sig(context) = *(DWORD *)addr;
225 else CX_sig(context) = *(WORD *)addr;
226 break;
227 case 2:
228 if (long_op) EDX_sig(context) = *(DWORD *)addr;
229 else DX_sig(context) = *(WORD *)addr;
230 break;
231 case 3:
232 if (long_op) EBX_sig(context) = *(DWORD *)addr;
233 else BX_sig(context) = *(WORD *)addr;
234 break;
235 case 4:
236 if (long_op) ESP_sig(context) = *(DWORD *)addr;
237 else SP_sig(context) = *(WORD *)addr;
238 break;
239 case 5:
240 if (long_op) EBP_sig(context) = *(DWORD *)addr;
241 else BP_sig(context) = *(WORD *)addr;
242 break;
243 case 6:
244 if (long_op) ESI_sig(context) = *(DWORD *)addr;
245 else SI_sig(context) = *(WORD *)addr;
246 break;
247 case 7:
248 if (long_op) EDI_sig(context) = *(DWORD *)addr;
249 else DI_sig(context) = *(WORD *)addr;
250 break;
253 /* Store the correct segment in the segment register */
255 switch(*instr)
257 case 0xc4: ES_sig(context) = seg; break; /* les */
258 case 0xc5: DS_sig(context) = seg; break; /* lds */
259 case 0x0f: switch(instr[1])
261 case 0xb2: SS_sig(context) = seg; break; /* lss */
262 #ifdef FS_sig
263 case 0xb4: FS_sig(context) = seg; break; /* lfs */
264 #endif
265 #ifdef GS_sig
266 case 0xb5: GS_sig(context) = seg; break; /* lgs */
267 #endif
269 break;
272 /* Add the opcode size to the total length */
274 *len += 1 + (*instr == 0x0f);
275 return TRUE;
279 /***********************************************************************
280 * INSTR_EmulateInstruction
282 * Emulate a priviledged instruction. Returns TRUE if emulation successful.
284 BOOL32 INSTR_EmulateInstruction( SIGCONTEXT *context )
286 int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
287 BYTE *instr;
289 long_op = long_addr = (GET_SEL_FLAGS(CS_sig(context)) & LDT_FLAGS_32BIT) != 0;
290 instr = (BYTE *) PTR_SEG_OFF_TO_LIN( CS_sig(context), EIP_sig(context) );
292 /* First handle any possible prefix */
294 segprefix = -1; /* no prefix */
295 prefix = 1;
296 repX = 0;
297 prefixlen = 0;
298 while(prefix)
300 switch(*instr)
302 case 0x2e:
303 segprefix = CS_sig(context);
304 break;
305 case 0x36:
306 segprefix = SS_sig(context);
307 break;
308 case 0x3e:
309 segprefix = DS_sig(context);
310 break;
311 case 0x26:
312 segprefix = ES_sig(context);
313 break;
314 #ifdef FS_sig
315 case 0x64:
316 segprefix = FS_sig(context);
317 break;
318 #endif
319 #ifdef GS_sig
320 case 0x65:
321 segprefix = GS_sig(context);
322 break;
323 #endif
324 case 0x66:
325 long_op = !long_op; /* opcode size prefix */
326 break;
327 case 0x67:
328 long_addr = !long_addr; /* addr size prefix */
329 break;
330 case 0xf0: /* lock */
331 break;
332 case 0xf2: /* repne */
333 repX = 1;
334 break;
335 case 0xf3: /* repe */
336 repX = 2;
337 break;
338 default:
339 prefix = 0; /* no more prefixes */
340 break;
342 if (prefix)
344 instr++;
345 prefixlen++;
349 /* Now look at the actual instruction */
351 switch(*instr)
353 case 0x07: /* pop es */
354 case 0x17: /* pop ss */
355 case 0x1f: /* pop ds */
357 WORD seg = *(WORD *)STACK_PTR( context );
358 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
360 switch(*instr)
362 case 0x07: ES_sig(context) = seg; break;
363 case 0x17: SS_sig(context) = seg; break;
364 case 0x1f: DS_sig(context) = seg; break;
366 STACK_sig(context) += long_op ? 4 : 2;
367 EIP_sig(context) += prefixlen + 1;
368 return TRUE;
371 break; /* Unable to emulate it */
373 case 0x0f: /* extended instruction */
374 switch(instr[1])
376 #ifdef FS_sig
377 case 0xa1: /* pop fs */
379 WORD seg = *(WORD *)STACK_PTR( context );
380 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
382 FS_sig(context) = seg;
383 STACK_sig(context) += long_op ? 4 : 2;
384 EIP_sig(context) += prefixlen + 2;
385 return TRUE;
388 break;
389 #endif /* FS_sig */
391 #ifdef GS_sig
392 case 0xa9: /* pop gs */
394 WORD seg = *(WORD *)STACK_PTR( context );
395 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
397 GS_sig(context) = seg;
398 STACK_sig(context) += long_op ? 4 : 2;
399 EIP_sig(context) += prefixlen + 2;
400 return TRUE;
403 break;
404 #endif /* GS_sig */
406 case 0xb2: /* lss addr,reg */
407 #ifdef FS_sig
408 case 0xb4: /* lfs addr,reg */
409 #endif
410 #ifdef GS_sig
411 case 0xb5: /* lgs addr,reg */
412 #endif
413 if (INSTR_EmulateLDS( context, instr, long_op,
414 long_addr, segprefix, &len ))
416 EIP_sig(context) += prefixlen + len;
417 return TRUE;
419 break;
421 break; /* Unable to emulate it */
423 case 0x6c: /* insb */
424 case 0x6d: /* insw/d */
425 case 0x6e: /* outsb */
426 case 0x6f: /* outsw/d */
428 int typ = *instr; /* Just in case it's overwritten. */
429 int outp = (typ >= 0x6e);
430 unsigned long count = repX ?
431 (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
432 int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
433 int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
434 int seg = outp ? DS_sig(context) : ES_sig(context); /* FIXME: is this right? */
436 if (outp)
437 /* FIXME: Check segment readable. */
438 (void)0;
439 else
440 /* FIXME: Check segment writeable. */
441 (void)0;
443 if (repX)
444 if (long_addr)
445 ECX_sig(context) = 0;
446 else
447 CX_sig(context) = 0;
449 while (count-- > 0)
451 void *data;
452 if (outp)
454 data = PTR_SEG_OFF_TO_LIN (seg,
455 long_addr ? ESI_sig(context) : SI_sig(context));
456 if (long_addr) ESI_sig(context) += step;
457 else SI_sig(context) += step;
459 else
461 data = PTR_SEG_OFF_TO_LIN (seg,
462 long_addr ? EDI_sig(context) : DI_sig(context));
463 if (long_addr) EDI_sig(context) += step;
464 else DI_sig(context) += step;
467 switch (typ)
469 case 0x6c:
470 *((BYTE *)data) = IO_inport( DX_sig(context), 1);
471 break;
472 case 0x6d:
473 if (long_op)
474 *((DWORD *)data) = IO_inport( DX_sig(context), 4);
475 else
476 *((WORD *)data) = IO_inport( DX_sig(context), 2);
477 break;
478 case 0x6e:
479 IO_outport( DX_sig(context), 1, *((BYTE *)data));
480 break;
481 case 0x6f:
482 if (long_op)
483 IO_outport( DX_sig(context), 4, *((DWORD *)data));
484 else
485 IO_outport( DX_sig(context), 2, *((WORD *)data));
486 break;
489 EIP_sig(context) += prefixlen + 1;
491 return TRUE;
493 case 0x8e: /* mov XX,segment_reg */
495 WORD seg;
496 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
497 long_addr, segprefix, &len );
498 if (!addr)
499 break; /* Unable to emulate it */
500 seg = *(WORD *)addr;
501 if (!(seg = INSTR_ReplaceSelector( context, seg )))
502 break; /* Unable to emulate it */
504 switch((instr[1] >> 3) & 7)
506 case 0:
507 ES_sig(context) = seg;
508 EIP_sig(context) += prefixlen + len + 1;
509 return TRUE;
510 case 1: /* cs */
511 break;
512 case 2:
513 SS_sig(context) = seg;
514 EIP_sig(context) += prefixlen + len + 1;
515 return TRUE;
516 case 3:
517 DS_sig(context) = seg;
518 EIP_sig(context) += prefixlen + len + 1;
519 return TRUE;
520 case 4:
521 #ifdef FS_sig
522 FS_sig(context) = seg;
523 EIP_sig(context) += prefixlen + len + 1;
524 return TRUE;
525 #endif
526 case 5:
527 #ifdef GS_sig
528 GS_sig(context) = seg;
529 EIP_sig(context) += prefixlen + len + 1;
530 return TRUE;
531 #endif
532 case 6: /* unused */
533 case 7: /* unused */
534 break;
537 break; /* Unable to emulate it */
539 case 0xc4: /* les addr,reg */
540 case 0xc5: /* lds addr,reg */
541 if (INSTR_EmulateLDS( context, instr, long_op,
542 long_addr, segprefix, &len ))
544 EIP_sig(context) += prefixlen + len;
545 return TRUE;
547 break; /* Unable to emulate it */
549 case 0xcd: /* int <XX> */
550 if (long_op)
552 fprintf(stderr, "int xx from 32-bit code is not supported.\n");
553 break; /* Unable to emulate it */
555 else
557 FARPROC16 addr = INT_GetHandler( instr[1] );
558 WORD *stack = (WORD *)STACK_PTR( context );
559 /* Push the flags and return address on the stack */
560 *(--stack) = FL_sig(context);
561 *(--stack) = CS_sig(context);
562 *(--stack) = IP_sig(context) + prefixlen + 2;
563 STACK_sig(context) -= 3 * sizeof(WORD);
564 /* Jump to the interrupt handler */
565 CS_sig(context) = HIWORD(addr);
566 EIP_sig(context) = LOWORD(addr);
568 return TRUE;
570 case 0xcf: /* iret */
571 if (long_op)
573 DWORD *stack = (DWORD *)STACK_PTR( context );
574 EIP_sig(context) = *stack++;
575 CS_sig(context) = *stack++;
576 EFL_sig(context) = *stack;
577 STACK_sig(context) += 3*sizeof(DWORD); /* Pop the return address and flags */
579 else
581 WORD *stack = (WORD *)STACK_PTR( context );
582 EIP_sig(context) = *stack++;
583 CS_sig(context) = *stack++;
584 FL_sig(context) = *stack;
585 STACK_sig(context) += 3*sizeof(WORD); /* Pop the return address and flags */
587 return TRUE;
589 case 0xe4: /* inb al,XX */
590 AL_sig(context) = IO_inport( instr[1], 1 );
591 EIP_sig(context) += prefixlen + 2;
592 return TRUE;
594 case 0xe5: /* in (e)ax,XX */
595 if (long_op) EAX_sig(context) = IO_inport( instr[1], 4 );
596 else AX_sig(context) = IO_inport( instr[1], 2 );
597 EIP_sig(context) += prefixlen + 2;
598 return TRUE;
600 case 0xe6: /* outb XX,al */
601 IO_outport( instr[1], 1, AL_sig(context) );
602 EIP_sig(context) += prefixlen + 2;
603 return TRUE;
605 case 0xe7: /* out XX,(e)ax */
606 if (long_op) IO_outport( instr[1], 4, EAX_sig(context) );
607 else IO_outport( instr[1], 2, AX_sig(context) );
608 EIP_sig(context) += prefixlen + 2;
609 return TRUE;
611 case 0xec: /* inb al,dx */
612 AL_sig(context) = IO_inport( DX_sig(context), 1 );
613 EIP_sig(context) += prefixlen + 1;
614 return TRUE;
616 case 0xed: /* in (e)ax,dx */
617 if (long_op) EAX_sig(context) = IO_inport( DX_sig(context), 4 );
618 else AX_sig(context) = IO_inport( DX_sig(context), 2 );
619 EIP_sig(context) += prefixlen + 1;
620 return TRUE;
622 case 0xee: /* outb dx,al */
623 IO_outport( DX_sig(context), 1, AL_sig(context) );
624 EIP_sig(context) += prefixlen + 1;
625 return TRUE;
627 case 0xef: /* out dx,(e)ax */
628 if (long_op) IO_outport( DX_sig(context), 4, EAX_sig(context) );
629 else IO_outport( DX_sig(context), 2, AX_sig(context) );
630 EIP_sig(context) += prefixlen + 1;
631 return TRUE;
633 case 0xfa: /* cli, ignored */
634 EIP_sig(context) += prefixlen + 1;
635 return TRUE;
637 case 0xfb: /* sti, ignored */
638 EIP_sig(context) += prefixlen + 1;
639 return TRUE;
641 fprintf(stderr, "Unexpected Windows program segfault"
642 " - opcode = %x\n", *instr);
643 return FALSE; /* Unable to emulate it */