programs/winedbg/be_cpu.h

   1 /*
   2  * Debugger CPU backend definitions
   3  *
   4  * Copyright 2004 Eric Pouech
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  19  */
  20
  21 enum be_cpu_addr {be_cpu_addr_pc, be_cpu_addr_stack, be_cpu_addr_frame};
  22 enum be_xpoint_type {be_xpoint_break, be_xpoint_watch_exec, be_xpoint_watch_read,
  23                      be_xpoint_watch_write, be_xpoint_free=-1};
  24
  25 struct gdb_register
  26 {
  27     size_t      ctx_offset;
  28     size_t      ctx_length;
  29     size_t      gdb_length;
  30 };
  31
  32 struct backend_cpu
  33 {
  34     const DWORD         machine;
  35     const DWORD         pointer_size;
  36     /* ------------------------------------------------------------------------------
  37      * address manipulation
  38      * ------------------------------------------------------------------------------ */
  39     /* Linearizes an address. Only CPUs with segmented address model need this.
  40      * Otherwise, implementation is straightforward (be_cpu_linearize will do)
  41      */
  42     void*               (*linearize)(HANDLE hThread, const ADDRESS64*);
  43     /* Fills in an ADDRESS64 structure from a segment & an offset. CPUs without
  44      * segment address model should use 0 as seg. Required method to fill
  45      * in an ADDRESS64 (except an linear one).
  46      * Non segmented CPU shall use be_cpu_build_addr
  47      */
  48     BOOL                (*build_addr)(HANDLE hThread, const dbg_ctx_t *ctx,
  49                                       ADDRESS64* addr, unsigned seg,
  50                                       unsigned long offset);
  51     /* Retrieves in addr an address related to the context (program counter, stack
  52      * pointer, frame pointer)
  53      */
  54     BOOL                (*get_addr)(HANDLE hThread, const dbg_ctx_t *ctx,
  55                                     enum be_cpu_addr, ADDRESS64* addr);
  56
  57     /* returns which kind of information a given register number refers to */
  58     BOOL                (*get_register_info)(int regno, enum be_cpu_addr* kind);
  59
  60     /* -------------------------------------------------------------------------------
  61      * context manipulation
  62      * ------------------------------------------------------------------------------- */
  63     /* Enables/disables CPU single step mode (depending on enable) */
  64     void                (*single_step)(dbg_ctx_t *ctx, BOOL enable);
  65     /* Dumps out the content of the context */
  66     void                (*print_context)(HANDLE hThread, const dbg_ctx_t *ctx, int all_regs);
  67     /* Prints information about segments. Non segmented CPU should leave this
  68      * function empty
  69      */
  70     void                (*print_segment_info)(HANDLE hThread, const dbg_ctx_t *ctx);
  71     /* all the CONTEXT's relative variables, bound to this CPU */
  72     const struct dbg_internal_var* context_vars;
  73
  74     /* -------------------------------------------------------------------------------
  75      * code inspection
  76      * -------------------------------------------------------------------------------*/
  77     /* Check whether the instruction at addr is an insn to step over
  78      * (like function call, interruption...)
  79      */
  80     BOOL                (*is_step_over_insn)(const void* addr);
  81     /* Check whether instruction at 'addr' is the return from a function call */
  82     BOOL                (*is_function_return)(const void* addr);
  83     /* Check whether instruction at 'addr' is the CPU break instruction. On i386,
  84      * it's INT3 (0xCC)
  85      */
  86     BOOL                (*is_break_insn)(const void*);
  87     /* Check whether instruction at 'addr' is a function call */
  88     BOOL                (*is_function_call)(const void* insn, ADDRESS64* callee);
  89     /* Check whether instruction at 'addr' is a jump */
  90     BOOL                (*is_jump)(const void* insn, ADDRESS64* jumpee);
  91     /* Ask for disassembling one instruction. If display is true, assembly code
  92      * will be printed. In all cases, 'addr' is advanced at next instruction
  93      */
  94     void                (*disasm_one_insn)(ADDRESS64* addr, int display);
  95     /* -------------------------------------------------------------------------------
  96      * break points / watchpoints handling
  97      * -------------------------------------------------------------------------------*/
  98     /* Inserts an Xpoint in the CPU context and/or debuggee address space */
  99     BOOL                (*insert_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
 100                                          dbg_ctx_t *ctx, enum be_xpoint_type type,
 101                                          void* addr, unsigned long* val, unsigned size);
 102     /* Removes an Xpoint in the CPU context and/or debuggee address space */
 103     BOOL                (*remove_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
 104                                          dbg_ctx_t *ctx, enum be_xpoint_type type,
 105                                          void* addr, unsigned long val, unsigned size);
 106     /* Checks whether a given watchpoint has been triggered */
 107     BOOL                (*is_watchpoint_set)(const dbg_ctx_t *ctx, unsigned idx);
 108     /* Clears the watchpoint indicator */
 109     void                (*clear_watchpoint)(dbg_ctx_t *ctx, unsigned idx);
 110     /* After a break instruction is executed, in the corresponding exception handler,
 111      * some CPUs report the address of the insn after the break insn, some others
 112      * report the address of the break insn itself.
 113      * This function lets adjust the context PC to reflect this behavior.
 114      */
 115     int                 (*adjust_pc_for_break)(dbg_ctx_t *ctx, BOOL way);
 116     /* -------------------------------------------------------------------------------
 117      * basic type read/write
 118      * -------------------------------------------------------------------------------*/
 119     /* Reads an integer from memory and stores it inside a long long int */
 120     BOOL                (*fetch_integer)(const struct dbg_lvalue* lvalue, unsigned size, BOOL is_signed, LONGLONG*);
 121     /* Reads a real from memory and stores it inside a long double */
 122     BOOL                (*fetch_float)(const struct dbg_lvalue* lvalue, unsigned size, long double*);
 123     /* Writes an integer to memory */
 124     BOOL                (*store_integer)(const struct dbg_lvalue* lvalue, unsigned size, BOOL is_signed, LONGLONG);
 125
 126     BOOL                (*get_context)(HANDLE thread, dbg_ctx_t *ctx);
 127     BOOL                (*set_context)(HANDLE thread, const dbg_ctx_t *ctx);
 128
 129     const struct gdb_register *gdb_register_map;
 130     const size_t gdb_num_regs;
 131 };
 132
 133 /* some handy functions for non segmented CPUs */
 134 void*    be_cpu_linearize(HANDLE hThread, const ADDRESS64*);
 135 BOOL be_cpu_build_addr(HANDLE hThread, const dbg_ctx_t *ctx, ADDRESS64* addr,
 136                        unsigned seg, unsigned long offset);