miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include <stdio.h>
   8 #include "windows.h"
   9 #include "ldt.h"
  10 #include "miscemu.h"
  11 #include "registers.h"
  12
  13
  14 #define STACK_reg(context) \
  15    ((GET_SEL_FLAGS(SS_reg(context)) & LDT_FLAGS_32BIT) ? \
  16                    ESP_reg(context) : SP_reg(context))
  17
  18 #define STACK_PTR(context) \
  19     (PTR_SEG_OFF_TO_LIN(SS_reg(context),STACK_reg(context)))
  20
  21 /***********************************************************************
  22  *           INSTR_ReplaceSelector
  23  *
  24  * Try to replace an invalid selector by a valid one.
  25  * For now, only selector 0x40 is handled here.
  26  */
  27 static WORD INSTR_ReplaceSelector( struct sigcontext_struct *context, WORD sel)
  28 {
  29     if (sel == 0x40)
  30     {
  31         extern void SIGNAL_StartBIOSTimer(void);
  32         fprintf( stderr, "Direct access to segment 0x40 (cs:ip=%04x:%04lx).\n",
  33                  CS_reg(context), EIP_reg(context) );
  34         SIGNAL_StartBIOSTimer();
  35         return DOSMEM_BiosSeg;
  36     }
  37     return 0;  /* Can't replace selector */
  38 }
  39
  40
  41 /***********************************************************************
  42  *           INSTR_GetOperandAddr
  43  *
  44  * Return the address of an instruction operand (from the mod/rm byte).
  45  */
  46 static BYTE *INSTR_GetOperandAddr( struct sigcontext_struct *context,
  47                                    BYTE *instr, int long_addr,
  48                                    int segprefix, int *len )
  49 {
  50     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  51
  52 #define GET_VAL(val,type) \
  53     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  54
  55     *len = 0;
  56     GET_VAL( &mod, BYTE );
  57     rm = mod & 7;
  58     mod >>= 6;
  59
  60     if (mod == 3)
  61     {
  62         switch(rm)
  63         {
  64         case 0: return (BYTE *)&EAX_reg(context);
  65         case 1: return (BYTE *)&ECX_reg(context);
  66         case 2: return (BYTE *)&EDX_reg(context);
  67         case 3: return (BYTE *)&EBX_reg(context);
  68         case 4: return (BYTE *)&ESP_reg(context);
  69         case 5: return (BYTE *)&EBP_reg(context);
  70         case 6: return (BYTE *)&ESI_reg(context);
  71         case 7: return (BYTE *)&EDI_reg(context);
  72         }
  73     }
  74
  75     if (long_addr)
  76     {
  77         if (rm == 4)
  78         {
  79             BYTE sib;
  80             GET_VAL( &sib, BYTE );
  81             rm = sib & 7;
  82             ss = sib >> 6;
  83             switch(sib >> 3)
  84             {
  85             case 0: index = EAX_reg(context); break;
  86             case 1: index = ECX_reg(context); break;
  87             case 2: index = EDX_reg(context); break;
  88             case 3: index = EBX_reg(context); break;
  89             case 4: index = 0; break;
  90             case 5: index = EBP_reg(context); break;
  91             case 6: index = ESI_reg(context); break;
  92             case 7: index = EDI_reg(context); break;
  93             }
  94         }
  95
  96         switch(rm)
  97         {
  98         case 0: base = EAX_reg(context); seg = DS_reg(context); break;
  99         case 1: base = ECX_reg(context); seg = DS_reg(context); break;
 100         case 2: base = EDX_reg(context); seg = DS_reg(context); break;
 101         case 3: base = EBX_reg(context); seg = DS_reg(context); break;
 102         case 4: base = ESP_reg(context); seg = SS_reg(context); break;
 103         case 5: base = EBP_reg(context); seg = SS_reg(context); break;
 104         case 6: base = ESI_reg(context); seg = DS_reg(context); break;
 105         case 7: base = EDI_reg(context); seg = DS_reg(context); break;
 106         }
 107         switch (mod)
 108         {
 109         case 0:
 110             if (rm == 5)  /* special case: ds:(disp32) */
 111             {
 112                 GET_VAL( &base, DWORD );
 113                 seg = DS_reg(context);
 114             }
 115             break;
 116
 117         case 1:  /* 8-bit disp */
 118             GET_VAL( &off, BYTE );
 119             base += (signed char)off;
 120             break;
 121
 122         case 2:  /* 32-bit disp */
 123             GET_VAL( &off, DWORD );
 124             base += (signed long)off;
 125             break;
 126         }
 127     }
 128     else  /* short address */
 129     {
 130         switch(rm)
 131         {
 132         case 0:  /* ds:(bx,si) */
 133             base = BX_reg(context) + SI_reg(context);
 134             seg  = DS_reg(context);
 135             break;
 136         case 1:  /* ds:(bx,di) */
 137             base = BX_reg(context) + DI_reg(context);
 138             seg  = DS_reg(context);
 139             break;
 140         case 2:  /* ss:(bp,si) */
 141             base = BP_reg(context) + SI_reg(context);
 142             seg  = SS_reg(context);
 143             break;
 144         case 3:  /* ss:(bp,di) */
 145             base = BP_reg(context) + DI_reg(context);
 146             seg  = SS_reg(context);
 147             break;
 148         case 4:  /* ds:(si) */
 149             base = SI_reg(context);
 150             seg  = DS_reg(context);
 151             break;
 152         case 5:  /* ds:(di) */
 153             base = DI_reg(context);
 154             seg  = DS_reg(context);
 155             break;
 156         case 6:  /* ss:(bp) */
 157             base = BP_reg(context);
 158             seg  = SS_reg(context);
 159             break;
 160         case 7:  /* ds:(bx) */
 161             base = BX_reg(context);
 162             seg  = DS_reg(context);
 163             break;
 164         }
 165
 166         switch(mod)
 167         {
 168         case 0:
 169             if (rm == 6)  /* special case: ds:(disp16) */
 170             {
 171                 GET_VAL( &base, WORD );
 172                 seg  = DS_reg(context);
 173             }
 174             break;
 175
 176         case 1:  /* 8-bit disp */
 177             GET_VAL( &off, BYTE );
 178             base += (signed char)off;
 179             break;
 180
 181         case 2:  /* 16-bit disp */
 182             GET_VAL( &off, WORD );
 183             base += (signed short)off;
 184             break;
 185         }
 186         base &= 0xffff;
 187     }
 188     if (segprefix != -1) seg = segprefix;
 189
 190     /* FIXME: should check limit of the segment here */
 191     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 192 }
 193
 194
 195 /***********************************************************************
 196  *           INSTR_EmulateLDS
 197  *
 198  * Emulate the LDS (and LES,LFS,etc.) instruction.
 199  */
 200 static BOOL INSTR_EmulateLDS( struct sigcontext_struct *context,
 201                               BYTE *instr, int long_op, int long_addr,
 202                               int segprefix, int *len )
 203 {
 204     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 205     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 206                                        long_addr, segprefix, len );
 207     WORD seg = *(WORD *)(addr + (long_op ? 4 : 2));
 208
 209     if (!(seg = INSTR_ReplaceSelector( context, seg )))
 210         return FALSE;  /* Unable to emulate it */
 211
 212     /* Now store the offset in the correct register */
 213
 214     switch((*regmodrm >> 3) & 7)
 215     {
 216     case 0:
 217         if (long_op) EAX_reg(context) = *(DWORD *)addr;
 218         else AX_reg(context) = *(WORD *)addr;
 219         break;
 220     case 1:
 221         if (long_op) ECX_reg(context) = *(DWORD *)addr;
 222         else CX_reg(context) = *(WORD *)addr;
 223         break;
 224     case 2:
 225         if (long_op) EDX_reg(context) = *(DWORD *)addr;
 226         else DX_reg(context) = *(WORD *)addr;
 227         break;
 228     case 3:
 229         if (long_op) EBX_reg(context) = *(DWORD *)addr;
 230         else BX_reg(context) = *(WORD *)addr;
 231         break;
 232     case 4:
 233         if (long_op) ESP_reg(context) = *(DWORD *)addr;
 234         else SP_reg(context) = *(WORD *)addr;
 235         break;
 236     case 5:
 237         if (long_op) EBP_reg(context) = *(DWORD *)addr;
 238         else BP_reg(context) = *(WORD *)addr;
 239         break;
 240     case 6:
 241         if (long_op) ESI_reg(context) = *(DWORD *)addr;
 242         else SI_reg(context) = *(WORD *)addr;
 243         break;
 244     case 7:
 245         if (long_op) EDI_reg(context) = *(DWORD *)addr;
 246         else DI_reg(context) = *(WORD *)addr;
 247         break;
 248     }
 249
 250     /* Store the correct segment in the segment register */
 251
 252     switch(*instr)
 253     {
 254     case 0xc4: ES_reg(context) = seg; break;  /* les */
 255     case 0xc5: DS_reg(context) = seg; break;  /* lds */
 256     case 0x0f: switch(instr[1])
 257                {
 258                case 0xb2: SS_reg(context) = seg; break;  /* lss */
 259 #ifdef FS_reg
 260                case 0xb4: FS_reg(context) = seg; break;  /* lfs */
 261 #endif
 262 #ifdef GS_reg
 263                case 0xb5: GS_reg(context) = seg; break;  /* lgs */
 264 #endif
 265                }
 266                break;
 267     }
 268
 269     /* Add the opcode size to the total length */
 270
 271     *len += 1 + (*instr == 0x0f);
 272     return TRUE;
 273 }
 274
 275
 276 /***********************************************************************
 277  *           INSTR_EmulateInstruction
 278  *
 279  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 280  */
 281 BOOL INSTR_EmulateInstruction( struct sigcontext_struct *context )
 282 {
 283     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 284     BYTE *instr;
 285
 286     long_op = long_addr = (GET_SEL_FLAGS(CS_reg(context)) & LDT_FLAGS_32BIT) != 0;
 287     instr = (BYTE *) PTR_SEG_OFF_TO_LIN( CS_reg(context), EIP_reg(context) );
 288
 289     /* First handle any possible prefix */
 290
 291     segprefix = -1;  /* no prefix */
 292     prefix = 1;
 293     repX = 0;
 294     prefixlen = 0;
 295     while(prefix)
 296     {
 297         switch(*instr)
 298         {
 299         case 0x2e:
 300             segprefix = CS_reg(context);
 301             break;
 302         case 0x36:
 303             segprefix = SS_reg(context);
 304             break;
 305         case 0x3e:
 306             segprefix = DS_reg(context);
 307             break;
 308         case 0x26:
 309             segprefix = ES_reg(context);
 310             break;
 311 #ifdef FS_reg
 312         case 0x64:
 313             segprefix = FS_reg(context);
 314             break;
 315 #endif
 316 #ifdef GS_reg
 317         case 0x65:
 318             segprefix = GS_reg(context);
 319             break;
 320 #endif
 321         case 0x66:
 322             long_op = !long_op;  /* opcode size prefix */
 323             break;
 324         case 0x67:
 325             long_addr = !long_addr;  /* addr size prefix */
 326             break;
 327         case 0xf0:  /* lock */
 328             break;
 329         case 0xf2:  /* repne */
 330             repX = 1;
 331             break;
 332         case 0xf3:  /* repe */
 333             repX = 2;
 334             break;
 335         default:
 336             prefix = 0;  /* no more prefixes */
 337             break;
 338         }
 339         if (prefix)
 340         {
 341             instr++;
 342             prefixlen++;
 343         }
 344     }
 345
 346     /* Now look at the actual instruction */
 347
 348     switch(*instr)
 349     {
 350         case 0x07: /* pop es */
 351         case 0x17: /* pop ss */
 352         case 0x1f: /* pop ds */
 353             {
 354                 WORD seg = *(WORD *)STACK_PTR( context );
 355                 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 356                 {
 357                     switch(*instr)
 358                     {
 359                     case 0x07: ES_reg(context) = seg; break;
 360                     case 0x17: SS_reg(context) = seg; break;
 361                     case 0x1f: DS_reg(context) = seg; break;
 362                     }
 363                     STACK_reg(context) += long_op ? 4 : 2;
 364                     EIP_reg(context) += prefixlen + 1;
 365                     return TRUE;
 366                 }
 367             }
 368             break;  /* Unable to emulate it */
 369
 370         case 0x0f: /* extended instruction */
 371             switch(instr[1])
 372             {
 373 #ifdef FS_reg
 374             case 0xa1: /* pop fs */
 375                 {
 376                     WORD seg = *(WORD *)STACK_PTR( context );
 377                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 378                     {
 379                         FS_reg(context) = seg;
 380                         STACK_reg(context) += long_op ? 4 : 2;
 381                         EIP_reg(context) += prefixlen + 2;
 382                         return TRUE;
 383                     }
 384                 }
 385                 break;
 386 #endif  /* FS_reg */
 387
 388 #ifdef GS_reg
 389             case 0xa9: /* pop gs */
 390                 {
 391                     WORD seg = *(WORD *)STACK_PTR( context );
 392                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 393                     {
 394                         GS_reg(context) = seg;
 395                         STACK_reg(context) += long_op ? 4 : 2;
 396                         EIP_reg(context) += prefixlen + 2;
 397                         return TRUE;
 398                     }
 399                 }
 400                 break;
 401 #endif  /* GS_reg */
 402
 403             case 0xb2: /* lss addr,reg */
 404 #ifdef FS_reg
 405             case 0xb4: /* lfs addr,reg */
 406 #endif
 407 #ifdef GS_reg
 408             case 0xb5: /* lgs addr,reg */
 409 #endif
 410                 if (INSTR_EmulateLDS( context, instr, long_op,
 411                                       long_addr, segprefix, &len ))
 412                 {
 413                     EIP_reg(context) += prefixlen + len;
 414                     return TRUE;
 415                 }
 416                 break;
 417             }
 418             break;  /* Unable to emulate it */
 419
 420         case 0x6c: /* insb     */
 421         case 0x6d: /* insw/d   */
 422         case 0x6e: /* outsb    */
 423         case 0x6f: /* outsw/d  */
 424             {
 425               int typ = *instr;  /* Just in case it's overwritten.  */
 426               int outp = (typ >= 0x6e);
 427               unsigned long count = repX ?
 428                           (long_addr ? ECX_reg(context) : CX_reg(context)) : 1;
 429               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 430               int step = (EFL_reg(context) & 0x400) ? -opsize : +opsize;
 431               int seg = outp ? DS_reg(context) : ES_reg(context);  /* FIXME: is this right? */
 432
 433               if (outp)
 434                 /* FIXME: Check segment readable.  */
 435                 (void)0;
 436               else
 437                 /* FIXME: Check segment writeable.  */
 438                 (void)0;
 439
 440               if (repX)
 441                 if (long_addr)
 442                   ECX_reg(context) = 0;
 443                 else
 444                   CX_reg(context) = 0;
 445
 446               while (count-- > 0)
 447                 {
 448                   void *data;
 449                   if (outp)
 450                   {
 451                       data = PTR_SEG_OFF_TO_LIN (seg,
 452                                long_addr ? ESI_reg(context) : SI_reg(context));
 453                       if (long_addr) ESI_reg(context) += step;
 454                       else SI_reg(context) += step;
 455                   }
 456                   else
 457                   {
 458                       data = PTR_SEG_OFF_TO_LIN (seg,
 459                                long_addr ? EDI_reg(context) : DI_reg(context));
 460                       if (long_addr) EDI_reg(context) += step;
 461                       else DI_reg(context) += step;
 462                   }
 463
 464                   switch (typ)
 465                   {
 466                     case 0x6c:
 467                       *((BYTE *)data) = inport( DX_reg(context), 1);
 468                       break;
 469                     case 0x6d:
 470                       if (long_op)
 471                         *((DWORD *)data) = inport( DX_reg(context), 4);
 472                       else
 473                         *((WORD *)data) = inport( DX_reg(context), 2);
 474                       break;
 475                     case 0x6e:
 476                       outport( DX_reg(context), 1, *((BYTE *)data));
 477                       break;
 478                     case 0x6f:
 479                       if (long_op)
 480                         outport( DX_reg(context), 4, *((DWORD *)data));
 481                       else
 482                         outport( DX_reg(context), 2, *((WORD *)data));
 483                       break;
 484                     }
 485                 }
 486               EIP_reg(context) += prefixlen + 1;
 487             }
 488             return TRUE;
 489
 490         case 0x8e: /* mov XX,segment_reg */
 491             {
 492                 WORD seg = *(WORD *)INSTR_GetOperandAddr( context, instr + 1,
 493                                                   long_addr, segprefix, &len );
 494                 if (!(seg = INSTR_ReplaceSelector( context, seg )))
 495                     break;  /* Unable to emulate it */
 496
 497                 switch((instr[1] >> 3) & 7)
 498                 {
 499                 case 0:
 500                     ES_reg(context) = seg;
 501                     EIP_reg(context) += prefixlen + len + 1;
 502                     return TRUE;
 503                 case 1:  /* cs */
 504                     break;
 505                 case 2:
 506                     SS_reg(context) = seg;
 507                     EIP_reg(context) += prefixlen + len + 1;
 508                     return TRUE;
 509                 case 3:
 510                     DS_reg(context) = seg;
 511                     EIP_reg(context) += prefixlen + len + 1;
 512                     return TRUE;
 513                 case 4:
 514 #ifdef FS_reg
 515                     FS_reg(context) = seg;
 516                     EIP_reg(context) += prefixlen + len + 1;
 517                     return TRUE;
 518 #endif
 519                 case 5:
 520 #ifdef GS_reg
 521                     GS_reg(context) = seg;
 522                     EIP_reg(context) += prefixlen + len + 1;
 523                     return TRUE;
 524 #endif
 525                 case 6:  /* unused */
 526                 case 7:  /* unused */
 527                     break;
 528                 }
 529             }
 530             break;  /* Unable to emulate it */
 531
 532         case 0xc4: /* les addr,reg */
 533         case 0xc5: /* lds addr,reg */
 534             if (INSTR_EmulateLDS( context, instr, long_op,
 535                                   long_addr, segprefix, &len ))
 536             {
 537                 EIP_reg(context) += prefixlen + len;
 538                 return TRUE;
 539             }
 540             break;  /* Unable to emulate it */
 541
 542         case 0xcd: /* int <XX> */
 543             if (long_op)
 544             {
 545                 fprintf(stderr, "int xx from 32-bit code is not supported.\n");
 546                 break;  /* Unable to emulate it */
 547             }
 548             else
 549             {
 550                 SEGPTR addr = INT_GetHandler( instr[1] );
 551                 WORD *stack = (WORD *)STACK_PTR( context );
 552                 /* Push the flags and return address on the stack */
 553                 *(--stack) = FL_reg(context);
 554                 *(--stack) = CS_reg(context);
 555                 *(--stack) = IP_reg(context) + prefixlen + 2;
 556                 STACK_reg(context) -= 3 * sizeof(WORD);
 557                 /* Jump to the interrupt handler */
 558                 CS_reg(context)  = HIWORD(addr);
 559                 EIP_reg(context) = LOWORD(addr);
 560             }
 561             return TRUE;
 562
 563         case 0xcf: /* iret */
 564             if (long_op)
 565             {
 566                 DWORD *stack = (DWORD *)STACK_PTR( context );
 567                 EIP_reg(context) = *stack++;
 568                 CS_reg(context)  = *stack++;
 569                 EFL_reg(context) = *stack;
 570                 STACK_reg(context) += 3*sizeof(DWORD);  /* Pop the return address and flags */
 571             }
 572             else
 573             {
 574                 WORD *stack = (WORD *)STACK_PTR( context );
 575                 EIP_reg(context) = *stack++;
 576                 CS_reg(context)  = *stack++;
 577                 FL_reg(context)  = *stack;
 578                 STACK_reg(context) += 3*sizeof(WORD);  /* Pop the return address and flags */
 579             }
 580             return TRUE;
 581
 582         case 0xe4: /* inb al,XX */
 583             AL_reg(context) = inport( instr[1], 1 );
 584             EIP_reg(context) += prefixlen + 2;
 585             return TRUE;
 586
 587         case 0xe5: /* in (e)ax,XX */
 588             if (long_op) EAX_reg(context) = inport( instr[1], 4 );
 589             else AX_reg(context) = inport( instr[1], 2 );
 590             EIP_reg(context) += prefixlen + 2;
 591             return TRUE;
 592
 593         case 0xe6: /* outb XX,al */
 594             outport( instr[1], 1, AL_reg(context) );
 595             EIP_reg(context) += prefixlen + 2;
 596             return TRUE;
 597
 598         case 0xe7: /* out XX,(e)ax */
 599             if (long_op) outport( instr[1], 4, EAX_reg(context) );
 600             else outport( instr[1], 2, AX_reg(context) );
 601             EIP_reg(context) += prefixlen + 2;
 602             return TRUE;
 603
 604         case 0xec: /* inb al,dx */
 605             AL_reg(context) = inport( DX_reg(context), 1 );
 606             EIP_reg(context) += prefixlen + 1;
 607             return TRUE;
 608
 609         case 0xed: /* in (e)ax,dx */
 610             if (long_op) EAX_reg(context) = inport( DX_reg(context), 4 );
 611             else AX_reg(context) = inport( DX_reg(context), 2 );
 612             EIP_reg(context) += prefixlen + 1;
 613             return TRUE;
 614
 615         case 0xee: /* outb dx,al */
 616             outport( DX_reg(context), 1, AL_reg(context) );
 617             EIP_reg(context) += prefixlen + 1;
 618             return TRUE;
 619
 620         case 0xef: /* out dx,(e)ax */
 621             if (long_op) outport( DX_reg(context), 4, EAX_reg(context) );
 622             else outport( DX_reg(context), 2, AX_reg(context) );
 623             EIP_reg(context) += prefixlen + 1;
 624             return TRUE;
 625
 626         case 0xfa: /* cli, ignored */
 627             EIP_reg(context) += prefixlen + 1;
 628             return TRUE;
 629
 630         case 0xfb: /* sti, ignored */
 631             EIP_reg(context) += prefixlen + 1;
 632             return TRUE;
 633     }
 634     fprintf(stderr, "Unexpected Windows program segfault"
 635                     " - opcode = %x\n", *instr);
 636     return FALSE;  /* Unable to emulate it */
 637 }