3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 static DEFINE_SPINLOCK(msi_lock
);
27 static struct msi_desc
* msi_desc
[NR_IRQS
] = { [0 ... NR_IRQS
-1] = NULL
};
28 static kmem_cache_t
* msi_cachep
;
30 static int pci_msi_enable
= 1;
31 static int last_alloc_vector
;
32 static int nr_released_vectors
;
33 static int nr_reserved_vectors
= NR_HP_RESERVED_VECTORS
;
34 static int nr_msix_devices
;
36 #ifndef CONFIG_X86_IO_APIC
37 int vector_irq
[NR_VECTORS
] = { [0 ... NR_VECTORS
- 1] = -1};
38 u8 irq_vector
[NR_IRQ_VECTORS
] = { FIRST_DEVICE_VECTOR
, 0 };
41 static void msi_cache_ctor(void *p
, kmem_cache_t
*cache
, unsigned long flags
)
43 memset(p
, 0, NR_IRQS
* sizeof(struct msi_desc
));
46 static int msi_cache_init(void)
48 msi_cachep
= kmem_cache_create("msi_cache",
49 NR_IRQS
* sizeof(struct msi_desc
),
50 0, SLAB_HWCACHE_ALIGN
, msi_cache_ctor
, NULL
);
57 static void msi_set_mask_bit(unsigned int vector
, int flag
)
59 struct msi_desc
*entry
;
61 entry
= (struct msi_desc
*)msi_desc
[vector
];
62 if (!entry
|| !entry
->dev
|| !entry
->mask_base
)
64 switch (entry
->msi_attrib
.type
) {
70 pos
= (long)entry
->mask_base
;
71 pci_read_config_dword(entry
->dev
, pos
, &mask_bits
);
74 pci_write_config_dword(entry
->dev
, pos
, mask_bits
);
79 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
80 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
;
81 writel(flag
, entry
->mask_base
+ offset
);
90 static void set_msi_affinity(unsigned int vector
, cpumask_t cpu_mask
)
92 struct msi_desc
*entry
;
93 struct msg_address address
;
94 unsigned int irq
= vector
;
96 entry
= (struct msi_desc
*)msi_desc
[vector
];
97 if (!entry
|| !entry
->dev
)
100 switch (entry
->msi_attrib
.type
) {
105 if (!(pos
= pci_find_capability(entry
->dev
, PCI_CAP_ID_MSI
)))
108 pci_read_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
109 &address
.lo_address
.value
);
110 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
111 address
.lo_address
.value
|= (cpu_mask_to_apicid(cpu_mask
) <<
112 MSI_TARGET_CPU_SHIFT
);
113 entry
->msi_attrib
.current_cpu
= cpu_mask_to_apicid(cpu_mask
);
114 pci_write_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
115 address
.lo_address
.value
);
116 set_native_irq_info(irq
, cpu_mask
);
119 case PCI_CAP_ID_MSIX
:
121 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
122 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
;
124 address
.lo_address
.value
= readl(entry
->mask_base
+ offset
);
125 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
126 address
.lo_address
.value
|= (cpu_mask_to_apicid(cpu_mask
) <<
127 MSI_TARGET_CPU_SHIFT
);
128 entry
->msi_attrib
.current_cpu
= cpu_mask_to_apicid(cpu_mask
);
129 writel(address
.lo_address
.value
, entry
->mask_base
+ offset
);
130 set_native_irq_info(irq
, cpu_mask
);
137 #endif /* CONFIG_SMP */
139 static void mask_MSI_irq(unsigned int vector
)
141 msi_set_mask_bit(vector
, 1);
144 static void unmask_MSI_irq(unsigned int vector
)
146 msi_set_mask_bit(vector
, 0);
149 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector
)
151 struct msi_desc
*entry
;
154 spin_lock_irqsave(&msi_lock
, flags
);
155 entry
= msi_desc
[vector
];
156 if (!entry
|| !entry
->dev
) {
157 spin_unlock_irqrestore(&msi_lock
, flags
);
160 entry
->msi_attrib
.state
= 1; /* Mark it active */
161 spin_unlock_irqrestore(&msi_lock
, flags
);
163 return 0; /* never anything pending */
166 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector
)
168 startup_msi_irq_wo_maskbit(vector
);
169 unmask_MSI_irq(vector
);
170 return 0; /* never anything pending */
173 static void shutdown_msi_irq(unsigned int vector
)
175 struct msi_desc
*entry
;
178 spin_lock_irqsave(&msi_lock
, flags
);
179 entry
= msi_desc
[vector
];
180 if (entry
&& entry
->dev
)
181 entry
->msi_attrib
.state
= 0; /* Mark it not active */
182 spin_unlock_irqrestore(&msi_lock
, flags
);
185 static void end_msi_irq_wo_maskbit(unsigned int vector
)
187 move_native_irq(vector
);
191 static void end_msi_irq_w_maskbit(unsigned int vector
)
193 move_native_irq(vector
);
194 unmask_MSI_irq(vector
);
198 static void do_nothing(unsigned int vector
)
203 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
204 * which implement the MSI-X Capability Structure.
206 static struct hw_interrupt_type msix_irq_type
= {
207 .typename
= "PCI-MSI-X",
208 .startup
= startup_msi_irq_w_maskbit
,
209 .shutdown
= shutdown_msi_irq
,
210 .enable
= unmask_MSI_irq
,
211 .disable
= mask_MSI_irq
,
213 .end
= end_msi_irq_w_maskbit
,
214 .set_affinity
= set_msi_irq_affinity
218 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
219 * which implement the MSI Capability Structure with
220 * Mask-and-Pending Bits.
222 static struct hw_interrupt_type msi_irq_w_maskbit_type
= {
223 .typename
= "PCI-MSI",
224 .startup
= startup_msi_irq_w_maskbit
,
225 .shutdown
= shutdown_msi_irq
,
226 .enable
= unmask_MSI_irq
,
227 .disable
= mask_MSI_irq
,
229 .end
= end_msi_irq_w_maskbit
,
230 .set_affinity
= set_msi_irq_affinity
234 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
235 * which implement the MSI Capability Structure without
236 * Mask-and-Pending Bits.
238 static struct hw_interrupt_type msi_irq_wo_maskbit_type
= {
239 .typename
= "PCI-MSI",
240 .startup
= startup_msi_irq_wo_maskbit
,
241 .shutdown
= shutdown_msi_irq
,
242 .enable
= do_nothing
,
243 .disable
= do_nothing
,
245 .end
= end_msi_irq_wo_maskbit
,
246 .set_affinity
= set_msi_irq_affinity
249 static void msi_data_init(struct msg_data
*msi_data
,
252 memset(msi_data
, 0, sizeof(struct msg_data
));
253 msi_data
->vector
= (u8
)vector
;
254 msi_data
->delivery_mode
= MSI_DELIVERY_MODE
;
255 msi_data
->level
= MSI_LEVEL_MODE
;
256 msi_data
->trigger
= MSI_TRIGGER_MODE
;
259 static void msi_address_init(struct msg_address
*msi_address
)
261 unsigned int dest_id
;
263 memset(msi_address
, 0, sizeof(struct msg_address
));
264 msi_address
->hi_address
= (u32
)0;
265 dest_id
= (MSI_ADDRESS_HEADER
<< MSI_ADDRESS_HEADER_SHIFT
);
266 msi_address
->lo_address
.u
.dest_mode
= MSI_DEST_MODE
;
267 msi_address
->lo_address
.u
.redirection_hint
= MSI_REDIRECTION_HINT_MODE
;
268 msi_address
->lo_address
.u
.dest_id
= dest_id
;
269 msi_address
->lo_address
.value
|= (MSI_TARGET_CPU
<< MSI_TARGET_CPU_SHIFT
);
272 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
);
273 static int assign_msi_vector(void)
275 static int new_vector_avail
= 1;
280 * msi_lock is provided to ensure that successful allocation of MSI
281 * vector is assigned unique among drivers.
283 spin_lock_irqsave(&msi_lock
, flags
);
285 if (!new_vector_avail
) {
289 * vector_irq[] = -1 indicates that this specific vector is:
290 * - assigned for MSI (since MSI have no associated IRQ) or
291 * - assigned for legacy if less than 16, or
292 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
293 * vector_irq[] = 0 indicates that this vector, previously
294 * assigned for MSI, is freed by hotplug removed operations.
295 * This vector will be reused for any subsequent hotplug added
297 * vector_irq[] > 0 indicates that this vector is assigned for
298 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
299 * vector-to-IOxAPIC IRQ mapping.
301 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
302 if (vector_irq
[vector
] != 0)
304 free_vector
= vector
;
305 if (!msi_desc
[vector
])
311 spin_unlock_irqrestore(&msi_lock
, flags
);
314 vector_irq
[free_vector
] = -1;
315 nr_released_vectors
--;
316 spin_unlock_irqrestore(&msi_lock
, flags
);
317 if (msi_desc
[free_vector
] != NULL
) {
321 /* free all linked vectors before re-assign */
323 spin_lock_irqsave(&msi_lock
, flags
);
324 dev
= msi_desc
[free_vector
]->dev
;
325 tail
= msi_desc
[free_vector
]->link
.tail
;
326 spin_unlock_irqrestore(&msi_lock
, flags
);
327 msi_free_vector(dev
, tail
, 1);
328 } while (free_vector
!= tail
);
333 vector
= assign_irq_vector(AUTO_ASSIGN
);
334 last_alloc_vector
= vector
;
335 if (vector
== LAST_DEVICE_VECTOR
)
336 new_vector_avail
= 0;
338 spin_unlock_irqrestore(&msi_lock
, flags
);
342 static int get_new_vector(void)
346 if ((vector
= assign_msi_vector()) > 0)
347 set_intr_gate(vector
, interrupt
[vector
]);
352 static int msi_init(void)
354 static int status
= -ENOMEM
;
361 printk(KERN_WARNING
"PCI: MSI quirk detected. MSI disabled.\n");
366 if ((status
= msi_cache_init()) < 0) {
368 printk(KERN_WARNING
"PCI: MSI cache init failed\n");
371 last_alloc_vector
= assign_irq_vector(AUTO_ASSIGN
);
372 if (last_alloc_vector
< 0) {
374 printk(KERN_WARNING
"PCI: No interrupt vectors available for MSI\n");
378 vector_irq
[last_alloc_vector
] = 0;
379 nr_released_vectors
++;
384 static int get_msi_vector(struct pci_dev
*dev
)
386 return get_new_vector();
389 static struct msi_desc
* alloc_msi_entry(void)
391 struct msi_desc
*entry
;
393 entry
= kmem_cache_alloc(msi_cachep
, SLAB_KERNEL
);
397 memset(entry
, 0, sizeof(struct msi_desc
));
398 entry
->link
.tail
= entry
->link
.head
= 0; /* single message */
404 static void attach_msi_entry(struct msi_desc
*entry
, int vector
)
408 spin_lock_irqsave(&msi_lock
, flags
);
409 msi_desc
[vector
] = entry
;
410 spin_unlock_irqrestore(&msi_lock
, flags
);
413 static void irq_handler_init(int cap_id
, int pos
, int mask
)
415 spin_lock(&irq_desc
[pos
].lock
);
416 if (cap_id
== PCI_CAP_ID_MSIX
)
417 irq_desc
[pos
].handler
= &msix_irq_type
;
420 irq_desc
[pos
].handler
= &msi_irq_wo_maskbit_type
;
422 irq_desc
[pos
].handler
= &msi_irq_w_maskbit_type
;
424 spin_unlock(&irq_desc
[pos
].lock
);
427 static void enable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
431 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
432 if (type
== PCI_CAP_ID_MSI
) {
433 /* Set enabled bits to single MSI & enable MSI_enable bit */
434 msi_enable(control
, 1);
435 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
437 msix_enable(control
);
438 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
440 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
441 /* PCI Express Endpoint device detected */
442 pci_intx(dev
, 0); /* disable intx */
446 void disable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
450 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
451 if (type
== PCI_CAP_ID_MSI
) {
452 /* Set enabled bits to single MSI & enable MSI_enable bit */
453 msi_disable(control
);
454 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
456 msix_disable(control
);
457 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
459 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
460 /* PCI Express Endpoint device detected */
461 pci_intx(dev
, 1); /* enable intx */
465 static int msi_lookup_vector(struct pci_dev
*dev
, int type
)
470 spin_lock_irqsave(&msi_lock
, flags
);
471 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
472 if (!msi_desc
[vector
] || msi_desc
[vector
]->dev
!= dev
||
473 msi_desc
[vector
]->msi_attrib
.type
!= type
||
474 msi_desc
[vector
]->msi_attrib
.default_vector
!= dev
->irq
)
476 spin_unlock_irqrestore(&msi_lock
, flags
);
477 /* This pre-assigned MSI vector for this device
478 already exits. Override dev->irq with this vector */
482 spin_unlock_irqrestore(&msi_lock
, flags
);
487 void pci_scan_msi_device(struct pci_dev
*dev
)
492 if (pci_find_capability(dev
, PCI_CAP_ID_MSIX
) > 0)
494 else if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0)
495 nr_reserved_vectors
++;
499 * msi_capability_init - configure device's MSI capability structure
500 * @dev: pointer to the pci_dev data structure of MSI device function
502 * Setup the MSI capability structure of device function with a single
503 * MSI vector, regardless of device function is capable of handling
504 * multiple messages. A return of zero indicates the successful setup
505 * of an entry zero with the new MSI vector or non-zero for otherwise.
507 static int msi_capability_init(struct pci_dev
*dev
)
509 struct msi_desc
*entry
;
510 struct msg_address address
;
511 struct msg_data data
;
515 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
516 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
517 /* MSI Entry Initialization */
518 if (!(entry
= alloc_msi_entry()))
521 if ((vector
= get_msi_vector(dev
)) < 0) {
522 kmem_cache_free(msi_cachep
, entry
);
525 entry
->link
.head
= vector
;
526 entry
->link
.tail
= vector
;
527 entry
->msi_attrib
.type
= PCI_CAP_ID_MSI
;
528 entry
->msi_attrib
.state
= 0; /* Mark it not active */
529 entry
->msi_attrib
.entry_nr
= 0;
530 entry
->msi_attrib
.maskbit
= is_mask_bit_support(control
);
531 entry
->msi_attrib
.default_vector
= dev
->irq
; /* Save IOAPIC IRQ */
534 if (is_mask_bit_support(control
)) {
535 entry
->mask_base
= (void __iomem
*)(long)msi_mask_bits_reg(pos
,
536 is_64bit_address(control
));
538 /* Replace with MSI handler */
539 irq_handler_init(PCI_CAP_ID_MSI
, vector
, entry
->msi_attrib
.maskbit
);
540 /* Configure MSI capability structure */
541 msi_address_init(&address
);
542 msi_data_init(&data
, vector
);
543 entry
->msi_attrib
.current_cpu
= ((address
.lo_address
.u
.dest_id
>>
544 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
545 pci_write_config_dword(dev
, msi_lower_address_reg(pos
),
546 address
.lo_address
.value
);
547 if (is_64bit_address(control
)) {
548 pci_write_config_dword(dev
,
549 msi_upper_address_reg(pos
), address
.hi_address
);
550 pci_write_config_word(dev
,
551 msi_data_reg(pos
, 1), *((u32
*)&data
));
553 pci_write_config_word(dev
,
554 msi_data_reg(pos
, 0), *((u32
*)&data
));
555 if (entry
->msi_attrib
.maskbit
) {
556 unsigned int maskbits
, temp
;
557 /* All MSIs are unmasked by default, Mask them all */
558 pci_read_config_dword(dev
,
559 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
561 temp
= (1 << multi_msi_capable(control
));
562 temp
= ((temp
- 1) & ~temp
);
564 pci_write_config_dword(dev
,
565 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
568 attach_msi_entry(entry
, vector
);
569 /* Set MSI enabled bits */
570 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
576 * msix_capability_init - configure device's MSI-X capability
577 * @dev: pointer to the pci_dev data structure of MSI-X device function
578 * @entries: pointer to an array of struct msix_entry entries
579 * @nvec: number of @entries
581 * Setup the MSI-X capability structure of device function with a
582 * single MSI-X vector. A return of zero indicates the successful setup of
583 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
585 static int msix_capability_init(struct pci_dev
*dev
,
586 struct msix_entry
*entries
, int nvec
)
588 struct msi_desc
*head
= NULL
, *tail
= NULL
, *entry
= NULL
;
589 struct msg_address address
;
590 struct msg_data data
;
591 int vector
, pos
, i
, j
, nr_entries
, temp
= 0;
592 u32 phys_addr
, table_offset
;
597 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
598 /* Request & Map MSI-X table region */
599 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
600 nr_entries
= multi_msix_capable(control
);
601 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
603 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
604 phys_addr
= pci_resource_start (dev
, bir
);
605 phys_addr
+= (u32
)(table_offset
& ~PCI_MSIX_FLAGS_BIRMASK
);
606 base
= ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
610 /* MSI-X Table Initialization */
611 for (i
= 0; i
< nvec
; i
++) {
612 entry
= alloc_msi_entry();
615 if ((vector
= get_msi_vector(dev
)) < 0)
618 j
= entries
[i
].entry
;
619 entries
[i
].vector
= vector
;
620 entry
->msi_attrib
.type
= PCI_CAP_ID_MSIX
;
621 entry
->msi_attrib
.state
= 0; /* Mark it not active */
622 entry
->msi_attrib
.entry_nr
= j
;
623 entry
->msi_attrib
.maskbit
= 1;
624 entry
->msi_attrib
.default_vector
= dev
->irq
;
626 entry
->mask_base
= base
;
628 entry
->link
.head
= vector
;
629 entry
->link
.tail
= vector
;
632 entry
->link
.head
= temp
;
633 entry
->link
.tail
= tail
->link
.tail
;
634 tail
->link
.tail
= vector
;
635 head
->link
.head
= vector
;
639 /* Replace with MSI-X handler */
640 irq_handler_init(PCI_CAP_ID_MSIX
, vector
, 1);
641 /* Configure MSI-X capability structure */
642 msi_address_init(&address
);
643 msi_data_init(&data
, vector
);
644 entry
->msi_attrib
.current_cpu
=
645 ((address
.lo_address
.u
.dest_id
>>
646 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
647 writel(address
.lo_address
.value
,
648 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
649 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
650 writel(address
.hi_address
,
651 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
652 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
654 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
655 PCI_MSIX_ENTRY_DATA_OFFSET
);
656 attach_msi_entry(entry
, vector
);
660 for (; i
>= 0; i
--) {
661 vector
= (entries
+ i
)->vector
;
662 msi_free_vector(dev
, vector
, 0);
663 (entries
+ i
)->vector
= 0;
667 /* Set MSI-X enabled bits */
668 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
674 * pci_enable_msi - configure device's MSI capability structure
675 * @dev: pointer to the pci_dev data structure of MSI device function
677 * Setup the MSI capability structure of device function with
678 * a single MSI vector upon its software driver call to request for
679 * MSI mode enabled on its hardware device function. A return of zero
680 * indicates the successful setup of an entry zero with the new MSI
681 * vector or non-zero for otherwise.
683 int pci_enable_msi(struct pci_dev
* dev
)
685 int pos
, temp
, status
= -EINVAL
;
688 if (!pci_msi_enable
|| !dev
)
696 if ((status
= msi_init()) < 0)
699 if (!(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)))
702 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
703 if (control
& PCI_MSI_FLAGS_ENABLE
)
704 return 0; /* Already in MSI mode */
706 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
710 spin_lock_irqsave(&msi_lock
, flags
);
711 if (!vector_irq
[dev
->irq
]) {
712 msi_desc
[dev
->irq
]->msi_attrib
.state
= 0;
713 vector_irq
[dev
->irq
] = -1;
714 nr_released_vectors
--;
715 spin_unlock_irqrestore(&msi_lock
, flags
);
716 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
719 spin_unlock_irqrestore(&msi_lock
, flags
);
722 /* Check whether driver already requested for MSI-X vectors */
723 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)) > 0 &&
724 !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
725 printk(KERN_INFO
"PCI: %s: Can't enable MSI. "
726 "Device already has MSI-X vectors assigned\n",
731 status
= msi_capability_init(dev
);
734 nr_reserved_vectors
--; /* Only MSI capable */
735 else if (nr_msix_devices
> 0)
736 nr_msix_devices
--; /* Both MSI and MSI-X capable,
737 but choose enabling MSI */
743 void pci_disable_msi(struct pci_dev
* dev
)
745 struct msi_desc
*entry
;
746 int pos
, default_vector
;
750 if (!dev
|| !(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)))
753 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
754 if (!(control
& PCI_MSI_FLAGS_ENABLE
))
757 spin_lock_irqsave(&msi_lock
, flags
);
758 entry
= msi_desc
[dev
->irq
];
759 if (!entry
|| !entry
->dev
|| entry
->msi_attrib
.type
!= PCI_CAP_ID_MSI
) {
760 spin_unlock_irqrestore(&msi_lock
, flags
);
763 if (entry
->msi_attrib
.state
) {
764 spin_unlock_irqrestore(&msi_lock
, flags
);
765 printk(KERN_WARNING
"PCI: %s: pci_disable_msi() called without "
766 "free_irq() on MSI vector %d\n",
767 pci_name(dev
), dev
->irq
);
768 BUG_ON(entry
->msi_attrib
.state
> 0);
770 vector_irq
[dev
->irq
] = 0; /* free it */
771 nr_released_vectors
++;
772 default_vector
= entry
->msi_attrib
.default_vector
;
773 spin_unlock_irqrestore(&msi_lock
, flags
);
774 /* Restore dev->irq to its default pin-assertion vector */
775 dev
->irq
= default_vector
;
776 disable_msi_mode(dev
, pci_find_capability(dev
, PCI_CAP_ID_MSI
),
781 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
)
783 struct msi_desc
*entry
;
784 int head
, entry_nr
, type
;
788 spin_lock_irqsave(&msi_lock
, flags
);
789 entry
= msi_desc
[vector
];
790 if (!entry
|| entry
->dev
!= dev
) {
791 spin_unlock_irqrestore(&msi_lock
, flags
);
794 type
= entry
->msi_attrib
.type
;
795 entry_nr
= entry
->msi_attrib
.entry_nr
;
796 head
= entry
->link
.head
;
797 base
= entry
->mask_base
;
798 msi_desc
[entry
->link
.head
]->link
.tail
= entry
->link
.tail
;
799 msi_desc
[entry
->link
.tail
]->link
.head
= entry
->link
.head
;
802 vector_irq
[vector
] = 0;
803 nr_released_vectors
++;
805 msi_desc
[vector
] = NULL
;
806 spin_unlock_irqrestore(&msi_lock
, flags
);
808 kmem_cache_free(msi_cachep
, entry
);
810 if (type
== PCI_CAP_ID_MSIX
) {
813 entry_nr
* PCI_MSIX_ENTRY_SIZE
+
814 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
);
816 if (head
== vector
) {
818 * Detect last MSI-X vector to be released.
819 * Release the MSI-X memory-mapped table.
822 u32 phys_addr
, table_offset
;
826 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
827 pci_read_config_word(dev
, msi_control_reg(pos
),
829 nr_entries
= multi_msix_capable(control
);
830 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
832 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
833 phys_addr
= pci_resource_start (dev
, bir
);
834 phys_addr
+= (u32
)(table_offset
&
835 ~PCI_MSIX_FLAGS_BIRMASK
);
843 static int reroute_msix_table(int head
, struct msix_entry
*entries
, int *nvec
)
845 int vector
= head
, tail
= 0;
846 int i
, j
= 0, nr_entries
= 0;
850 spin_lock_irqsave(&msi_lock
, flags
);
851 while (head
!= tail
) {
853 tail
= msi_desc
[vector
]->link
.tail
;
854 if (entries
[0].entry
== msi_desc
[vector
]->msi_attrib
.entry_nr
)
858 if (*nvec
> nr_entries
) {
859 spin_unlock_irqrestore(&msi_lock
, flags
);
863 vector
= ((j
> 0) ? j
: head
);
864 for (i
= 0; i
< *nvec
; i
++) {
865 j
= msi_desc
[vector
]->msi_attrib
.entry_nr
;
866 msi_desc
[vector
]->msi_attrib
.state
= 0; /* Mark it not active */
867 vector_irq
[vector
] = -1; /* Mark it busy */
868 nr_released_vectors
--;
869 entries
[i
].vector
= vector
;
870 if (j
!= (entries
+ i
)->entry
) {
871 base
= msi_desc
[vector
]->mask_base
;
872 msi_desc
[vector
]->msi_attrib
.entry_nr
=
873 (entries
+ i
)->entry
;
874 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
875 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
), base
+
876 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
877 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
878 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
879 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
), base
+
880 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
881 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
882 writel( (readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
883 PCI_MSIX_ENTRY_DATA_OFFSET
) & 0xff00) | vector
,
884 base
+ (entries
+i
)->entry
*PCI_MSIX_ENTRY_SIZE
+
885 PCI_MSIX_ENTRY_DATA_OFFSET
);
887 vector
= msi_desc
[vector
]->link
.tail
;
889 spin_unlock_irqrestore(&msi_lock
, flags
);
895 * pci_enable_msix - configure device's MSI-X capability structure
896 * @dev: pointer to the pci_dev data structure of MSI-X device function
897 * @entries: pointer to an array of MSI-X entries
898 * @nvec: number of MSI-X vectors requested for allocation by device driver
900 * Setup the MSI-X capability structure of device function with the number
901 * of requested vectors upon its software driver call to request for
902 * MSI-X mode enabled on its hardware device function. A return of zero
903 * indicates the successful configuration of MSI-X capability structure
904 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
905 * Or a return of > 0 indicates that driver request is exceeding the number
906 * of vectors available. Driver should use the returned value to re-send
909 int pci_enable_msix(struct pci_dev
* dev
, struct msix_entry
*entries
, int nvec
)
911 int status
, pos
, nr_entries
, free_vectors
;
916 if (!pci_msi_enable
|| !dev
|| !entries
)
919 if ((status
= msi_init()) < 0)
922 if (!(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)))
925 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
926 if (control
& PCI_MSIX_FLAGS_ENABLE
)
927 return -EINVAL
; /* Already in MSI-X mode */
929 nr_entries
= multi_msix_capable(control
);
930 if (nvec
> nr_entries
)
933 /* Check for any invalid entries */
934 for (i
= 0; i
< nvec
; i
++) {
935 if (entries
[i
].entry
>= nr_entries
)
936 return -EINVAL
; /* invalid entry */
937 for (j
= i
+ 1; j
< nvec
; j
++) {
938 if (entries
[i
].entry
== entries
[j
].entry
)
939 return -EINVAL
; /* duplicate entry */
943 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
946 /* Reroute MSI-X table */
947 if (reroute_msix_table(dev
->irq
, entries
, &nr_entries
)) {
948 /* #requested > #previous-assigned */
953 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
956 /* Check whether driver already requested for MSI vector */
957 if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0 &&
958 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
959 printk(KERN_INFO
"PCI: %s: Can't enable MSI-X. "
960 "Device already has an MSI vector assigned\n",
966 spin_lock_irqsave(&msi_lock
, flags
);
968 * msi_lock is provided to ensure that enough vectors resources are
969 * available before granting.
971 free_vectors
= pci_vector_resources(last_alloc_vector
,
972 nr_released_vectors
);
973 /* Ensure that each MSI/MSI-X device has one vector reserved by
974 default to avoid any MSI-X driver to take all available
976 free_vectors
-= nr_reserved_vectors
;
977 /* Find the average of free vectors among MSI-X devices */
978 if (nr_msix_devices
> 0)
979 free_vectors
/= nr_msix_devices
;
980 spin_unlock_irqrestore(&msi_lock
, flags
);
982 if (nvec
> free_vectors
) {
983 if (free_vectors
> 0)
989 status
= msix_capability_init(dev
, entries
, nvec
);
990 if (!status
&& nr_msix_devices
> 0)
996 void pci_disable_msix(struct pci_dev
* dev
)
1001 if (!dev
|| !(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)))
1004 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
1005 if (!(control
& PCI_MSIX_FLAGS_ENABLE
))
1009 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1010 int state
, vector
, head
, tail
= 0, warning
= 0;
1011 unsigned long flags
;
1013 vector
= head
= dev
->irq
;
1014 spin_lock_irqsave(&msi_lock
, flags
);
1015 while (head
!= tail
) {
1016 state
= msi_desc
[vector
]->msi_attrib
.state
;
1020 vector_irq
[vector
] = 0; /* free it */
1021 nr_released_vectors
++;
1023 tail
= msi_desc
[vector
]->link
.tail
;
1026 spin_unlock_irqrestore(&msi_lock
, flags
);
1029 printk(KERN_WARNING
"PCI: %s: pci_disable_msix() called without "
1030 "free_irq() on all MSI-X vectors\n",
1032 BUG_ON(warning
> 0);
1035 disable_msi_mode(dev
,
1036 pci_find_capability(dev
, PCI_CAP_ID_MSIX
),
1044 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1045 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1047 * Being called during hotplug remove, from which the device function
1048 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1049 * allocated for this device function, are reclaimed to unused state,
1050 * which may be used later on.
1052 void msi_remove_pci_irq_vectors(struct pci_dev
* dev
)
1054 int state
, pos
, temp
;
1055 unsigned long flags
;
1057 if (!pci_msi_enable
|| !dev
)
1060 temp
= dev
->irq
; /* Save IOAPIC IRQ */
1061 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)) > 0 &&
1062 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
1063 spin_lock_irqsave(&msi_lock
, flags
);
1064 state
= msi_desc
[dev
->irq
]->msi_attrib
.state
;
1065 spin_unlock_irqrestore(&msi_lock
, flags
);
1067 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1068 "called without free_irq() on MSI vector %d\n",
1069 pci_name(dev
), dev
->irq
);
1071 } else /* Release MSI vector assigned to this device */
1072 msi_free_vector(dev
, dev
->irq
, 0);
1073 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1075 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)) > 0 &&
1076 !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1077 int vector
, head
, tail
= 0, warning
= 0;
1078 void __iomem
*base
= NULL
;
1080 vector
= head
= dev
->irq
;
1081 while (head
!= tail
) {
1082 spin_lock_irqsave(&msi_lock
, flags
);
1083 state
= msi_desc
[vector
]->msi_attrib
.state
;
1084 tail
= msi_desc
[vector
]->link
.tail
;
1085 base
= msi_desc
[vector
]->mask_base
;
1086 spin_unlock_irqrestore(&msi_lock
, flags
);
1089 else if (vector
!= head
) /* Release MSI-X vector */
1090 msi_free_vector(dev
, vector
, 0);
1093 msi_free_vector(dev
, vector
, 0);
1095 /* Force to release the MSI-X memory-mapped table */
1096 u32 phys_addr
, table_offset
;
1100 pci_read_config_word(dev
, msi_control_reg(pos
),
1102 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
1104 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
1105 phys_addr
= pci_resource_start (dev
, bir
);
1106 phys_addr
+= (u32
)(table_offset
&
1107 ~PCI_MSIX_FLAGS_BIRMASK
);
1109 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1110 "called without free_irq() on all MSI-X vectors\n",
1112 BUG_ON(warning
> 0);
1114 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1118 EXPORT_SYMBOL(pci_enable_msi
);
1119 EXPORT_SYMBOL(pci_disable_msi
);
1120 EXPORT_SYMBOL(pci_enable_msix
);
1121 EXPORT_SYMBOL(pci_disable_msix
);