[MTD] OneNAND: Power Management (PM) support
[wandboard.git] / drivers / mtd / onenand / onenand_base.c
bloba002d4025b2945771b7f85eda40882002d341be2
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/onenand.h>
17 #include <linux/mtd/partitions.h>
19 #include <asm/io.h>
21 /**
22 * onenand_oob_64 - oob info for large (2KB) page
24 static struct nand_oobinfo onenand_oob_64 = {
25 .useecc = MTD_NANDECC_AUTOPLACE,
26 .eccbytes = 20,
27 .eccpos = {
28 8, 9, 10, 11, 12,
29 24, 25, 26, 27, 28,
30 40, 41, 42, 43, 44,
31 56, 57, 58, 59, 60,
33 .oobfree = {
34 {2, 3}, {14, 2}, {18, 3}, {30, 2},
35 {24, 3}, {46, 2}, {40, 3}, {62, 2} }
38 /**
39 * onenand_oob_32 - oob info for middle (1KB) page
41 static struct nand_oobinfo onenand_oob_32 = {
42 .useecc = MTD_NANDECC_AUTOPLACE,
43 .eccbytes = 10,
44 .eccpos = {
45 8, 9, 10, 11, 12,
46 24, 25, 26, 27, 28,
48 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
51 static const unsigned char ffchars[] = {
52 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
53 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
62 /**
63 * onenand_readw - [OneNAND Interface] Read OneNAND register
64 * @param addr address to read
66 * Read OneNAND register
68 static unsigned short onenand_readw(void __iomem *addr)
70 return readw(addr);
73 /**
74 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
75 * @param value value to write
76 * @param addr address to write
78 * Write OneNAND register with value
80 static void onenand_writew(unsigned short value, void __iomem *addr)
82 writew(value, addr);
85 /**
86 * onenand_block_address - [DEFAULT] Get block address
87 * @param device the device id
88 * @param block the block
89 * @return translated block address if DDP, otherwise same
91 * Setup Start Address 1 Register (F100h)
93 static int onenand_block_address(int device, int block)
95 if (device & ONENAND_DEVICE_IS_DDP) {
96 /* Device Flash Core select, NAND Flash Block Address */
97 int dfs = 0, density, mask;
99 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
100 mask = (1 << (density + 6));
102 if (block & mask)
103 dfs = 1;
105 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
108 return block;
112 * onenand_bufferram_address - [DEFAULT] Get bufferram address
113 * @param device the device id
114 * @param block the block
115 * @return set DBS value if DDP, otherwise 0
117 * Setup Start Address 2 Register (F101h) for DDP
119 static int onenand_bufferram_address(int device, int block)
121 if (device & ONENAND_DEVICE_IS_DDP) {
122 /* Device BufferRAM Select */
123 int dbs = 0, density, mask;
125 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
126 mask = (1 << (density + 6));
128 if (block & mask)
129 dbs = 1;
131 return (dbs << ONENAND_DDP_SHIFT);
134 return 0;
138 * onenand_page_address - [DEFAULT] Get page address
139 * @param page the page address
140 * @param sector the sector address
141 * @return combined page and sector address
143 * Setup Start Address 8 Register (F107h)
145 static int onenand_page_address(int page, int sector)
147 /* Flash Page Address, Flash Sector Address */
148 int fpa, fsa;
150 fpa = page & ONENAND_FPA_MASK;
151 fsa = sector & ONENAND_FSA_MASK;
153 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
157 * onenand_buffer_address - [DEFAULT] Get buffer address
158 * @param dataram1 DataRAM index
159 * @param sectors the sector address
160 * @param count the number of sectors
161 * @return the start buffer value
163 * Setup Start Buffer Register (F200h)
165 static int onenand_buffer_address(int dataram1, int sectors, int count)
167 int bsa, bsc;
169 /* BufferRAM Sector Address */
170 bsa = sectors & ONENAND_BSA_MASK;
172 if (dataram1)
173 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
174 else
175 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
177 /* BufferRAM Sector Count */
178 bsc = count & ONENAND_BSC_MASK;
180 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
184 * onenand_command - [DEFAULT] Send command to OneNAND device
185 * @param mtd MTD device structure
186 * @param cmd the command to be sent
187 * @param addr offset to read from or write to
188 * @param len number of bytes to read or write
190 * Send command to OneNAND device. This function is used for middle/large page
191 * devices (1KB/2KB Bytes per page)
193 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
195 struct onenand_chip *this = mtd->priv;
196 int value, readcmd = 0;
197 int block, page;
198 /* Now we use page size operation */
199 int sectors = 4, count = 4;
201 /* Address translation */
202 switch (cmd) {
203 case ONENAND_CMD_UNLOCK:
204 case ONENAND_CMD_LOCK:
205 case ONENAND_CMD_LOCK_TIGHT:
206 block = -1;
207 page = -1;
208 break;
210 case ONENAND_CMD_ERASE:
211 case ONENAND_CMD_BUFFERRAM:
212 block = (int) (addr >> this->erase_shift);
213 page = -1;
214 break;
216 default:
217 block = (int) (addr >> this->erase_shift);
218 page = (int) (addr >> this->page_shift);
219 page &= this->page_mask;
220 break;
223 /* NOTE: The setting order of the registers is very important! */
224 if (cmd == ONENAND_CMD_BUFFERRAM) {
225 /* Select DataRAM for DDP */
226 value = onenand_bufferram_address(this->device_id, block);
227 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
229 /* Switch to the next data buffer */
230 ONENAND_SET_NEXT_BUFFERRAM(this);
232 return 0;
235 if (block != -1) {
236 /* Write 'DFS, FBA' of Flash */
237 value = onenand_block_address(this->device_id, block);
238 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
241 if (page != -1) {
242 int dataram;
244 switch (cmd) {
245 case ONENAND_CMD_READ:
246 case ONENAND_CMD_READOOB:
247 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
248 readcmd = 1;
249 break;
251 default:
252 dataram = ONENAND_CURRENT_BUFFERRAM(this);
253 break;
256 /* Write 'FPA, FSA' of Flash */
257 value = onenand_page_address(page, sectors);
258 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
260 /* Write 'BSA, BSC' of DataRAM */
261 value = onenand_buffer_address(dataram, sectors, count);
262 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
264 if (readcmd) {
265 /* Select DataRAM for DDP */
266 value = onenand_bufferram_address(this->device_id, block);
267 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
271 /* Interrupt clear */
272 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
274 /* Write command */
275 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
277 return 0;
281 * onenand_wait - [DEFAULT] wait until the command is done
282 * @param mtd MTD device structure
283 * @param state state to select the max. timeout value
285 * Wait for command done. This applies to all OneNAND command
286 * Read can take up to 30us, erase up to 2ms and program up to 350us
287 * according to general OneNAND specs
289 static int onenand_wait(struct mtd_info *mtd, int state)
291 struct onenand_chip * this = mtd->priv;
292 unsigned long timeout;
293 unsigned int flags = ONENAND_INT_MASTER;
294 unsigned int interrupt = 0;
295 unsigned int ctrl, ecc;
297 /* The 20 msec is enough */
298 timeout = jiffies + msecs_to_jiffies(20);
299 while (time_before(jiffies, timeout)) {
300 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
302 if (interrupt & flags)
303 break;
305 if (state != FL_READING)
306 cond_resched();
308 /* To get correct interrupt status in timeout case */
309 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
311 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
313 if (ctrl & ONENAND_CTRL_ERROR) {
314 /* It maybe occur at initial bad block */
315 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
316 /* Clear other interrupt bits for preventing ECC error */
317 interrupt &= ONENAND_INT_MASTER;
320 if (ctrl & ONENAND_CTRL_LOCK) {
321 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
322 return -EACCES;
325 if (interrupt & ONENAND_INT_READ) {
326 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
327 if (ecc & ONENAND_ECC_2BIT_ALL) {
328 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
329 return -EBADMSG;
333 return 0;
337 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
338 * @param mtd MTD data structure
339 * @param area BufferRAM area
340 * @return offset given area
342 * Return BufferRAM offset given area
344 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
346 struct onenand_chip *this = mtd->priv;
348 if (ONENAND_CURRENT_BUFFERRAM(this)) {
349 if (area == ONENAND_DATARAM)
350 return mtd->oobblock;
351 if (area == ONENAND_SPARERAM)
352 return mtd->oobsize;
355 return 0;
359 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
360 * @param mtd MTD data structure
361 * @param area BufferRAM area
362 * @param buffer the databuffer to put/get data
363 * @param offset offset to read from or write to
364 * @param count number of bytes to read/write
366 * Read the BufferRAM area
368 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
369 unsigned char *buffer, int offset, size_t count)
371 struct onenand_chip *this = mtd->priv;
372 void __iomem *bufferram;
374 bufferram = this->base + area;
376 bufferram += onenand_bufferram_offset(mtd, area);
378 memcpy(buffer, bufferram + offset, count);
380 return 0;
384 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
385 * @param mtd MTD data structure
386 * @param area BufferRAM area
387 * @param buffer the databuffer to put/get data
388 * @param offset offset to read from or write to
389 * @param count number of bytes to read/write
391 * Read the BufferRAM area with Sync. Burst Mode
393 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
394 unsigned char *buffer, int offset, size_t count)
396 struct onenand_chip *this = mtd->priv;
397 void __iomem *bufferram;
399 bufferram = this->base + area;
401 bufferram += onenand_bufferram_offset(mtd, area);
403 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
405 memcpy(buffer, bufferram + offset, count);
407 this->mmcontrol(mtd, 0);
409 return 0;
413 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
414 * @param mtd MTD data structure
415 * @param area BufferRAM area
416 * @param buffer the databuffer to put/get data
417 * @param offset offset to read from or write to
418 * @param count number of bytes to read/write
420 * Write the BufferRAM area
422 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
423 const unsigned char *buffer, int offset, size_t count)
425 struct onenand_chip *this = mtd->priv;
426 void __iomem *bufferram;
428 bufferram = this->base + area;
430 bufferram += onenand_bufferram_offset(mtd, area);
432 memcpy(bufferram + offset, buffer, count);
434 return 0;
438 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
439 * @param mtd MTD data structure
440 * @param addr address to check
441 * @return 1 if there are valid data, otherwise 0
443 * Check bufferram if there is data we required
445 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
447 struct onenand_chip *this = mtd->priv;
448 int block, page;
449 int i;
451 block = (int) (addr >> this->erase_shift);
452 page = (int) (addr >> this->page_shift);
453 page &= this->page_mask;
455 i = ONENAND_CURRENT_BUFFERRAM(this);
457 /* Is there valid data? */
458 if (this->bufferram[i].block == block &&
459 this->bufferram[i].page == page &&
460 this->bufferram[i].valid)
461 return 1;
463 return 0;
467 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
468 * @param mtd MTD data structure
469 * @param addr address to update
470 * @param valid valid flag
472 * Update BufferRAM information
474 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
475 int valid)
477 struct onenand_chip *this = mtd->priv;
478 int block, page;
479 int i;
481 block = (int) (addr >> this->erase_shift);
482 page = (int) (addr >> this->page_shift);
483 page &= this->page_mask;
485 /* Invalidate BufferRAM */
486 for (i = 0; i < MAX_BUFFERRAM; i++) {
487 if (this->bufferram[i].block == block &&
488 this->bufferram[i].page == page)
489 this->bufferram[i].valid = 0;
492 /* Update BufferRAM */
493 i = ONENAND_CURRENT_BUFFERRAM(this);
494 this->bufferram[i].block = block;
495 this->bufferram[i].page = page;
496 this->bufferram[i].valid = valid;
498 return 0;
502 * onenand_get_device - [GENERIC] Get chip for selected access
503 * @param mtd MTD device structure
504 * @param new_state the state which is requested
506 * Get the device and lock it for exclusive access
508 static int onenand_get_device(struct mtd_info *mtd, int new_state)
510 struct onenand_chip *this = mtd->priv;
511 DECLARE_WAITQUEUE(wait, current);
514 * Grab the lock and see if the device is available
516 while (1) {
517 spin_lock(&this->chip_lock);
518 if (this->state == FL_READY) {
519 this->state = new_state;
520 spin_unlock(&this->chip_lock);
521 break;
523 if (new_state == FL_PM_SUSPENDED) {
524 spin_unlock(&this->chip_lock);
525 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
527 set_current_state(TASK_UNINTERRUPTIBLE);
528 add_wait_queue(&this->wq, &wait);
529 spin_unlock(&this->chip_lock);
530 schedule();
531 remove_wait_queue(&this->wq, &wait);
534 return 0;
538 * onenand_release_device - [GENERIC] release chip
539 * @param mtd MTD device structure
541 * Deselect, release chip lock and wake up anyone waiting on the device
543 static void onenand_release_device(struct mtd_info *mtd)
545 struct onenand_chip *this = mtd->priv;
547 /* Release the chip */
548 spin_lock(&this->chip_lock);
549 this->state = FL_READY;
550 wake_up(&this->wq);
551 spin_unlock(&this->chip_lock);
555 * onenand_read_ecc - [MTD Interface] Read data with ECC
556 * @param mtd MTD device structure
557 * @param from offset to read from
558 * @param len number of bytes to read
559 * @param retlen pointer to variable to store the number of read bytes
560 * @param buf the databuffer to put data
561 * @param oob_buf filesystem supplied oob data buffer
562 * @param oobsel oob selection structure
564 * OneNAND read with ECC
566 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
567 size_t *retlen, u_char *buf,
568 u_char *oob_buf, struct nand_oobinfo *oobsel)
570 struct onenand_chip *this = mtd->priv;
571 int read = 0, column;
572 int thislen;
573 int ret = 0;
575 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
577 /* Do not allow reads past end of device */
578 if ((from + len) > mtd->size) {
579 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
580 *retlen = 0;
581 return -EINVAL;
584 /* Grab the lock and see if the device is available */
585 onenand_get_device(mtd, FL_READING);
587 /* TODO handling oob */
589 while (read < len) {
590 thislen = min_t(int, mtd->oobblock, len - read);
592 column = from & (mtd->oobblock - 1);
593 if (column + thislen > mtd->oobblock)
594 thislen = mtd->oobblock - column;
596 if (!onenand_check_bufferram(mtd, from)) {
597 this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
599 ret = this->wait(mtd, FL_READING);
600 /* First copy data and check return value for ECC handling */
601 onenand_update_bufferram(mtd, from, 1);
604 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
606 read += thislen;
608 if (read == len)
609 break;
611 if (ret) {
612 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
613 goto out;
616 from += thislen;
617 buf += thislen;
620 out:
621 /* Deselect and wake up anyone waiting on the device */
622 onenand_release_device(mtd);
625 * Return success, if no ECC failures, else -EBADMSG
626 * fs driver will take care of that, because
627 * retlen == desired len and result == -EBADMSG
629 *retlen = read;
630 return ret;
634 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
635 * @param mtd MTD device structure
636 * @param from offset to read from
637 * @param len number of bytes to read
638 * @param retlen pointer to variable to store the number of read bytes
639 * @param buf the databuffer to put data
641 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
643 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
644 size_t *retlen, u_char *buf)
646 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
650 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
651 * @param mtd MTD device structure
652 * @param from offset to read from
653 * @param len number of bytes to read
654 * @param retlen pointer to variable to store the number of read bytes
655 * @param buf the databuffer to put data
657 * OneNAND read out-of-band data from the spare area
659 static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
660 size_t *retlen, u_char *buf)
662 struct onenand_chip *this = mtd->priv;
663 int read = 0, thislen, column;
664 int ret = 0;
666 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
668 /* Initialize return length value */
669 *retlen = 0;
671 /* Do not allow reads past end of device */
672 if (unlikely((from + len) > mtd->size)) {
673 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
674 return -EINVAL;
677 /* Grab the lock and see if the device is available */
678 onenand_get_device(mtd, FL_READING);
680 column = from & (mtd->oobsize - 1);
682 while (read < len) {
683 thislen = mtd->oobsize - column;
684 thislen = min_t(int, thislen, len);
686 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
688 onenand_update_bufferram(mtd, from, 0);
690 ret = this->wait(mtd, FL_READING);
691 /* First copy data and check return value for ECC handling */
693 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
695 read += thislen;
697 if (read == len)
698 break;
700 if (ret) {
701 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
702 goto out;
705 buf += thislen;
707 /* Read more? */
708 if (read < len) {
709 /* Page size */
710 from += mtd->oobblock;
711 column = 0;
715 out:
716 /* Deselect and wake up anyone waiting on the device */
717 onenand_release_device(mtd);
719 *retlen = read;
720 return ret;
723 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
725 * onenand_verify_page - [GENERIC] verify the chip contents after a write
726 * @param mtd MTD device structure
727 * @param buf the databuffer to verify
729 * Check DataRAM area directly
731 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
733 struct onenand_chip *this = mtd->priv;
734 void __iomem *dataram0, *dataram1;
735 int ret = 0;
737 this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
739 ret = this->wait(mtd, FL_READING);
740 if (ret)
741 return ret;
743 onenand_update_bufferram(mtd, addr, 1);
745 /* Check, if the two dataram areas are same */
746 dataram0 = this->base + ONENAND_DATARAM;
747 dataram1 = dataram0 + mtd->oobblock;
749 if (memcmp(dataram0, dataram1, mtd->oobblock))
750 return -EBADMSG;
752 return 0;
754 #else
755 #define onenand_verify_page(...) (0)
756 #endif
758 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
761 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
762 * @param mtd MTD device structure
763 * @param to offset to write to
764 * @param len number of bytes to write
765 * @param retlen pointer to variable to store the number of written bytes
766 * @param buf the data to write
767 * @param eccbuf filesystem supplied oob data buffer
768 * @param oobsel oob selection structure
770 * OneNAND write with ECC
772 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
773 size_t *retlen, const u_char *buf,
774 u_char *eccbuf, struct nand_oobinfo *oobsel)
776 struct onenand_chip *this = mtd->priv;
777 int written = 0;
778 int ret = 0;
780 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
782 /* Initialize retlen, in case of early exit */
783 *retlen = 0;
785 /* Do not allow writes past end of device */
786 if (unlikely((to + len) > mtd->size)) {
787 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
788 return -EINVAL;
791 /* Reject writes, which are not page aligned */
792 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
793 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n");
794 return -EINVAL;
797 /* Grab the lock and see if the device is available */
798 onenand_get_device(mtd, FL_WRITING);
800 /* Loop until all data write */
801 while (written < len) {
802 int thislen = min_t(int, mtd->oobblock, len - written);
804 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
806 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
807 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
809 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
811 onenand_update_bufferram(mtd, to, 1);
813 ret = this->wait(mtd, FL_WRITING);
814 if (ret) {
815 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
816 goto out;
819 written += thislen;
821 /* Only check verify write turn on */
822 ret = onenand_verify_page(mtd, (u_char *) buf, to);
823 if (ret) {
824 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
825 goto out;
828 if (written == len)
829 break;
831 to += thislen;
832 buf += thislen;
835 out:
836 /* Deselect and wake up anyone waiting on the device */
837 onenand_release_device(mtd);
839 *retlen = written;
841 return ret;
845 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
846 * @param mtd MTD device structure
847 * @param to offset to write to
848 * @param len number of bytes to write
849 * @param retlen pointer to variable to store the number of written bytes
850 * @param buf the data to write
852 * This function simply calls onenand_write_ecc
853 * with oob buffer and oobsel = NULL
855 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
856 size_t *retlen, const u_char *buf)
858 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
862 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
863 * @param mtd MTD device structure
864 * @param to offset to write to
865 * @param len number of bytes to write
866 * @param retlen pointer to variable to store the number of written bytes
867 * @param buf the data to write
869 * OneNAND write out-of-band
871 static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
872 size_t *retlen, const u_char *buf)
874 struct onenand_chip *this = mtd->priv;
875 int column, status;
876 int written = 0;
878 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
880 /* Initialize retlen, in case of early exit */
881 *retlen = 0;
883 /* Do not allow writes past end of device */
884 if (unlikely((to + len) > mtd->size)) {
885 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
886 return -EINVAL;
889 /* Grab the lock and see if the device is available */
890 onenand_get_device(mtd, FL_WRITING);
892 /* Loop until all data write */
893 while (written < len) {
894 int thislen = min_t(int, mtd->oobsize, len - written);
896 column = to & (mtd->oobsize - 1);
898 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
900 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
901 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
903 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
905 onenand_update_bufferram(mtd, to, 0);
907 status = this->wait(mtd, FL_WRITING);
908 if (status)
909 goto out;
911 written += thislen;
913 if (written == len)
914 break;
916 to += thislen;
917 buf += thislen;
920 out:
921 /* Deselect and wake up anyone waiting on the device */
922 onenand_release_device(mtd);
924 *retlen = written;
926 return 0;
930 * onenand_writev_ecc - [MTD Interface] write with iovec with ecc
931 * @param mtd MTD device structure
932 * @param vecs the iovectors to write
933 * @param count number of vectors
934 * @param to offset to write to
935 * @param retlen pointer to variable to store the number of written bytes
936 * @param eccbuf filesystem supplied oob data buffer
937 * @param oobsel oob selection structure
939 * OneNAND write with iovec with ecc
941 static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
942 unsigned long count, loff_t to, size_t *retlen,
943 u_char *eccbuf, struct nand_oobinfo *oobsel)
945 struct onenand_chip *this = mtd->priv;
946 unsigned char buffer[MAX_ONENAND_PAGESIZE], *pbuf;
947 size_t total_len, len;
948 int i, written = 0;
949 int ret = 0;
951 /* Preset written len for early exit */
952 *retlen = 0;
954 /* Calculate total length of data */
955 total_len = 0;
956 for (i = 0; i < count; i++)
957 total_len += vecs[i].iov_len;
959 DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
961 /* Do not allow write past end of the device */
962 if (unlikely((to + total_len) > mtd->size)) {
963 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n");
964 return -EINVAL;
967 /* Reject writes, which are not page aligned */
968 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) {
969 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n");
970 return -EINVAL;
973 /* Grab the lock and see if the device is available */
974 onenand_get_device(mtd, FL_WRITING);
976 /* TODO handling oob */
978 /* Loop until all keve's data has been written */
979 len = 0;
980 while (count) {
981 pbuf = buffer;
983 * If the given tuple is >= pagesize then
984 * write it out from the iov
986 if ((vecs->iov_len - len) >= mtd->oobblock) {
987 pbuf = vecs->iov_base + len;
989 len += mtd->oobblock;
991 /* Check, if we have to switch to the next tuple */
992 if (len >= (int) vecs->iov_len) {
993 vecs++;
994 len = 0;
995 count--;
997 } else {
998 int cnt = 0, thislen;
999 while (cnt < mtd->oobblock) {
1000 thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len);
1001 memcpy(buffer + cnt, vecs->iov_base + len, thislen);
1002 cnt += thislen;
1003 len += thislen;
1005 /* Check, if we have to switch to the next tuple */
1006 if (len >= (int) vecs->iov_len) {
1007 vecs++;
1008 len = 0;
1009 count--;
1014 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
1016 this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock);
1017 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1019 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
1021 onenand_update_bufferram(mtd, to, 1);
1023 ret = this->wait(mtd, FL_WRITING);
1024 if (ret) {
1025 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret);
1026 goto out;
1030 /* Only check verify write turn on */
1031 ret = onenand_verify_page(mtd, (u_char *) pbuf, to);
1032 if (ret) {
1033 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret);
1034 goto out;
1037 written += mtd->oobblock;
1039 to += mtd->oobblock;
1042 out:
1043 /* Deselect and wakt up anyone waiting on the device */
1044 onenand_release_device(mtd);
1046 *retlen = written;
1048 return 0;
1052 * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc
1053 * @param mtd MTD device structure
1054 * @param vecs the iovectors to write
1055 * @param count number of vectors
1056 * @param to offset to write to
1057 * @param retlen pointer to variable to store the number of written bytes
1059 * OneNAND write with kvec. This just calls the ecc function
1061 static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs,
1062 unsigned long count, loff_t to, size_t *retlen)
1064 return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
1068 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1069 * @param mtd MTD device structure
1070 * @param ofs offset from device start
1071 * @param getchip 0, if the chip is already selected
1072 * @param allowbbt 1, if its allowed to access the bbt area
1074 * Check, if the block is bad. Either by reading the bad block table or
1075 * calling of the scan function.
1077 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1079 struct onenand_chip *this = mtd->priv;
1080 struct bbm_info *bbm = this->bbm;
1082 /* Return info from the table */
1083 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1087 * onenand_erase - [MTD Interface] erase block(s)
1088 * @param mtd MTD device structure
1089 * @param instr erase instruction
1091 * Erase one ore more blocks
1093 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1095 struct onenand_chip *this = mtd->priv;
1096 unsigned int block_size;
1097 loff_t addr;
1098 int len;
1099 int ret = 0;
1101 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1103 block_size = (1 << this->erase_shift);
1105 /* Start address must align on block boundary */
1106 if (unlikely(instr->addr & (block_size - 1))) {
1107 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1108 return -EINVAL;
1111 /* Length must align on block boundary */
1112 if (unlikely(instr->len & (block_size - 1))) {
1113 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1114 return -EINVAL;
1117 /* Do not allow erase past end of device */
1118 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1119 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1120 return -EINVAL;
1123 instr->fail_addr = 0xffffffff;
1125 /* Grab the lock and see if the device is available */
1126 onenand_get_device(mtd, FL_ERASING);
1128 /* Loop throught the pages */
1129 len = instr->len;
1130 addr = instr->addr;
1132 instr->state = MTD_ERASING;
1134 while (len) {
1136 /* Check if we have a bad block, we do not erase bad blocks */
1137 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1138 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1139 instr->state = MTD_ERASE_FAILED;
1140 goto erase_exit;
1143 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1145 ret = this->wait(mtd, FL_ERASING);
1146 /* Check, if it is write protected */
1147 if (ret) {
1148 if (ret == -EPERM)
1149 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1150 else
1151 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1152 instr->state = MTD_ERASE_FAILED;
1153 instr->fail_addr = addr;
1154 goto erase_exit;
1157 len -= block_size;
1158 addr += block_size;
1161 instr->state = MTD_ERASE_DONE;
1163 erase_exit:
1165 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1166 /* Do call back function */
1167 if (!ret)
1168 mtd_erase_callback(instr);
1170 /* Deselect and wake up anyone waiting on the device */
1171 onenand_release_device(mtd);
1173 return ret;
1177 * onenand_sync - [MTD Interface] sync
1178 * @param mtd MTD device structure
1180 * Sync is actually a wait for chip ready function
1182 static void onenand_sync(struct mtd_info *mtd)
1184 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1186 /* Grab the lock and see if the device is available */
1187 onenand_get_device(mtd, FL_SYNCING);
1189 /* Release it and go back */
1190 onenand_release_device(mtd);
1195 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1196 * @param mtd MTD device structure
1197 * @param ofs offset relative to mtd start
1199 * Check whether the block is bad
1201 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1203 /* Check for invalid offset */
1204 if (ofs > mtd->size)
1205 return -EINVAL;
1207 return onenand_block_checkbad(mtd, ofs, 1, 0);
1211 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1212 * @param mtd MTD device structure
1213 * @param ofs offset from device start
1215 * This is the default implementation, which can be overridden by
1216 * a hardware specific driver.
1218 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1220 struct onenand_chip *this = mtd->priv;
1221 struct bbm_info *bbm = this->bbm;
1222 u_char buf[2] = {0, 0};
1223 size_t retlen;
1224 int block;
1226 /* Get block number */
1227 block = ((int) ofs) >> bbm->bbt_erase_shift;
1228 if (bbm->bbt)
1229 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1231 /* We write two bytes, so we dont have to mess with 16 bit access */
1232 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1233 return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
1237 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1238 * @param mtd MTD device structure
1239 * @param ofs offset relative to mtd start
1241 * Mark the block as bad
1243 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1245 struct onenand_chip *this = mtd->priv;
1246 int ret;
1248 ret = onenand_block_isbad(mtd, ofs);
1249 if (ret) {
1250 /* If it was bad already, return success and do nothing */
1251 if (ret > 0)
1252 return 0;
1253 return ret;
1256 return this->block_markbad(mtd, ofs);
1260 * onenand_unlock - [MTD Interface] Unlock block(s)
1261 * @param mtd MTD device structure
1262 * @param ofs offset relative to mtd start
1263 * @param len number of bytes to unlock
1265 * Unlock one or more blocks
1267 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1269 struct onenand_chip *this = mtd->priv;
1270 int start, end, block, value, status;
1272 start = ofs >> this->erase_shift;
1273 end = len >> this->erase_shift;
1275 /* Continuous lock scheme */
1276 if (this->options & ONENAND_CONT_LOCK) {
1277 /* Set start block address */
1278 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1279 /* Set end block address */
1280 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1281 /* Write unlock command */
1282 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1284 /* There's no return value */
1285 this->wait(mtd, FL_UNLOCKING);
1287 /* Sanity check */
1288 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1289 & ONENAND_CTRL_ONGO)
1290 continue;
1292 /* Check lock status */
1293 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1294 if (!(status & ONENAND_WP_US))
1295 printk(KERN_ERR "wp status = 0x%x\n", status);
1297 return 0;
1300 /* Block lock scheme */
1301 for (block = start; block < end; block++) {
1302 /* Set start block address */
1303 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1304 /* Write unlock command */
1305 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1307 /* There's no return value */
1308 this->wait(mtd, FL_UNLOCKING);
1310 /* Sanity check */
1311 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1312 & ONENAND_CTRL_ONGO)
1313 continue;
1315 /* Set block address for read block status */
1316 value = onenand_block_address(this->device_id, block);
1317 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1319 /* Check lock status */
1320 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1321 if (!(status & ONENAND_WP_US))
1322 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1325 return 0;
1329 * onenand_print_device_info - Print device ID
1330 * @param device device ID
1332 * Print device ID
1334 static void onenand_print_device_info(int device)
1336 int vcc, demuxed, ddp, density;
1338 vcc = device & ONENAND_DEVICE_VCC_MASK;
1339 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1340 ddp = device & ONENAND_DEVICE_IS_DDP;
1341 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1342 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1343 demuxed ? "" : "Muxed ",
1344 ddp ? "(DDP)" : "",
1345 (16 << density),
1346 vcc ? "2.65/3.3" : "1.8",
1347 device);
1350 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1351 {ONENAND_MFR_SAMSUNG, "Samsung"},
1352 {ONENAND_MFR_UNKNOWN, "Unknown"}
1356 * onenand_check_maf - Check manufacturer ID
1357 * @param manuf manufacturer ID
1359 * Check manufacturer ID
1361 static int onenand_check_maf(int manuf)
1363 int i;
1365 for (i = 0; onenand_manuf_ids[i].id; i++) {
1366 if (manuf == onenand_manuf_ids[i].id)
1367 break;
1370 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1371 onenand_manuf_ids[i].name, manuf);
1373 return (i != ONENAND_MFR_UNKNOWN);
1377 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1378 * @param mtd MTD device structure
1380 * OneNAND detection method:
1381 * Compare the the values from command with ones from register
1383 static int onenand_probe(struct mtd_info *mtd)
1385 struct onenand_chip *this = mtd->priv;
1386 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1387 int version_id;
1388 int density;
1390 /* Send the command for reading device ID from BootRAM */
1391 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1393 /* Read manufacturer and device IDs from BootRAM */
1394 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1395 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1397 /* Check manufacturer ID */
1398 if (onenand_check_maf(bram_maf_id))
1399 return -ENXIO;
1401 /* Reset OneNAND to read default register values */
1402 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1404 /* Read manufacturer and device IDs from Register */
1405 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1406 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1408 /* Check OneNAND device */
1409 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1410 return -ENXIO;
1412 /* Flash device information */
1413 onenand_print_device_info(dev_id);
1414 this->device_id = dev_id;
1416 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1417 this->chipsize = (16 << density) << 20;
1419 /* OneNAND page size & block size */
1420 /* The data buffer size is equal to page size */
1421 mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1422 mtd->oobsize = mtd->oobblock >> 5;
1423 /* Pagers per block is always 64 in OneNAND */
1424 mtd->erasesize = mtd->oobblock << 6;
1426 this->erase_shift = ffs(mtd->erasesize) - 1;
1427 this->page_shift = ffs(mtd->oobblock) - 1;
1428 this->ppb_shift = (this->erase_shift - this->page_shift);
1429 this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1431 /* REVIST: Multichip handling */
1433 mtd->size = this->chipsize;
1435 /* Version ID */
1436 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1437 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1439 /* Lock scheme */
1440 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1441 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1442 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1443 this->options |= ONENAND_CONT_LOCK;
1446 return 0;
1450 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1451 * @param mtd MTD device structure
1453 static int onenand_suspend(struct mtd_info *mtd)
1455 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1459 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1460 * @param mtd MTD device structure
1462 static void onenand_resume(struct mtd_info *mtd)
1464 struct onenand_chip *this = mtd->priv;
1466 if (this->state == FL_PM_SUSPENDED)
1467 onenand_release_device(mtd);
1468 else
1469 printk(KERN_ERR "resume() called for the chip which is not"
1470 "in suspended state\n");
1475 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1476 * @param mtd MTD device structure
1477 * @param maxchips Number of chips to scan for
1479 * This fills out all the not initialized function pointers
1480 * with the defaults.
1481 * The flash ID is read and the mtd/chip structures are
1482 * filled with the appropriate values.
1484 int onenand_scan(struct mtd_info *mtd, int maxchips)
1486 struct onenand_chip *this = mtd->priv;
1488 if (!this->read_word)
1489 this->read_word = onenand_readw;
1490 if (!this->write_word)
1491 this->write_word = onenand_writew;
1493 if (!this->command)
1494 this->command = onenand_command;
1495 if (!this->wait)
1496 this->wait = onenand_wait;
1498 if (!this->read_bufferram)
1499 this->read_bufferram = onenand_read_bufferram;
1500 if (!this->write_bufferram)
1501 this->write_bufferram = onenand_write_bufferram;
1503 if (!this->block_markbad)
1504 this->block_markbad = onenand_default_block_markbad;
1505 if (!this->scan_bbt)
1506 this->scan_bbt = onenand_default_bbt;
1508 if (onenand_probe(mtd))
1509 return -ENXIO;
1511 /* Set Sync. Burst Read after probing */
1512 if (this->mmcontrol) {
1513 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1514 this->read_bufferram = onenand_sync_read_bufferram;
1517 this->state = FL_READY;
1518 init_waitqueue_head(&this->wq);
1519 spin_lock_init(&this->chip_lock);
1521 switch (mtd->oobsize) {
1522 case 64:
1523 this->autooob = &onenand_oob_64;
1524 break;
1526 case 32:
1527 this->autooob = &onenand_oob_32;
1528 break;
1530 default:
1531 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1532 mtd->oobsize);
1533 /* To prevent kernel oops */
1534 this->autooob = &onenand_oob_32;
1535 break;
1538 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
1540 /* Fill in remaining MTD driver data */
1541 mtd->type = MTD_NANDFLASH;
1542 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1543 mtd->ecctype = MTD_ECC_SW;
1544 mtd->erase = onenand_erase;
1545 mtd->point = NULL;
1546 mtd->unpoint = NULL;
1547 mtd->read = onenand_read;
1548 mtd->write = onenand_write;
1549 mtd->read_ecc = onenand_read_ecc;
1550 mtd->write_ecc = onenand_write_ecc;
1551 mtd->read_oob = onenand_read_oob;
1552 mtd->write_oob = onenand_write_oob;
1553 mtd->readv = NULL;
1554 mtd->readv_ecc = NULL;
1555 mtd->writev = onenand_writev;
1556 mtd->writev_ecc = onenand_writev_ecc;
1557 mtd->sync = onenand_sync;
1558 mtd->lock = NULL;
1559 mtd->unlock = onenand_unlock;
1560 mtd->suspend = onenand_suspend;
1561 mtd->resume = onenand_resume;
1562 mtd->block_isbad = onenand_block_isbad;
1563 mtd->block_markbad = onenand_block_markbad;
1564 mtd->owner = THIS_MODULE;
1566 /* Unlock whole block */
1567 mtd->unlock(mtd, 0x0, this->chipsize);
1569 return this->scan_bbt(mtd);
1573 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1574 * @param mtd MTD device structure
1576 void onenand_release(struct mtd_info *mtd)
1578 #ifdef CONFIG_MTD_PARTITIONS
1579 /* Deregister partitions */
1580 del_mtd_partitions (mtd);
1581 #endif
1582 /* Deregister the device */
1583 del_mtd_device (mtd);
1586 EXPORT_SYMBOL_GPL(onenand_scan);
1587 EXPORT_SYMBOL_GPL(onenand_release);
1589 MODULE_LICENSE("GPL");
1590 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1591 MODULE_DESCRIPTION("Generic OneNAND flash driver code");