2 * Standalone EHCI usb debug driver
4 * Originally written by:
5 * Eric W. Biederman" <ebiederm@xmission.com> and
6 * Yinghai Lu <yhlu.kernel@gmail.com>
8 * Changes for early/late printk and HW errata:
9 * Jason Wessel <jason.wessel@windriver.com>
10 * Copyright (C) 2009 Wind River Systems, Inc.
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/pci_regs.h>
18 #include <linux/pci_ids.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/ehci_def.h>
21 #include <linux/delay.h>
23 #include <asm/pci-direct.h>
24 #include <asm/fixmap.h>
26 /* The code here is intended to talk directly to the EHCI debug port
27 * and does not require that you have any kind of USB host controller
28 * drivers or USB device drivers compiled into the kernel.
30 * If you make a change to anything in here, the following test cases
31 * need to pass where a USB debug device works in the following
34 * 1. boot args: earlyprintk=dbgp
35 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
36 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
37 * 2. boot args: earlyprintk=dbgp,keep
38 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
40 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
41 * o kernel has CONFIG_USB_EHCI_HCD=y and
42 * CONFIG_USB_SERIAL_DEBUG=y
43 * 4. boot args: earlyprintk=vga,dbgp
44 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
45 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
47 * For the 4th configuration you can turn on or off the DBGP_DEBUG
48 * such that you can debug the dbgp device's driver code.
51 static int dbgp_phys_port
= 1;
53 static struct ehci_caps __iomem
*ehci_caps
;
54 static struct ehci_regs __iomem
*ehci_regs
;
55 static struct ehci_dbg_port __iomem
*ehci_debug
;
56 static int dbgp_not_safe
; /* Cannot use debug device during ehci reset */
57 static unsigned int dbgp_endpoint_out
;
65 static struct ehci_dev ehci_dev
;
67 #define USB_DEBUG_DEVNUM 127
69 #define DBGP_DATA_TOGGLE 0x8800
72 #define dbgp_printk printk
73 static void dbgp_ehci_status(char *str
)
77 dbgp_printk("dbgp: %s\n", str
);
78 dbgp_printk(" Debug control: %08x", readl(&ehci_debug
->control
));
79 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs
->command
));
80 dbgp_printk(" ehci conf flg: %08x\n",
81 readl(&ehci_regs
->configured_flag
));
82 dbgp_printk(" ehci status : %08x", readl(&ehci_regs
->status
));
83 dbgp_printk(" ehci portsc : %08x\n",
84 readl(&ehci_regs
->port_status
[dbgp_phys_port
- 1]));
87 static inline void dbgp_ehci_status(char *str
) { }
88 static inline void dbgp_printk(const char *fmt
, ...) { }
91 static inline u32
dbgp_pid_update(u32 x
, u32 tok
)
93 return ((x
^ DBGP_DATA_TOGGLE
) & 0xffff00) | (tok
& 0xff);
96 static inline u32
dbgp_len_update(u32 x
, u32 len
)
98 return (x
& ~0x0f) | (len
& 0x0f);
102 * USB Packet IDs (PIDs)
106 #define USB_PID_OUT 0xe1
107 #define USB_PID_IN 0x69
108 #define USB_PID_SOF 0xa5
109 #define USB_PID_SETUP 0x2d
111 #define USB_PID_ACK 0xd2
112 #define USB_PID_NAK 0x5a
113 #define USB_PID_STALL 0x1e
114 #define USB_PID_NYET 0x96
116 #define USB_PID_DATA0 0xc3
117 #define USB_PID_DATA1 0x4b
118 #define USB_PID_DATA2 0x87
119 #define USB_PID_MDATA 0x0f
121 #define USB_PID_PREAMBLE 0x3c
122 #define USB_PID_ERR 0x3c
123 #define USB_PID_SPLIT 0x78
124 #define USB_PID_PING 0xb4
125 #define USB_PID_UNDEF_0 0xf0
127 #define USB_PID_DATA_TOGGLE 0x88
128 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
130 #define PCI_CAP_ID_EHCI_DEBUG 0xa
132 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
133 #define HUB_SHORT_RESET_TIME 10
134 #define HUB_LONG_RESET_TIME 200
135 #define HUB_RESET_TIMEOUT 500
137 #define DBGP_MAX_PACKET 8
138 #define DBGP_TIMEOUT (250 * 1000)
140 static int dbgp_wait_until_complete(void)
143 int loop
= DBGP_TIMEOUT
;
146 ctrl
= readl(&ehci_debug
->control
);
147 /* Stop when the transaction is finished */
148 if (ctrl
& DBGP_DONE
)
151 } while (--loop
> 0);
154 return -DBGP_TIMEOUT
;
157 * Now that we have observed the completed transaction,
158 * clear the done bit.
160 writel(ctrl
| DBGP_DONE
, &ehci_debug
->control
);
161 return (ctrl
& DBGP_ERROR
) ? -DBGP_ERRCODE(ctrl
) : DBGP_LEN(ctrl
);
164 static inline void dbgp_mdelay(int ms
)
169 for (i
= 0; i
< 1000; i
++)
174 static void dbgp_breath(void)
176 /* Sleep to give the debug port a chance to breathe */
179 static int dbgp_wait_until_done(unsigned ctrl
)
186 writel(ctrl
| DBGP_GO
, &ehci_debug
->control
);
187 ret
= dbgp_wait_until_complete();
188 pids
= readl(&ehci_debug
->pids
);
189 lpid
= DBGP_PID_GET(pids
);
192 /* A -DBGP_TIMEOUT failure here means the device has
193 * failed, perhaps because it was unplugged, in which
194 * case we do not want to hang the system so the dbgp
195 * will be marked as unsafe to use. EHCI reset is the
196 * only way to recover if you unplug the dbgp device.
198 if (ret
== -DBGP_TIMEOUT
&& !dbgp_not_safe
)
204 * If the port is getting full or it has dropped data
205 * start pacing ourselves, not necessary but it's friendly.
207 if ((lpid
== USB_PID_NAK
) || (lpid
== USB_PID_NYET
))
210 /* If I get a NACK reissue the transmission */
211 if (lpid
== USB_PID_NAK
) {
219 static inline void dbgp_set_data(const void *buf
, int size
)
221 const unsigned char *bytes
= buf
;
226 for (i
= 0; i
< 4 && i
< size
; i
++)
227 lo
|= bytes
[i
] << (8*i
);
228 for (; i
< 8 && i
< size
; i
++)
229 hi
|= bytes
[i
] << (8*(i
- 4));
230 writel(lo
, &ehci_debug
->data03
);
231 writel(hi
, &ehci_debug
->data47
);
234 static inline void dbgp_get_data(void *buf
, int size
)
236 unsigned char *bytes
= buf
;
240 lo
= readl(&ehci_debug
->data03
);
241 hi
= readl(&ehci_debug
->data47
);
242 for (i
= 0; i
< 4 && i
< size
; i
++)
243 bytes
[i
] = (lo
>> (8*i
)) & 0xff;
244 for (; i
< 8 && i
< size
; i
++)
245 bytes
[i
] = (hi
>> (8*(i
- 4))) & 0xff;
248 static int dbgp_out(u32 addr
, const char *bytes
, int size
)
252 pids
= readl(&ehci_debug
->pids
);
253 pids
= dbgp_pid_update(pids
, USB_PID_OUT
);
255 ctrl
= readl(&ehci_debug
->control
);
256 ctrl
= dbgp_len_update(ctrl
, size
);
260 dbgp_set_data(bytes
, size
);
261 writel(addr
, &ehci_debug
->address
);
262 writel(pids
, &ehci_debug
->pids
);
263 return dbgp_wait_until_done(ctrl
);
266 static int dbgp_bulk_write(unsigned devnum
, unsigned endpoint
,
267 const char *bytes
, int size
)
272 if (size
> DBGP_MAX_PACKET
)
275 addr
= DBGP_EPADDR(devnum
, endpoint
);
278 ret
= dbgp_out(addr
, bytes
, size
);
279 if (ret
== -DBGP_ERR_BAD
) {
282 /* Emit a dummy packet to re-sync communication
283 * with the debug device */
284 if (dbgp_out(addr
, "12345678", 8) >= 0) {
288 } while (try_loops
--);
295 static int dbgp_bulk_read(unsigned devnum
, unsigned endpoint
, void *data
,
298 u32 pids
, addr
, ctrl
;
301 if (size
> DBGP_MAX_PACKET
)
304 addr
= DBGP_EPADDR(devnum
, endpoint
);
306 pids
= readl(&ehci_debug
->pids
);
307 pids
= dbgp_pid_update(pids
, USB_PID_IN
);
309 ctrl
= readl(&ehci_debug
->control
);
310 ctrl
= dbgp_len_update(ctrl
, size
);
314 writel(addr
, &ehci_debug
->address
);
315 writel(pids
, &ehci_debug
->pids
);
316 ret
= dbgp_wait_until_done(ctrl
);
322 dbgp_get_data(data
, size
);
326 static int dbgp_control_msg(unsigned devnum
, int requesttype
,
327 int request
, int value
, int index
, void *data
, int size
)
329 u32 pids
, addr
, ctrl
;
330 struct usb_ctrlrequest req
;
334 read
= (requesttype
& USB_DIR_IN
) != 0;
335 if (size
> (read
? DBGP_MAX_PACKET
:0))
338 /* Compute the control message */
339 req
.bRequestType
= requesttype
;
340 req
.bRequest
= request
;
341 req
.wValue
= cpu_to_le16(value
);
342 req
.wIndex
= cpu_to_le16(index
);
343 req
.wLength
= cpu_to_le16(size
);
345 pids
= DBGP_PID_SET(USB_PID_DATA0
, USB_PID_SETUP
);
346 addr
= DBGP_EPADDR(devnum
, 0);
348 ctrl
= readl(&ehci_debug
->control
);
349 ctrl
= dbgp_len_update(ctrl
, sizeof(req
));
353 /* Send the setup message */
354 dbgp_set_data(&req
, sizeof(req
));
355 writel(addr
, &ehci_debug
->address
);
356 writel(pids
, &ehci_debug
->pids
);
357 ret
= dbgp_wait_until_done(ctrl
);
361 /* Read the result */
362 return dbgp_bulk_read(devnum
, 0, data
, size
);
366 /* Find a PCI capability */
367 static u32 __init
find_cap(u32 num
, u32 slot
, u32 func
, int cap
)
372 if (!(read_pci_config_16(num
, slot
, func
, PCI_STATUS
) &
373 PCI_STATUS_CAP_LIST
))
376 pos
= read_pci_config_byte(num
, slot
, func
, PCI_CAPABILITY_LIST
);
377 for (bytes
= 0; bytes
< 48 && pos
>= 0x40; bytes
++) {
381 id
= read_pci_config_byte(num
, slot
, func
, pos
+PCI_CAP_LIST_ID
);
387 pos
= read_pci_config_byte(num
, slot
, func
,
388 pos
+PCI_CAP_LIST_NEXT
);
393 static u32 __init
__find_dbgp(u32 bus
, u32 slot
, u32 func
)
397 class = read_pci_config(bus
, slot
, func
, PCI_CLASS_REVISION
);
398 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI
)
401 return find_cap(bus
, slot
, func
, PCI_CAP_ID_EHCI_DEBUG
);
404 static u32 __init
find_dbgp(int ehci_num
, u32
*rbus
, u32
*rslot
, u32
*rfunc
)
408 for (bus
= 0; bus
< 256; bus
++) {
409 for (slot
= 0; slot
< 32; slot
++) {
410 for (func
= 0; func
< 8; func
++) {
413 cap
= __find_dbgp(bus
, slot
, func
);
429 static int dbgp_ehci_startup(void)
431 u32 ctrl
, cmd
, status
;
434 /* Claim ownership, but do not enable yet */
435 ctrl
= readl(&ehci_debug
->control
);
437 ctrl
&= ~(DBGP_ENABLED
| DBGP_INUSE
);
438 writel(ctrl
, &ehci_debug
->control
);
441 dbgp_ehci_status("EHCI startup");
442 /* Start the ehci running */
443 cmd
= readl(&ehci_regs
->command
);
444 cmd
&= ~(CMD_LRESET
| CMD_IAAD
| CMD_PSE
| CMD_ASE
| CMD_RESET
);
446 writel(cmd
, &ehci_regs
->command
);
448 /* Ensure everything is routed to the EHCI */
449 writel(FLAG_CF
, &ehci_regs
->configured_flag
);
451 /* Wait until the controller is no longer halted */
454 status
= readl(&ehci_regs
->status
);
455 if (!(status
& STS_HALT
))
458 } while (--loop
> 0);
461 dbgp_printk("ehci can not be started\n");
464 dbgp_printk("ehci started\n");
468 static int dbgp_ehci_controller_reset(void)
470 int loop
= 250 * 1000;
473 /* Reset the EHCI controller */
474 cmd
= readl(&ehci_regs
->command
);
476 writel(cmd
, &ehci_regs
->command
);
478 cmd
= readl(&ehci_regs
->command
);
479 } while ((cmd
& CMD_RESET
) && (--loop
> 0));
482 dbgp_printk("can not reset ehci\n");
485 dbgp_ehci_status("ehci reset done");
488 static int ehci_wait_for_port(int port
);
489 /* Return 0 on success
490 * Return -ENODEV for any general failure
491 * Return -EIO if wait for port fails
493 int dbgp_external_startup(void)
496 struct usb_debug_descriptor dbgp_desc
;
498 u32 ctrl
, portsc
, cmd
;
499 int dbg_port
= dbgp_phys_port
;
501 int reset_port_tries
= 1;
502 int try_hard_once
= 1;
504 try_port_reset_again
:
505 ret
= dbgp_ehci_startup();
509 /* Wait for a device to show up in the debug port */
510 ret
= ehci_wait_for_port(dbg_port
);
512 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
513 if (!(portsc
& PORT_CONNECT
) && try_hard_once
) {
514 /* Last ditch effort to try to force enable
515 * the debug device by using the packet test
516 * ehci command to try and wake it up. */
518 cmd
= readl(&ehci_regs
->command
);
520 writel(cmd
, &ehci_regs
->command
);
521 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
522 portsc
|= PORT_TEST_PKT
;
523 writel(portsc
, &ehci_regs
->port_status
[dbg_port
- 1]);
524 dbgp_ehci_status("Trying to force debug port online");
526 dbgp_ehci_controller_reset();
527 goto try_port_reset_again
;
528 } else if (reset_port_tries
--) {
529 goto try_port_reset_again
;
531 dbgp_printk("No device found in debug port\n");
534 dbgp_ehci_status("wait for port done");
536 /* Enable the debug port */
537 ctrl
= readl(&ehci_debug
->control
);
539 writel(ctrl
, &ehci_debug
->control
);
540 ctrl
= readl(&ehci_debug
->control
);
541 if ((ctrl
& DBGP_CLAIM
) != DBGP_CLAIM
) {
542 dbgp_printk("No device in debug port\n");
543 writel(ctrl
& ~DBGP_CLAIM
, &ehci_debug
->control
);
546 dbgp_ehci_status("debug ported enabled");
548 /* Completely transfer the debug device to the debug controller */
549 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
551 writel(portsc
, &ehci_regs
->port_status
[dbg_port
- 1]);
556 /* Find the debug device and make it device number 127 */
557 for (devnum
= 0; devnum
<= 127; devnum
++) {
558 ret
= dbgp_control_msg(devnum
,
559 USB_DIR_IN
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
560 USB_REQ_GET_DESCRIPTOR
, (USB_DT_DEBUG
<< 8), 0,
561 &dbgp_desc
, sizeof(dbgp_desc
));
566 dbgp_printk("Could not find attached debug device\n");
570 dbgp_printk("Attached device is not a debug device\n");
573 dbgp_endpoint_out
= dbgp_desc
.bDebugOutEndpoint
;
575 /* Move the device to 127 if it isn't already there */
576 if (devnum
!= USB_DEBUG_DEVNUM
) {
577 ret
= dbgp_control_msg(devnum
,
578 USB_DIR_OUT
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
579 USB_REQ_SET_ADDRESS
, USB_DEBUG_DEVNUM
, 0, NULL
, 0);
581 dbgp_printk("Could not move attached device to %d\n",
585 devnum
= USB_DEBUG_DEVNUM
;
586 dbgp_printk("debug device renamed to 127\n");
589 /* Enable the debug interface */
590 ret
= dbgp_control_msg(USB_DEBUG_DEVNUM
,
591 USB_DIR_OUT
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
592 USB_REQ_SET_FEATURE
, USB_DEVICE_DEBUG_MODE
, 0, NULL
, 0);
594 dbgp_printk(" Could not enable the debug device\n");
597 dbgp_printk("debug interface enabled\n");
598 /* Perform a small write to get the even/odd data state in sync
600 ret
= dbgp_bulk_write(USB_DEBUG_DEVNUM
, dbgp_endpoint_out
, " ", 1);
602 dbgp_printk("dbgp_bulk_write failed: %d\n", ret
);
605 dbgp_printk("small write doned\n");
614 EXPORT_SYMBOL_GPL(dbgp_external_startup
);
616 static int __init
ehci_reset_port(int port
)
619 u32 delay_time
, delay
;
622 dbgp_ehci_status("reset port");
623 /* Reset the usb debug port */
624 portsc
= readl(&ehci_regs
->port_status
[port
- 1]);
626 portsc
|= PORT_RESET
;
627 writel(portsc
, &ehci_regs
->port_status
[port
- 1]);
629 delay
= HUB_ROOT_RESET_TIME
;
630 for (delay_time
= 0; delay_time
< HUB_RESET_TIMEOUT
;
631 delay_time
+= delay
) {
633 portsc
= readl(&ehci_regs
->port_status
[port
- 1]);
634 if (!(portsc
& PORT_RESET
))
637 if (portsc
& PORT_RESET
) {
638 /* force reset to complete */
640 writel(portsc
& ~(PORT_RWC_BITS
| PORT_RESET
),
641 &ehci_regs
->port_status
[port
- 1]);
644 portsc
= readl(&ehci_regs
->port_status
[port
-1]);
645 } while ((portsc
& PORT_RESET
) && (--loop
> 0));
648 /* Device went away? */
649 if (!(portsc
& PORT_CONNECT
))
652 /* bomb out completely if something weird happend */
653 if ((portsc
& PORT_CSC
))
656 /* If we've finished resetting, then break out of the loop */
657 if (!(portsc
& PORT_RESET
) && (portsc
& PORT_PE
))
662 static int ehci_wait_for_port(int port
)
667 for (reps
= 0; reps
< 300; reps
++) {
668 status
= readl(&ehci_regs
->status
);
669 if (status
& STS_PCD
)
673 ret
= ehci_reset_port(port
);
679 typedef void (*set_debug_port_t
)(int port
);
681 static void __init
default_set_debug_port(int port
)
685 static set_debug_port_t __initdata set_debug_port
= default_set_debug_port
;
687 static void __init
nvidia_set_debug_port(int port
)
690 dword
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
692 dword
&= ~(0x0f<<12);
693 dword
|= ((port
& 0x0f)<<12);
694 write_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
, 0x74,
696 dbgp_printk("set debug port to %d\n", port
);
699 static void __init
detect_set_debug_port(void)
703 vendorid
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
706 if ((vendorid
& 0xffff) == 0x10de) {
707 dbgp_printk("using nvidia set_debug_port\n");
708 set_debug_port
= nvidia_set_debug_port
;
712 /* The code in early_ehci_bios_handoff() is derived from the usb pci
713 * quirk initialization, but altered so as to use the early PCI
715 #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
716 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
717 static void __init
early_ehci_bios_handoff(void)
719 u32 hcc_params
= readl(&ehci_caps
->hcc_params
);
720 int offset
= (hcc_params
>> 8) & 0xff;
727 cap
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
,
728 ehci_dev
.func
, offset
);
729 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap
);
731 if ((cap
& 0xff) == 1 && (cap
& EHCI_USBLEGSUP_BIOS
)) {
732 dbgp_printk("dbgp: BIOS handoff\n");
733 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
,
734 ehci_dev
.func
, offset
+ 3, 1);
737 /* if boot firmware now owns EHCI, spin till it hands it over. */
739 while ((cap
& EHCI_USBLEGSUP_BIOS
) && (msec
> 0)) {
742 cap
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
,
743 ehci_dev
.func
, offset
);
746 if (cap
& EHCI_USBLEGSUP_BIOS
) {
747 /* well, possibly buggy BIOS... try to shut it down,
748 * and hope nothing goes too wrong */
749 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap
);
750 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
,
751 ehci_dev
.func
, offset
+ 2, 0);
754 /* just in case, always disable EHCI SMIs */
755 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
756 offset
+ EHCI_USBLEGCTLSTS
, 0);
759 static int __init
ehci_setup(void)
761 u32 ctrl
, portsc
, hcs_params
;
762 u32 debug_port
, new_debug_port
= 0, n_ports
;
767 early_ehci_bios_handoff();
774 hcs_params
= readl(&ehci_caps
->hcs_params
);
775 debug_port
= HCS_DEBUG_PORT(hcs_params
);
776 dbgp_phys_port
= debug_port
;
777 n_ports
= HCS_N_PORTS(hcs_params
);
779 dbgp_printk("debug_port: %d\n", debug_port
);
780 dbgp_printk("n_ports: %d\n", n_ports
);
781 dbgp_ehci_status("");
783 for (i
= 1; i
<= n_ports
; i
++) {
784 portsc
= readl(&ehci_regs
->port_status
[i
-1]);
785 dbgp_printk("portstatus%d: %08x\n", i
, portsc
);
788 if (port_map_tried
&& (new_debug_port
!= debug_port
)) {
790 set_debug_port(new_debug_port
);
796 /* Only reset the controller if it is not already in the
797 * configured state */
798 if (!(readl(&ehci_regs
->configured_flag
) & FLAG_CF
)) {
799 if (dbgp_ehci_controller_reset() != 0)
802 dbgp_ehci_status("ehci skip - already configured");
805 ret
= dbgp_external_startup();
807 goto next_debug_port
;
810 /* Things didn't work so remove my claim */
811 ctrl
= readl(&ehci_debug
->control
);
812 ctrl
&= ~(DBGP_CLAIM
| DBGP_OUT
);
813 writel(ctrl
, &ehci_debug
->control
);
819 port_map_tried
|= (1<<(debug_port
- 1));
820 new_debug_port
= ((debug_port
-1+1)%n_ports
) + 1;
821 if (port_map_tried
!= ((1<<n_ports
) - 1)) {
822 set_debug_port(new_debug_port
);
826 set_debug_port(new_debug_port
);
833 int __init
early_dbgp_init(char *s
)
835 u32 debug_port
, bar
, offset
;
836 u32 bus
, slot
, func
, cap
;
837 void __iomem
*ehci_bar
;
844 if (!early_pci_allowed())
849 dbgp_num
= simple_strtoul(s
, &e
, 10);
850 dbgp_printk("dbgp_num: %d\n", dbgp_num
);
852 cap
= find_dbgp(dbgp_num
, &bus
, &slot
, &func
);
856 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus
, slot
,
859 debug_port
= read_pci_config(bus
, slot
, func
, cap
);
860 bar
= (debug_port
>> 29) & 0x7;
861 bar
= (bar
* 4) + 0xc;
862 offset
= (debug_port
>> 16) & 0xfff;
863 dbgp_printk("bar: %02x offset: %03x\n", bar
, offset
);
864 if (bar
!= PCI_BASE_ADDRESS_0
) {
865 dbgp_printk("only debug ports on bar 1 handled.\n");
870 bar_val
= read_pci_config(bus
, slot
, func
, PCI_BASE_ADDRESS_0
);
871 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val
, offset
);
872 if (bar_val
& ~PCI_BASE_ADDRESS_MEM_MASK
) {
873 dbgp_printk("only simple 32bit mmio bars supported\n");
878 /* double check if the mem space is enabled */
879 byte
= read_pci_config_byte(bus
, slot
, func
, 0x04);
882 write_pci_config_byte(bus
, slot
, func
, 0x04, byte
);
883 dbgp_printk("mmio for ehci enabled\n");
887 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
888 * than enough. 1K is the biggest I have seen.
890 set_fixmap_nocache(FIX_DBGP_BASE
, bar_val
& PAGE_MASK
);
891 ehci_bar
= (void __iomem
*)__fix_to_virt(FIX_DBGP_BASE
);
892 ehci_bar
+= bar_val
& ~PAGE_MASK
;
893 dbgp_printk("ehci_bar: %p\n", ehci_bar
);
895 ehci_caps
= ehci_bar
;
896 ehci_regs
= ehci_bar
+ HC_LENGTH(readl(&ehci_caps
->hc_capbase
));
897 ehci_debug
= ehci_bar
+ offset
;
899 ehci_dev
.slot
= slot
;
900 ehci_dev
.func
= func
;
902 detect_set_debug_port();
906 dbgp_printk("ehci_setup failed\n");
911 dbgp_ehci_status("early_init_complete");
916 static void early_dbgp_write(struct console
*con
, const char *str
, u32 n
)
919 char buf
[DBGP_MAX_PACKET
];
924 if (!ehci_debug
|| dbgp_not_safe
)
927 cmd
= readl(&ehci_regs
->command
);
928 if (unlikely(!(cmd
& CMD_RUN
))) {
929 /* If the ehci controller is not in the run state do extended
930 * checks to see if the acpi or some other initialization also
931 * reset the ehci debug port */
932 ctrl
= readl(&ehci_debug
->control
);
933 if (!(ctrl
& DBGP_ENABLED
)) {
935 dbgp_external_startup();
938 writel(cmd
, &ehci_regs
->command
);
943 for (chunk
= 0; chunk
< DBGP_MAX_PACKET
&& n
> 0;
944 str
++, chunk
++, n
--) {
945 if (!use_cr
&& *str
== '\n') {
957 ret
= dbgp_bulk_write(USB_DEBUG_DEVNUM
,
958 dbgp_endpoint_out
, buf
, chunk
);
961 if (unlikely(reset_run
)) {
962 cmd
= readl(&ehci_regs
->command
);
964 writel(cmd
, &ehci_regs
->command
);
968 struct console early_dbgp_console
= {
970 .write
= early_dbgp_write
,
971 .flags
= CON_PRINTBUFFER
,
975 int dbgp_reset_prep(void)
983 if (early_dbgp_console
.index
!= -1 &&
984 !(early_dbgp_console
.flags
& CON_BOOT
))
986 /* This means the console is not initialized, or should get
987 * shutdown so as to allow for reuse of the usb device, which
988 * means it is time to shutdown the usb debug port. */
989 ctrl
= readl(&ehci_debug
->control
);
990 if (ctrl
& DBGP_ENABLED
) {
991 ctrl
&= ~(DBGP_CLAIM
);
992 writel(ctrl
, &ehci_debug
->control
);
996 EXPORT_SYMBOL_GPL(dbgp_reset_prep
);