drivers/gpio/pcf857x.c

   1 /*
   2  * pcf857x - driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
   3  *
   4  * Copyright (C) 2007 David Brownell
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/slab.h>
  23 #include <linux/i2c.h>
  24 #include <linux/i2c/pcf857x.h>
  25
  26 #include <asm/gpio.h>
  27
  28
  29 static const struct i2c_device_id pcf857x_id[] = {
  30         { "pcf8574", 8 },
  31         { "pca8574", 8 },
  32         { "pca9670", 8 },
  33         { "pca9672", 8 },
  34         { "pca9674", 8 },
  35         { "pcf8575", 16 },
  36         { "pca8575", 16 },
  37         { "pca9671", 16 },
  38         { "pca9673", 16 },
  39         { "pca9675", 16 },
  40         { "max7328", 8 },
  41         { "max7329", 8 },
  42         { }
  43 };
  44 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  45
  46 /*
  47  * The pcf857x, pca857x, and pca967x chips only expose one read and one
  48  * write register.  Writing a "one" bit (to match the reset state) lets
  49  * that pin be used as an input; it's not an open-drain model, but acts
  50  * a bit like one.  This is described as "quasi-bidirectional"; read the
  51  * chip documentation for details.
  52  *
  53  * Many other I2C GPIO expander chips (like the pca953x models) have
  54  * more complex register models and more conventional circuitry using
  55  * push/pull drivers.  They often use the same 0x20..0x27 addresses as
  56  * pcf857x parts, making the "legacy" I2C driver model problematic.
  57  */
  58 struct pcf857x {
  59         struct gpio_chip        chip;
  60         struct i2c_client       *client;
  61         struct mutex            lock;           /* protect 'out' */
  62         unsigned                out;            /* software latch */
  63 };
  64
  65 /*-------------------------------------------------------------------------*/
  66
  67 /* Talk to 8-bit I/O expander */
  68
  69 static int pcf857x_input8(struct gpio_chip *chip, unsigned offset)
  70 {
  71         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
  72         int             status;
  73
  74         mutex_lock(&gpio->lock);
  75         gpio->out |= (1 << offset);
  76         status = i2c_smbus_write_byte(gpio->client, gpio->out);
  77         mutex_unlock(&gpio->lock);
  78
  79         return status;
  80 }
  81
  82 static int pcf857x_get8(struct gpio_chip *chip, unsigned offset)
  83 {
  84         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
  85         s32             value;
  86
  87         value = i2c_smbus_read_byte(gpio->client);
  88         return (value < 0) ? 0 : (value & (1 << offset));
  89 }
  90
  91 static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value)
  92 {
  93         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
  94         unsigned        bit = 1 << offset;
  95         int             status;
  96
  97         mutex_lock(&gpio->lock);
  98         if (value)
  99                 gpio->out |= bit;
 100         else
 101                 gpio->out &= ~bit;
 102         status = i2c_smbus_write_byte(gpio->client, gpio->out);
 103         mutex_unlock(&gpio->lock);
 104
 105         return status;
 106 }
 107
 108 static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value)
 109 {
 110         pcf857x_output8(chip, offset, value);
 111 }
 112
 113 /*-------------------------------------------------------------------------*/
 114
 115 /* Talk to 16-bit I/O expander */
 116
 117 static int i2c_write_le16(struct i2c_client *client, u16 word)
 118 {
 119         u8 buf[2] = { word & 0xff, word >> 8, };
 120         int status;
 121
 122         status = i2c_master_send(client, buf, 2);
 123         return (status < 0) ? status : 0;
 124 }
 125
 126 static int i2c_read_le16(struct i2c_client *client)
 127 {
 128         u8 buf[2];
 129         int status;
 130
 131         status = i2c_master_recv(client, buf, 2);
 132         if (status < 0)
 133                 return status;
 134         return (buf[1] << 8) | buf[0];
 135 }
 136
 137 static int pcf857x_input16(struct gpio_chip *chip, unsigned offset)
 138 {
 139         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 140         int             status;
 141
 142         mutex_lock(&gpio->lock);
 143         gpio->out |= (1 << offset);
 144         status = i2c_write_le16(gpio->client, gpio->out);
 145         mutex_unlock(&gpio->lock);
 146
 147         return status;
 148 }
 149
 150 static int pcf857x_get16(struct gpio_chip *chip, unsigned offset)
 151 {
 152         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 153         int             value;
 154
 155         value = i2c_read_le16(gpio->client);
 156         return (value < 0) ? 0 : (value & (1 << offset));
 157 }
 158
 159 static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value)
 160 {
 161         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 162         unsigned        bit = 1 << offset;
 163         int             status;
 164
 165         mutex_lock(&gpio->lock);
 166         if (value)
 167                 gpio->out |= bit;
 168         else
 169                 gpio->out &= ~bit;
 170         status = i2c_write_le16(gpio->client, gpio->out);
 171         mutex_unlock(&gpio->lock);
 172
 173         return status;
 174 }
 175
 176 static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value)
 177 {
 178         pcf857x_output16(chip, offset, value);
 179 }
 180
 181 /*-------------------------------------------------------------------------*/
 182
 183 static int pcf857x_probe(struct i2c_client *client,
 184                          const struct i2c_device_id *id)
 185 {
 186         struct pcf857x_platform_data    *pdata;
 187         struct pcf857x                  *gpio;
 188         int                             status;
 189
 190         pdata = client->dev.platform_data;
 191         if (!pdata) {
 192                 dev_dbg(&client->dev, "no platform data\n");
 193                 return -EINVAL;
 194         }
 195
 196         /* Allocate, initialize, and register this gpio_chip. */
 197         gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
 198         if (!gpio)
 199                 return -ENOMEM;
 200
 201         mutex_init(&gpio->lock);
 202
 203         gpio->chip.base = pdata->gpio_base;
 204         gpio->chip.can_sleep = 1;
 205         gpio->chip.dev = &client->dev;
 206         gpio->chip.owner = THIS_MODULE;
 207
 208         /* NOTE:  the OnSemi jlc1562b is also largely compatible with
 209          * these parts, notably for output.  It has a low-resolution
 210          * DAC instead of pin change IRQs; and its inputs can be the
 211          * result of comparators.
 212          */
 213
 214         /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
 215          * 9670, 9672, 9764, and 9764a use quite a variety.
 216          *
 217          * NOTE: we don't distinguish here between *4 and *4a parts.
 218          */
 219         gpio->chip.ngpio = id->driver_data;
 220         if (gpio->chip.ngpio == 8) {
 221                 gpio->chip.direction_input = pcf857x_input8;
 222                 gpio->chip.get = pcf857x_get8;
 223                 gpio->chip.direction_output = pcf857x_output8;
 224                 gpio->chip.set = pcf857x_set8;
 225
 226                 if (!i2c_check_functionality(client->adapter,
 227                                 I2C_FUNC_SMBUS_BYTE))
 228                         status = -EIO;
 229
 230                 /* fail if there's no chip present */
 231                 else
 232                         status = i2c_smbus_read_byte(client);
 233
 234         /* '75/'75c addresses are 0x20..0x27, just like the '74;
 235          * the '75c doesn't have a current source pulling high.
 236          * 9671, 9673, and 9765 use quite a variety of addresses.
 237          *
 238          * NOTE: we don't distinguish here between '75 and '75c parts.
 239          */
 240         } else if (gpio->chip.ngpio == 16) {
 241                 gpio->chip.direction_input = pcf857x_input16;
 242                 gpio->chip.get = pcf857x_get16;
 243                 gpio->chip.direction_output = pcf857x_output16;
 244                 gpio->chip.set = pcf857x_set16;
 245
 246                 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 247                         status = -EIO;
 248
 249                 /* fail if there's no chip present */
 250                 else
 251                         status = i2c_read_le16(client);
 252
 253         } else {
 254                 dev_dbg(&client->dev, "unsupported number of gpios\n");
 255                 status = -EINVAL;
 256         }
 257
 258         if (status < 0)
 259                 goto fail;
 260
 261         gpio->chip.label = client->name;
 262
 263         gpio->client = client;
 264         i2c_set_clientdata(client, gpio);
 265
 266         /* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
 267          * We can't actually know whether a pin is configured (a) as output
 268          * and driving the signal low, or (b) as input and reporting a low
 269          * value ... without knowing the last value written since the chip
 270          * came out of reset (if any).  We can't read the latched output.
 271          *
 272          * In short, the only reliable solution for setting up pin direction
 273          * is to do it explicitly.  The setup() method can do that, but it
 274          * may cause transient glitching since it can't know the last value
 275          * written (some pins may need to be driven low).
 276          *
 277          * Using pdata->n_latch avoids that trouble.  When left initialized
 278          * to zero, our software copy of the "latch" then matches the chip's
 279          * all-ones reset state.  Otherwise it flags pins to be driven low.
 280          */
 281         gpio->out = ~pdata->n_latch;
 282
 283         status = gpiochip_add(&gpio->chip);
 284         if (status < 0)
 285                 goto fail;
 286
 287         /* NOTE: these chips can issue "some pin-changed" IRQs, which we
 288          * don't yet even try to use.  Among other issues, the relevant
 289          * genirq state isn't available to modular drivers; and most irq
 290          * methods can't be called from sleeping contexts.
 291          */
 292
 293         dev_info(&client->dev, "gpios %d..%d on a %s%s\n",
 294                         gpio->chip.base,
 295                         gpio->chip.base + gpio->chip.ngpio - 1,
 296                         client->name,
 297                         client->irq ? " (irq ignored)" : "");
 298
 299         /* Let platform code set up the GPIOs and their users.
 300          * Now is the first time anyone could use them.
 301          */
 302         if (pdata->setup) {
 303                 status = pdata->setup(client,
 304                                 gpio->chip.base, gpio->chip.ngpio,
 305                                 pdata->context);
 306                 if (status < 0)
 307                         dev_warn(&client->dev, "setup --> %d\n", status);
 308         }
 309
 310         return 0;
 311
 312 fail:
 313         dev_dbg(&client->dev, "probe error %d for '%s'\n",
 314                         status, client->name);
 315         kfree(gpio);
 316         return status;
 317 }
 318
 319 static int pcf857x_remove(struct i2c_client *client)
 320 {
 321         struct pcf857x_platform_data    *pdata = client->dev.platform_data;
 322         struct pcf857x                  *gpio = i2c_get_clientdata(client);
 323         int                             status = 0;
 324
 325         if (pdata->teardown) {
 326                 status = pdata->teardown(client,
 327                                 gpio->chip.base, gpio->chip.ngpio,
 328                                 pdata->context);
 329                 if (status < 0) {
 330                         dev_err(&client->dev, "%s --> %d\n",
 331                                         "teardown", status);
 332                         return status;
 333                 }
 334         }
 335
 336         status = gpiochip_remove(&gpio->chip);
 337         if (status == 0)
 338                 kfree(gpio);
 339         else
 340                 dev_err(&client->dev, "%s --> %d\n", "remove", status);
 341         return status;
 342 }
 343
 344 static struct i2c_driver pcf857x_driver = {
 345         .driver = {
 346                 .name   = "pcf857x",
 347                 .owner  = THIS_MODULE,
 348         },
 349         .probe  = pcf857x_probe,
 350         .remove = pcf857x_remove,
 351         .id_table = pcf857x_id,
 352 };
 353
 354 static int __init pcf857x_init(void)
 355 {
 356         return i2c_add_driver(&pcf857x_driver);
 357 }
 358 /* register after i2c postcore initcall and before
 359  * subsys initcalls that may rely on these GPIOs
 360  */
 361 subsys_initcall(pcf857x_init);
 362
 363 static void __exit pcf857x_exit(void)
 364 {
 365         i2c_del_driver(&pcf857x_driver);
 366 }
 367 module_exit(pcf857x_exit);
 368
 369 MODULE_LICENSE("GPL");
 370 MODULE_AUTHOR("David Brownell");