arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/ptrace.h>
  26 #include <linux/random.h>       /* for rand_initialize_irq() */
  27 #include <linux/signal.h>
  28 #include <linux/smp.h>
  29 #include <linux/threads.h>
  30 #include <linux/bitops.h>
  31 #include <linux/irq.h>
  32
  33 #include <asm/delay.h>
  34 #include <asm/intrinsics.h>
  35 #include <asm/io.h>
  36 #include <asm/hw_irq.h>
  37 #include <asm/machvec.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/system.h>
  40 #include <asm/tlbflush.h>
  41
  42 #ifdef CONFIG_PERFMON
  43 # include <asm/perfmon.h>
  44 #endif
  45
  46 #define IRQ_DEBUG       0
  47
  48 #define IRQ_VECTOR_UNASSIGNED   (0)
  49
  50 #define IRQ_UNUSED              (0)
  51 #define IRQ_USED                (1)
  52 #define IRQ_RSVD                (2)
  53
  54 /* These can be overridden in platform_irq_init */
  55 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  56 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  57
  58 /* default base addr of IPI table */
  59 void __iomem *ipi_base_addr = ((void __iomem *)
  60                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  61
  62 static cpumask_t vector_allocation_domain(int cpu);
  63
  64 /*
  65  * Legacy IRQ to IA-64 vector translation table.
  66  */
  67 __u8 isa_irq_to_vector_map[16] = {
  68         /* 8259 IRQ translation, first 16 entries */
  69         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  70         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  71 };
  72 EXPORT_SYMBOL(isa_irq_to_vector_map);
  73
  74 DEFINE_SPINLOCK(vector_lock);
  75
  76 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
  77         [0 ... NR_IRQS - 1] = {
  78                 .vector = IRQ_VECTOR_UNASSIGNED,
  79                 .domain = CPU_MASK_NONE
  80         }
  81 };
  82
  83 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
  84         [0 ... IA64_NUM_VECTORS - 1] = -1
  85 };
  86
  87 static cpumask_t vector_table[IA64_NUM_VECTORS] = {
  88         [0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE
  89 };
  90
  91 static int irq_status[NR_IRQS] = {
  92         [0 ... NR_IRQS -1] = IRQ_UNUSED
  93 };
  94
  95 int check_irq_used(int irq)
  96 {
  97         if (irq_status[irq] == IRQ_USED)
  98                 return 1;
  99
 100         return -1;
 101 }
 102
 103 static inline int find_unassigned_irq(void)
 104 {
 105         int irq;
 106
 107         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
 108                 if (irq_status[irq] == IRQ_UNUSED)
 109                         return irq;
 110         return -ENOSPC;
 111 }
 112
 113 static inline int find_unassigned_vector(cpumask_t domain)
 114 {
 115         cpumask_t mask;
 116         int pos, vector;
 117
 118         cpus_and(mask, domain, cpu_online_map);
 119         if (cpus_empty(mask))
 120                 return -EINVAL;
 121
 122         for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
 123                 vector = IA64_FIRST_DEVICE_VECTOR + pos;
 124                 cpus_and(mask, domain, vector_table[vector]);
 125                 if (!cpus_empty(mask))
 126                         continue;
 127                 return vector;
 128         }
 129         return -ENOSPC;
 130 }
 131
 132 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
 133 {
 134         cpumask_t mask;
 135         int cpu;
 136         struct irq_cfg *cfg = &irq_cfg[irq];
 137
 138         BUG_ON((unsigned)irq >= NR_IRQS);
 139         BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
 140
 141         cpus_and(mask, domain, cpu_online_map);
 142         if (cpus_empty(mask))
 143                 return -EINVAL;
 144         if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
 145                 return 0;
 146         if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
 147                 return -EBUSY;
 148         for_each_cpu_mask(cpu, mask)
 149                 per_cpu(vector_irq, cpu)[vector] = irq;
 150         cfg->vector = vector;
 151         cfg->domain = domain;
 152         irq_status[irq] = IRQ_USED;
 153         cpus_or(vector_table[vector], vector_table[vector], domain);
 154         return 0;
 155 }
 156
 157 int bind_irq_vector(int irq, int vector, cpumask_t domain)
 158 {
 159         unsigned long flags;
 160         int ret;
 161
 162         spin_lock_irqsave(&vector_lock, flags);
 163         ret = __bind_irq_vector(irq, vector, domain);
 164         spin_unlock_irqrestore(&vector_lock, flags);
 165         return ret;
 166 }
 167
 168 static void __clear_irq_vector(int irq)
 169 {
 170         int vector, cpu;
 171         cpumask_t mask;
 172         cpumask_t domain;
 173         struct irq_cfg *cfg = &irq_cfg[irq];
 174
 175         BUG_ON((unsigned)irq >= NR_IRQS);
 176         BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
 177         vector = cfg->vector;
 178         domain = cfg->domain;
 179         cpus_and(mask, cfg->domain, cpu_online_map);
 180         for_each_cpu_mask(cpu, mask)
 181                 per_cpu(vector_irq, cpu)[vector] = -1;
 182         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 183         cfg->domain = CPU_MASK_NONE;
 184         irq_status[irq] = IRQ_UNUSED;
 185         cpus_andnot(vector_table[vector], vector_table[vector], domain);
 186 }
 187
 188 static void clear_irq_vector(int irq)
 189 {
 190         unsigned long flags;
 191
 192         spin_lock_irqsave(&vector_lock, flags);
 193         __clear_irq_vector(irq);
 194         spin_unlock_irqrestore(&vector_lock, flags);
 195 }
 196
 197 int
 198 ia64_native_assign_irq_vector (int irq)
 199 {
 200         unsigned long flags;
 201         int vector, cpu;
 202         cpumask_t domain = CPU_MASK_NONE;
 203
 204         vector = -ENOSPC;
 205
 206         spin_lock_irqsave(&vector_lock, flags);
 207         for_each_online_cpu(cpu) {
 208                 domain = vector_allocation_domain(cpu);
 209                 vector = find_unassigned_vector(domain);
 210                 if (vector >= 0)
 211                         break;
 212         }
 213         if (vector < 0)
 214                 goto out;
 215         if (irq == AUTO_ASSIGN)
 216                 irq = vector;
 217         BUG_ON(__bind_irq_vector(irq, vector, domain));
 218  out:
 219         spin_unlock_irqrestore(&vector_lock, flags);
 220         return vector;
 221 }
 222
 223 void
 224 ia64_native_free_irq_vector (int vector)
 225 {
 226         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 227             vector > IA64_LAST_DEVICE_VECTOR)
 228                 return;
 229         clear_irq_vector(vector);
 230 }
 231
 232 int
 233 reserve_irq_vector (int vector)
 234 {
 235         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 236             vector > IA64_LAST_DEVICE_VECTOR)
 237                 return -EINVAL;
 238         return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
 239 }
 240
 241 /*
 242  * Initialize vector_irq on a new cpu. This function must be called
 243  * with vector_lock held.
 244  */
 245 void __setup_vector_irq(int cpu)
 246 {
 247         int irq, vector;
 248
 249         /* Clear vector_irq */
 250         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
 251                 per_cpu(vector_irq, cpu)[vector] = -1;
 252         /* Mark the inuse vectors */
 253         for (irq = 0; irq < NR_IRQS; ++irq) {
 254                 if (!cpu_isset(cpu, irq_cfg[irq].domain))
 255                         continue;
 256                 vector = irq_to_vector(irq);
 257                 per_cpu(vector_irq, cpu)[vector] = irq;
 258         }
 259 }
 260
 261 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
 262
 263 static enum vector_domain_type {
 264         VECTOR_DOMAIN_NONE,
 265         VECTOR_DOMAIN_PERCPU
 266 } vector_domain_type = VECTOR_DOMAIN_NONE;
 267
 268 static cpumask_t vector_allocation_domain(int cpu)
 269 {
 270         if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
 271                 return cpumask_of_cpu(cpu);
 272         return CPU_MASK_ALL;
 273 }
 274
 275 static int __irq_prepare_move(int irq, int cpu)
 276 {
 277         struct irq_cfg *cfg = &irq_cfg[irq];
 278         int vector;
 279         cpumask_t domain;
 280
 281         if (cfg->move_in_progress || cfg->move_cleanup_count)
 282                 return -EBUSY;
 283         if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
 284                 return -EINVAL;
 285         if (cpu_isset(cpu, cfg->domain))
 286                 return 0;
 287         domain = vector_allocation_domain(cpu);
 288         vector = find_unassigned_vector(domain);
 289         if (vector < 0)
 290                 return -ENOSPC;
 291         cfg->move_in_progress = 1;
 292         cfg->old_domain = cfg->domain;
 293         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 294         cfg->domain = CPU_MASK_NONE;
 295         BUG_ON(__bind_irq_vector(irq, vector, domain));
 296         return 0;
 297 }
 298
 299 int irq_prepare_move(int irq, int cpu)
 300 {
 301         unsigned long flags;
 302         int ret;
 303
 304         spin_lock_irqsave(&vector_lock, flags);
 305         ret = __irq_prepare_move(irq, cpu);
 306         spin_unlock_irqrestore(&vector_lock, flags);
 307         return ret;
 308 }
 309
 310 void irq_complete_move(unsigned irq)
 311 {
 312         struct irq_cfg *cfg = &irq_cfg[irq];
 313         cpumask_t cleanup_mask;
 314         int i;
 315
 316         if (likely(!cfg->move_in_progress))
 317                 return;
 318
 319         if (unlikely(cpu_isset(smp_processor_id(), cfg->old_domain)))
 320                 return;
 321
 322         cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
 323         cfg->move_cleanup_count = cpus_weight(cleanup_mask);
 324         for_each_cpu_mask(i, cleanup_mask)
 325                 platform_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0);
 326         cfg->move_in_progress = 0;
 327 }
 328
 329 static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
 330 {
 331         int me = smp_processor_id();
 332         ia64_vector vector;
 333         unsigned long flags;
 334
 335         for (vector = IA64_FIRST_DEVICE_VECTOR;
 336              vector < IA64_LAST_DEVICE_VECTOR; vector++) {
 337                 int irq;
 338                 struct irq_desc *desc;
 339                 struct irq_cfg *cfg;
 340                 irq = __get_cpu_var(vector_irq)[vector];
 341                 if (irq < 0)
 342                         continue;
 343
 344                 desc = irq_desc + irq;
 345                 cfg = irq_cfg + irq;
 346                 raw_spin_lock(&desc->lock);
 347                 if (!cfg->move_cleanup_count)
 348                         goto unlock;
 349
 350                 if (!cpu_isset(me, cfg->old_domain))
 351                         goto unlock;
 352
 353                 spin_lock_irqsave(&vector_lock, flags);
 354                 __get_cpu_var(vector_irq)[vector] = -1;
 355                 cpu_clear(me, vector_table[vector]);
 356                 spin_unlock_irqrestore(&vector_lock, flags);
 357                 cfg->move_cleanup_count--;
 358         unlock:
 359                 raw_spin_unlock(&desc->lock);
 360         }
 361         return IRQ_HANDLED;
 362 }
 363
 364 static struct irqaction irq_move_irqaction = {
 365         .handler =      smp_irq_move_cleanup_interrupt,
 366         .flags =        IRQF_DISABLED,
 367         .name =         "irq_move"
 368 };
 369
 370 static int __init parse_vector_domain(char *arg)
 371 {
 372         if (!arg)
 373                 return -EINVAL;
 374         if (!strcmp(arg, "percpu")) {
 375                 vector_domain_type = VECTOR_DOMAIN_PERCPU;
 376                 no_int_routing = 1;
 377         }
 378         return 0;
 379 }
 380 early_param("vector", parse_vector_domain);
 381 #else
 382 static cpumask_t vector_allocation_domain(int cpu)
 383 {
 384         return CPU_MASK_ALL;
 385 }
 386 #endif
 387
 388
 389 void destroy_and_reserve_irq(unsigned int irq)
 390 {
 391         unsigned long flags;
 392
 393         dynamic_irq_cleanup(irq);
 394
 395         spin_lock_irqsave(&vector_lock, flags);
 396         __clear_irq_vector(irq);
 397         irq_status[irq] = IRQ_RSVD;
 398         spin_unlock_irqrestore(&vector_lock, flags);
 399 }
 400
 401 /*
 402  * Dynamic irq allocate and deallocation for MSI
 403  */
 404 int create_irq(void)
 405 {
 406         unsigned long flags;
 407         int irq, vector, cpu;
 408         cpumask_t domain = CPU_MASK_NONE;
 409
 410         irq = vector = -ENOSPC;
 411         spin_lock_irqsave(&vector_lock, flags);
 412         for_each_online_cpu(cpu) {
 413                 domain = vector_allocation_domain(cpu);
 414                 vector = find_unassigned_vector(domain);
 415                 if (vector >= 0)
 416                         break;
 417         }
 418         if (vector < 0)
 419                 goto out;
 420         irq = find_unassigned_irq();
 421         if (irq < 0)
 422                 goto out;
 423         BUG_ON(__bind_irq_vector(irq, vector, domain));
 424  out:
 425         spin_unlock_irqrestore(&vector_lock, flags);
 426         if (irq >= 0)
 427                 dynamic_irq_init(irq);
 428         return irq;
 429 }
 430
 431 void destroy_irq(unsigned int irq)
 432 {
 433         dynamic_irq_cleanup(irq);
 434         clear_irq_vector(irq);
 435 }
 436
 437 #ifdef CONFIG_SMP
 438 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 439 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 440 #else
 441 #       define IS_RESCHEDULE(vec)       (0)
 442 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 443 #endif
 444 /*
 445  * That's where the IVT branches when we get an external
 446  * interrupt. This branches to the correct hardware IRQ handler via
 447  * function ptr.
 448  */
 449 void
 450 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 451 {
 452         struct pt_regs *old_regs = set_irq_regs(regs);
 453         unsigned long saved_tpr;
 454
 455 #if IRQ_DEBUG
 456         {
 457                 unsigned long bsp, sp;
 458
 459                 /*
 460                  * Note: if the interrupt happened while executing in
 461                  * the context switch routine (ia64_switch_to), we may
 462                  * get a spurious stack overflow here.  This is
 463                  * because the register and the memory stack are not
 464                  * switched atomically.
 465                  */
 466                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 467                 sp = ia64_getreg(_IA64_REG_SP);
 468
 469                 if ((sp - bsp) < 1024) {
 470                         static unsigned char count;
 471                         static long last_time;
 472
 473                         if (time_after(jiffies, last_time + 5 * HZ))
 474                                 count = 0;
 475                         if (++count < 5) {
 476                                 last_time = jiffies;
 477                                 printk("ia64_handle_irq: DANGER: less than "
 478                                        "1KB of free stack space!!\n"
 479                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 480                         }
 481                 }
 482         }
 483 #endif /* IRQ_DEBUG */
 484
 485         /*
 486          * Always set TPR to limit maximum interrupt nesting depth to
 487          * 16 (without this, it would be ~240, which could easily lead
 488          * to kernel stack overflows).
 489          */
 490         irq_enter();
 491         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 492         ia64_srlz_d();
 493         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 494                 int irq = local_vector_to_irq(vector);
 495                 struct irq_desc *desc = irq_to_desc(irq);
 496
 497                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 498                         smp_local_flush_tlb();
 499                         kstat_incr_irqs_this_cpu(irq, desc);
 500                 } else if (unlikely(IS_RESCHEDULE(vector))) {
 501                         kstat_incr_irqs_this_cpu(irq, desc);
 502                 } else {
 503                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 504                         ia64_srlz_d();
 505
 506                         if (unlikely(irq < 0)) {
 507                                 printk(KERN_ERR "%s: Unexpected interrupt "
 508                                        "vector %d on CPU %d is not mapped "
 509                                        "to any IRQ!\n", __func__, vector,
 510                                        smp_processor_id());
 511                         } else
 512                                 generic_handle_irq(irq);
 513
 514                         /*
 515                          * Disable interrupts and send EOI:
 516                          */
 517                         local_irq_disable();
 518                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 519                 }
 520                 ia64_eoi();
 521                 vector = ia64_get_ivr();
 522         }
 523         /*
 524          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 525          * handler needs to be able to wait for further keyboard interrupts, which can't
 526          * come through until ia64_eoi() has been done.
 527          */
 528         irq_exit();
 529         set_irq_regs(old_regs);
 530 }
 531
 532 #ifdef CONFIG_HOTPLUG_CPU
 533 /*
 534  * This function emulates a interrupt processing when a cpu is about to be
 535  * brought down.
 536  */
 537 void ia64_process_pending_intr(void)
 538 {
 539         ia64_vector vector;
 540         unsigned long saved_tpr;
 541         extern unsigned int vectors_in_migration[NR_IRQS];
 542
 543         vector = ia64_get_ivr();
 544
 545         irq_enter();
 546         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 547         ia64_srlz_d();
 548
 549          /*
 550           * Perform normal interrupt style processing
 551           */
 552         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 553                 int irq = local_vector_to_irq(vector);
 554                 struct irq_desc *desc = irq_to_desc(irq);
 555
 556                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 557                         smp_local_flush_tlb();
 558                         kstat_incr_irqs_this_cpu(irq, desc);
 559                 } else if (unlikely(IS_RESCHEDULE(vector))) {
 560                         kstat_incr_irqs_this_cpu(irq, desc);
 561                 } else {
 562                         struct pt_regs *old_regs = set_irq_regs(NULL);
 563
 564                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 565                         ia64_srlz_d();
 566
 567                         /*
 568                          * Now try calling normal ia64_handle_irq as it would have got called
 569                          * from a real intr handler. Try passing null for pt_regs, hopefully
 570                          * it will work. I hope it works!.
 571                          * Probably could shared code.
 572                          */
 573                         if (unlikely(irq < 0)) {
 574                                 printk(KERN_ERR "%s: Unexpected interrupt "
 575                                        "vector %d on CPU %d not being mapped "
 576                                        "to any IRQ!!\n", __func__, vector,
 577                                        smp_processor_id());
 578                         } else {
 579                                 vectors_in_migration[irq]=0;
 580                                 generic_handle_irq(irq);
 581                         }
 582                         set_irq_regs(old_regs);
 583
 584                         /*
 585                          * Disable interrupts and send EOI
 586                          */
 587                         local_irq_disable();
 588                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 589                 }
 590                 ia64_eoi();
 591                 vector = ia64_get_ivr();
 592         }
 593         irq_exit();
 594 }
 595 #endif
 596
 597
 598 #ifdef CONFIG_SMP
 599
 600 static irqreturn_t dummy_handler (int irq, void *dev_id)
 601 {
 602         BUG();
 603 }
 604
 605 static struct irqaction ipi_irqaction = {
 606         .handler =      handle_IPI,
 607         .flags =        IRQF_DISABLED,
 608         .name =         "IPI"
 609 };
 610
 611 /*
 612  * KVM uses this interrupt to force a cpu out of guest mode
 613  */
 614 static struct irqaction resched_irqaction = {
 615         .handler =      dummy_handler,
 616         .flags =        IRQF_DISABLED,
 617         .name =         "resched"
 618 };
 619
 620 static struct irqaction tlb_irqaction = {
 621         .handler =      dummy_handler,
 622         .flags =        IRQF_DISABLED,
 623         .name =         "tlb_flush"
 624 };
 625
 626 #endif
 627
 628 void
 629 ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
 630 {
 631         struct irq_desc *desc;
 632         unsigned int irq;
 633
 634         irq = vec;
 635         BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
 636         desc = irq_desc + irq;
 637         desc->status |= IRQ_PER_CPU;
 638         desc->chip = &irq_type_ia64_lsapic;
 639         if (action)
 640                 setup_irq(irq, action);
 641 }
 642
 643 void __init
 644 ia64_native_register_ipi(void)
 645 {
 646 #ifdef CONFIG_SMP
 647         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 648         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 649         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 650 #endif
 651 }
 652
 653 void __init
 654 init_IRQ (void)
 655 {
 656         ia64_register_ipi();
 657         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 658 #ifdef CONFIG_SMP
 659 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)
 660         if (vector_domain_type != VECTOR_DOMAIN_NONE)
 661                 register_percpu_irq(IA64_IRQ_MOVE_VECTOR, &irq_move_irqaction);
 662 #endif
 663 #endif
 664 #ifdef CONFIG_PERFMON
 665         pfm_init_percpu();
 666 #endif
 667         platform_irq_init();
 668 }
 669
 670 void
 671 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 672 {
 673         void __iomem *ipi_addr;
 674         unsigned long ipi_data;
 675         unsigned long phys_cpu_id;
 676
 677         phys_cpu_id = cpu_physical_id(cpu);
 678
 679         /*
 680          * cpu number is in 8bit ID and 8bit EID
 681          */
 682
 683         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 684         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 685
 686         writeq(ipi_data, ipi_addr);
 687 }