1 /***************************************************************************\
3 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
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11 |* tion and internal comments to the code, notices to the end user *|
14 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
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35 |* all U.S. Government End Users acquire the source code with only *|
36 |* those rights set forth herein. *|
38 \***************************************************************************/
41 * GPL licensing note -- nVidia is allowing a liberal interpretation of
42 * the documentation restriction above, to merely say that this nVidia's
43 * copyright and disclaimer should be included with all code derived
44 * from this source. -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99
47 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.21 2002/10/14 18:22:46 mvojkovi Exp $ */
50 #define RIVA_SW_VERSION 0x00010003
67 * Typedefs to force certain sized values.
69 typedef unsigned char U008
;
70 typedef unsigned short U016
;
71 typedef unsigned int U032
;
78 #define NV_WR08(p,i,d) (__raw_writeb((d), (void __iomem *)(p) + (i)))
79 #define NV_RD08(p,i) (__raw_readb((void __iomem *)(p) + (i)))
80 #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i)))
81 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
82 #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i)))
83 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
86 #define VGA_RD08(p,i) (readb((void __iomem *)(p) + (i)))
89 * Define different architectures.
91 #define NV_ARCH_03 0x03
92 #define NV_ARCH_04 0x04
93 #define NV_ARCH_10 0x10
94 #define NV_ARCH_20 0x20
95 #define NV_ARCH_30 0x30
96 #define NV_ARCH_40 0x40
98 /***************************************************************************\
102 \***************************************************************************/
105 * Raster OPeration. Windows style ROP3.
107 typedef volatile struct
116 U032 reserved01
[0x0BB];
120 * 8X8 Monochrome pattern.
122 typedef volatile struct
131 U032 reserved01
[0x0BD];
133 U032 reserved03
[0x001];
139 * Scissor clip rectangle.
141 typedef volatile struct
150 U032 reserved01
[0x0BB];
155 * 2D filled rectangle.
157 typedef volatile struct
166 U032 reserved01
[0x0BC];
168 U032 reserved03
[0x03E];
173 * 2D screen-screen BLT.
175 typedef volatile struct
184 U032 reserved01
[0x0BB];
192 typedef volatile struct
201 U032 reserved01
[0x0BC];
205 U032 reserved02
[0x03C];
209 * Filled rectangle combined with monochrome expand. Useful for glyphs.
211 typedef volatile struct
220 U032 reserved01
[0x0BB];
221 U032 reserved03
[(0x040)-1];
227 } UnclippedRectangle
[64];
228 U032 reserved04
[(0x080)-3];
239 } ClippedRectangle
[64];
240 U032 reserved05
[(0x080)-5];
249 U032 MonochromeData1C
;
250 U032 reserved06
[(0x080)+121];
258 U032 WidthHeightOutD
;
260 U032 MonochromeData1D
;
261 U032 reserved07
[(0x080)+120];
270 U032 WidthHeightOutE
;
272 U032 MonochromeData01E
;
275 * 3D textured, Z buffered triangle.
277 typedef volatile struct
286 U032 reserved01
[0x0BC];
291 /* This is a problem on LynxOS */
297 U032 reserved02
[0x339];
306 } RivaTexturedTriangle03
;
307 typedef volatile struct
316 U032 reserved01
[0x0BB];
322 /* This is a problem on LynxOS */
328 U032 reserved02
[0x39];
341 } RivaTexturedTriangle05
;
345 typedef volatile struct
354 U032 reserved01
[0x0BC];
355 U032 Color
; /* source color 0304-0307*/
356 U032 Reserved02
[0x03e];
357 struct { /* start aliased methods in array 0400- */
358 U032 point0
; /* y_x S16_S16 in pixels 0- 3*/
359 U032 point1
; /* y_x S16_S16 in pixels 4- 7*/
360 } Lin
[16]; /* end of aliased methods in array -047f*/
361 struct { /* start aliased methods in array 0480- */
362 U032 point0X
; /* in pixels, 0 at left 0- 3*/
363 U032 point0Y
; /* in pixels, 0 at top 4- 7*/
364 U032 point1X
; /* in pixels, 0 at left 8- b*/
365 U032 point1Y
; /* in pixels, 0 at top c- f*/
366 } Lin32
[8]; /* end of aliased methods in array -04ff*/
367 U032 PolyLin
[32]; /* y_x S16_S16 in pixels 0500-057f*/
368 struct { /* start aliased methods in array 0580- */
369 U032 x
; /* in pixels, 0 at left 0- 3*/
370 U032 y
; /* in pixels, 0 at top 4- 7*/
371 } PolyLin32
[16]; /* end of aliased methods in array -05ff*/
372 struct { /* start aliased methods in array 0600- */
373 U032 color
; /* source color 0- 3*/
374 U032 point
; /* y_x S16_S16 in pixels 4- 7*/
375 } ColorPolyLin
[16]; /* end of aliased methods in array -067f*/
380 typedef volatile struct
389 U032 reserved01
[0x0BE];
392 typedef volatile struct
401 U032 reserved01
[0x0BD];
403 U032 RenderBufferOffset
;
407 /***************************************************************************\
409 * Virtualized RIVA H/W interface. *
411 \***************************************************************************/
416 struct _riva_hw_inst
;
417 struct _riva_hw_state
;
419 * Virtialized chip interface. Makes RIVA 128 and TNT look alike.
421 typedef struct _riva_hw_inst
424 * Chip specific settings.
430 U032 RamAmountKBytes
;
431 U032 MaxVClockFreqKHz
;
432 U032 RamBandwidthKBytesPerSec
;
442 * Non-FIFO registers.
444 volatile U032 __iomem
*PCRTC0
;
445 volatile U032 __iomem
*PCRTC
;
446 volatile U032 __iomem
*PRAMDAC0
;
447 volatile U032 __iomem
*PFB
;
448 volatile U032 __iomem
*PFIFO
;
449 volatile U032 __iomem
*PGRAPH
;
450 volatile U032 __iomem
*PEXTDEV
;
451 volatile U032 __iomem
*PTIMER
;
452 volatile U032 __iomem
*PMC
;
453 volatile U032 __iomem
*PRAMIN
;
454 volatile U032 __iomem
*FIFO
;
455 volatile U032 __iomem
*CURSOR
;
456 volatile U008 __iomem
*PCIO0
;
457 volatile U008 __iomem
*PCIO
;
458 volatile U008 __iomem
*PVIO
;
459 volatile U008 __iomem
*PDIO0
;
460 volatile U008 __iomem
*PDIO
;
461 volatile U032 __iomem
*PRAMDAC
;
463 * Common chip functions.
465 int (*Busy
)(struct _riva_hw_inst
*);
466 void (*LoadStateExt
)(struct _riva_hw_inst
*,struct _riva_hw_state
*);
467 void (*UnloadStateExt
)(struct _riva_hw_inst
*,struct _riva_hw_state
*);
468 void (*SetStartAddress
)(struct _riva_hw_inst
*,U032
);
469 void (*SetSurfaces2D
)(struct _riva_hw_inst
*,U032
,U032
);
470 void (*SetSurfaces3D
)(struct _riva_hw_inst
*,U032
,U032
);
471 int (*ShowHideCursor
)(struct _riva_hw_inst
*,int);
472 void (*LockUnlock
)(struct _riva_hw_inst
*, int);
474 * Current extended mode settings.
476 struct _riva_hw_state
*CurrentState
;
480 RivaRop __iomem
*Rop
;
481 RivaPattern __iomem
*Patt
;
482 RivaClip __iomem
*Clip
;
483 RivaPixmap __iomem
*Pixmap
;
484 RivaScreenBlt __iomem
*Blt
;
485 RivaBitmap __iomem
*Bitmap
;
486 RivaLine __iomem
*Line
;
487 RivaTexturedTriangle03 __iomem
*Tri03
;
488 RivaTexturedTriangle05 __iomem
*Tri05
;
491 * Extended mode state information.
493 typedef struct _riva_hw_state
532 * function prototypes
535 extern int CalcStateExt
538 RIVA_HW_STATE
*state
,
549 int RivaGetConfig(RIVA_HW_INST
*, unsigned int);
551 * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
554 #define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \
556 while ((hwinst).FifoFreeCount < (cnt)) { \
558 (hwinst).FifoFreeCount = NV_RD32(&(hwinst).hwptr->FifoFree, 0) >> 2; \
560 (hwinst).FifoFreeCount -= (cnt); \
562 #endif /* __RIVA_HW_H__ */