2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/mmc/sdio_func.h>
21 #include <linux/slab.h>
23 #include <pcmcia/cs_types.h>
24 #include <pcmcia/cs.h>
25 #include <pcmcia/cistpl.h>
26 #include <pcmcia/ds.h>
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
33 /* Temporary list of yet-to-be-attached buses */
34 static LIST_HEAD(attach_queue
);
35 /* List if running buses */
36 static LIST_HEAD(buses
);
37 /* Software ID counter */
38 static unsigned int next_busnumber
;
39 /* buses_mutes locks the two buslists and the next_busnumber.
40 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
41 static DEFINE_MUTEX(buses_mutex
);
43 /* There are differences in the codeflow, if the bus is
44 * initialized from early boot, as various needed services
45 * are not available early. This is a mechanism to delay
46 * these initializations to after early boot has finished.
47 * It's also used to avoid mutex locking, as that's not
48 * available and needed early. */
49 static bool ssb_is_early_boot
= 1;
51 static void ssb_buses_lock(void);
52 static void ssb_buses_unlock(void);
55 #ifdef CONFIG_SSB_PCIHOST
56 struct ssb_bus
*ssb_pci_dev_to_bus(struct pci_dev
*pdev
)
61 list_for_each_entry(bus
, &buses
, list
) {
62 if (bus
->bustype
== SSB_BUSTYPE_PCI
&&
63 bus
->host_pci
== pdev
)
72 #endif /* CONFIG_SSB_PCIHOST */
74 #ifdef CONFIG_SSB_PCMCIAHOST
75 struct ssb_bus
*ssb_pcmcia_dev_to_bus(struct pcmcia_device
*pdev
)
80 list_for_each_entry(bus
, &buses
, list
) {
81 if (bus
->bustype
== SSB_BUSTYPE_PCMCIA
&&
82 bus
->host_pcmcia
== pdev
)
91 #endif /* CONFIG_SSB_PCMCIAHOST */
93 #ifdef CONFIG_SSB_SDIOHOST
94 struct ssb_bus
*ssb_sdio_func_to_bus(struct sdio_func
*func
)
99 list_for_each_entry(bus
, &buses
, list
) {
100 if (bus
->bustype
== SSB_BUSTYPE_SDIO
&&
101 bus
->host_sdio
== func
)
110 #endif /* CONFIG_SSB_SDIOHOST */
112 int ssb_for_each_bus_call(unsigned long data
,
113 int (*func
)(struct ssb_bus
*bus
, unsigned long data
))
119 list_for_each_entry(bus
, &buses
, list
) {
120 res
= func(bus
, data
);
131 static struct ssb_device
*ssb_device_get(struct ssb_device
*dev
)
134 get_device(dev
->dev
);
138 static void ssb_device_put(struct ssb_device
*dev
)
141 put_device(dev
->dev
);
144 static inline struct ssb_driver
*ssb_driver_get(struct ssb_driver
*drv
)
147 get_driver(&drv
->drv
);
151 static inline void ssb_driver_put(struct ssb_driver
*drv
)
154 put_driver(&drv
->drv
);
157 static int ssb_device_resume(struct device
*dev
)
159 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
160 struct ssb_driver
*ssb_drv
;
164 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
165 if (ssb_drv
&& ssb_drv
->resume
)
166 err
= ssb_drv
->resume(ssb_dev
);
174 static int ssb_device_suspend(struct device
*dev
, pm_message_t state
)
176 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
177 struct ssb_driver
*ssb_drv
;
181 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
182 if (ssb_drv
&& ssb_drv
->suspend
)
183 err
= ssb_drv
->suspend(ssb_dev
, state
);
191 int ssb_bus_resume(struct ssb_bus
*bus
)
195 /* Reset HW state information in memory, so that HW is
196 * completely reinitialized. */
197 bus
->mapped_device
= NULL
;
198 #ifdef CONFIG_SSB_DRIVER_PCICORE
199 bus
->pcicore
.setup_done
= 0;
202 err
= ssb_bus_powerup(bus
, 0);
205 err
= ssb_pcmcia_hardware_setup(bus
);
207 ssb_bus_may_powerdown(bus
);
210 ssb_chipco_resume(&bus
->chipco
);
211 ssb_bus_may_powerdown(bus
);
215 EXPORT_SYMBOL(ssb_bus_resume
);
217 int ssb_bus_suspend(struct ssb_bus
*bus
)
219 ssb_chipco_suspend(&bus
->chipco
);
220 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
224 EXPORT_SYMBOL(ssb_bus_suspend
);
226 #ifdef CONFIG_SSB_SPROM
227 /** ssb_devices_freeze - Freeze all devices on the bus.
229 * After freezing no device driver will be handling a device
230 * on this bus anymore. ssb_devices_thaw() must be called after
231 * a successful freeze to reactivate the devices.
234 * @ctx: Context structure. Pass this to ssb_devices_thaw().
236 int ssb_devices_freeze(struct ssb_bus
*bus
, struct ssb_freeze_context
*ctx
)
238 struct ssb_device
*sdev
;
239 struct ssb_driver
*sdrv
;
242 memset(ctx
, 0, sizeof(*ctx
));
244 SSB_WARN_ON(bus
->nr_devices
> ARRAY_SIZE(ctx
->device_frozen
));
246 for (i
= 0; i
< bus
->nr_devices
; i
++) {
247 sdev
= ssb_device_get(&bus
->devices
[i
]);
249 if (!sdev
->dev
|| !sdev
->dev
->driver
||
250 !device_is_registered(sdev
->dev
)) {
251 ssb_device_put(sdev
);
254 sdrv
= ssb_driver_get(drv_to_ssb_drv(sdev
->dev
->driver
));
255 if (!sdrv
|| SSB_WARN_ON(!sdrv
->remove
)) {
256 ssb_device_put(sdev
);
260 ctx
->device_frozen
[i
] = 1;
266 /** ssb_devices_thaw - Unfreeze all devices on the bus.
268 * This will re-attach the device drivers and re-init the devices.
270 * @ctx: The context structure from ssb_devices_freeze()
272 int ssb_devices_thaw(struct ssb_freeze_context
*ctx
)
274 struct ssb_bus
*bus
= ctx
->bus
;
275 struct ssb_device
*sdev
;
276 struct ssb_driver
*sdrv
;
280 for (i
= 0; i
< bus
->nr_devices
; i
++) {
281 if (!ctx
->device_frozen
[i
])
283 sdev
= &bus
->devices
[i
];
285 if (SSB_WARN_ON(!sdev
->dev
|| !sdev
->dev
->driver
))
287 sdrv
= drv_to_ssb_drv(sdev
->dev
->driver
);
288 if (SSB_WARN_ON(!sdrv
|| !sdrv
->probe
))
291 err
= sdrv
->probe(sdev
, &sdev
->id
);
293 ssb_printk(KERN_ERR PFX
"Failed to thaw device %s\n",
294 dev_name(sdev
->dev
));
297 ssb_driver_put(sdrv
);
298 ssb_device_put(sdev
);
303 #endif /* CONFIG_SSB_SPROM */
305 static void ssb_device_shutdown(struct device
*dev
)
307 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
308 struct ssb_driver
*ssb_drv
;
312 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
313 if (ssb_drv
&& ssb_drv
->shutdown
)
314 ssb_drv
->shutdown(ssb_dev
);
317 static int ssb_device_remove(struct device
*dev
)
319 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
320 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
322 if (ssb_drv
&& ssb_drv
->remove
)
323 ssb_drv
->remove(ssb_dev
);
324 ssb_device_put(ssb_dev
);
329 static int ssb_device_probe(struct device
*dev
)
331 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
332 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
335 ssb_device_get(ssb_dev
);
336 if (ssb_drv
&& ssb_drv
->probe
)
337 err
= ssb_drv
->probe(ssb_dev
, &ssb_dev
->id
);
339 ssb_device_put(ssb_dev
);
344 static int ssb_match_devid(const struct ssb_device_id
*tabid
,
345 const struct ssb_device_id
*devid
)
347 if ((tabid
->vendor
!= devid
->vendor
) &&
348 tabid
->vendor
!= SSB_ANY_VENDOR
)
350 if ((tabid
->coreid
!= devid
->coreid
) &&
351 tabid
->coreid
!= SSB_ANY_ID
)
353 if ((tabid
->revision
!= devid
->revision
) &&
354 tabid
->revision
!= SSB_ANY_REV
)
359 static int ssb_bus_match(struct device
*dev
, struct device_driver
*drv
)
361 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
362 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(drv
);
363 const struct ssb_device_id
*id
;
365 for (id
= ssb_drv
->id_table
;
366 id
->vendor
|| id
->coreid
|| id
->revision
;
368 if (ssb_match_devid(id
, &ssb_dev
->id
))
369 return 1; /* found */
375 static int ssb_device_uevent(struct device
*dev
, struct kobj_uevent_env
*env
)
377 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
382 return add_uevent_var(env
,
383 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
384 ssb_dev
->id
.vendor
, ssb_dev
->id
.coreid
,
385 ssb_dev
->id
.revision
);
388 static struct bus_type ssb_bustype
= {
390 .match
= ssb_bus_match
,
391 .probe
= ssb_device_probe
,
392 .remove
= ssb_device_remove
,
393 .shutdown
= ssb_device_shutdown
,
394 .suspend
= ssb_device_suspend
,
395 .resume
= ssb_device_resume
,
396 .uevent
= ssb_device_uevent
,
399 static void ssb_buses_lock(void)
401 /* See the comment at the ssb_is_early_boot definition */
402 if (!ssb_is_early_boot
)
403 mutex_lock(&buses_mutex
);
406 static void ssb_buses_unlock(void)
408 /* See the comment at the ssb_is_early_boot definition */
409 if (!ssb_is_early_boot
)
410 mutex_unlock(&buses_mutex
);
413 static void ssb_devices_unregister(struct ssb_bus
*bus
)
415 struct ssb_device
*sdev
;
418 for (i
= bus
->nr_devices
- 1; i
>= 0; i
--) {
419 sdev
= &(bus
->devices
[i
]);
421 device_unregister(sdev
->dev
);
425 void ssb_bus_unregister(struct ssb_bus
*bus
)
428 ssb_devices_unregister(bus
);
429 list_del(&bus
->list
);
432 ssb_pcmcia_exit(bus
);
436 EXPORT_SYMBOL(ssb_bus_unregister
);
438 static void ssb_release_dev(struct device
*dev
)
440 struct __ssb_dev_wrapper
*devwrap
;
442 devwrap
= container_of(dev
, struct __ssb_dev_wrapper
, dev
);
446 static int ssb_devices_register(struct ssb_bus
*bus
)
448 struct ssb_device
*sdev
;
450 struct __ssb_dev_wrapper
*devwrap
;
454 for (i
= 0; i
< bus
->nr_devices
; i
++) {
455 sdev
= &(bus
->devices
[i
]);
457 /* We don't register SSB-system devices to the kernel,
458 * as the drivers for them are built into SSB. */
459 switch (sdev
->id
.coreid
) {
460 case SSB_DEV_CHIPCOMMON
:
465 case SSB_DEV_MIPS_3302
:
470 devwrap
= kzalloc(sizeof(*devwrap
), GFP_KERNEL
);
472 ssb_printk(KERN_ERR PFX
473 "Could not allocate device\n");
478 devwrap
->sdev
= sdev
;
480 dev
->release
= ssb_release_dev
;
481 dev
->bus
= &ssb_bustype
;
482 dev_set_name(dev
, "ssb%u:%d", bus
->busnumber
, dev_idx
);
484 switch (bus
->bustype
) {
485 case SSB_BUSTYPE_PCI
:
486 #ifdef CONFIG_SSB_PCIHOST
487 sdev
->irq
= bus
->host_pci
->irq
;
488 dev
->parent
= &bus
->host_pci
->dev
;
491 case SSB_BUSTYPE_PCMCIA
:
492 #ifdef CONFIG_SSB_PCMCIAHOST
493 sdev
->irq
= bus
->host_pcmcia
->irq
.AssignedIRQ
;
494 dev
->parent
= &bus
->host_pcmcia
->dev
;
497 case SSB_BUSTYPE_SDIO
:
498 #ifdef CONFIG_SSB_SDIOHOST
499 dev
->parent
= &bus
->host_sdio
->dev
;
502 case SSB_BUSTYPE_SSB
:
503 dev
->dma_mask
= &dev
->coherent_dma_mask
;
508 err
= device_register(dev
);
510 ssb_printk(KERN_ERR PFX
511 "Could not register %s\n",
513 /* Set dev to NULL to not unregister
514 * dev on error unwinding. */
524 /* Unwind the already registered devices. */
525 ssb_devices_unregister(bus
);
529 /* Needs ssb_buses_lock() */
530 static int ssb_attach_queued_buses(void)
532 struct ssb_bus
*bus
, *n
;
534 int drop_them_all
= 0;
536 list_for_each_entry_safe(bus
, n
, &attach_queue
, list
) {
538 list_del(&bus
->list
);
541 /* Can't init the PCIcore in ssb_bus_register(), as that
542 * is too early in boot for embedded systems
543 * (no udelay() available). So do it here in attach stage.
545 err
= ssb_bus_powerup(bus
, 0);
548 ssb_pcicore_init(&bus
->pcicore
);
549 ssb_bus_may_powerdown(bus
);
551 err
= ssb_devices_register(bus
);
555 list_del(&bus
->list
);
558 list_move_tail(&bus
->list
, &buses
);
564 static u8
ssb_ssb_read8(struct ssb_device
*dev
, u16 offset
)
566 struct ssb_bus
*bus
= dev
->bus
;
568 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
569 return readb(bus
->mmio
+ offset
);
572 static u16
ssb_ssb_read16(struct ssb_device
*dev
, u16 offset
)
574 struct ssb_bus
*bus
= dev
->bus
;
576 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
577 return readw(bus
->mmio
+ offset
);
580 static u32
ssb_ssb_read32(struct ssb_device
*dev
, u16 offset
)
582 struct ssb_bus
*bus
= dev
->bus
;
584 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
585 return readl(bus
->mmio
+ offset
);
588 #ifdef CONFIG_SSB_BLOCKIO
589 static void ssb_ssb_block_read(struct ssb_device
*dev
, void *buffer
,
590 size_t count
, u16 offset
, u8 reg_width
)
592 struct ssb_bus
*bus
= dev
->bus
;
595 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
596 addr
= bus
->mmio
+ offset
;
603 *buf
= __raw_readb(addr
);
610 __le16
*buf
= buffer
;
612 SSB_WARN_ON(count
& 1);
614 *buf
= (__force __le16
)__raw_readw(addr
);
621 __le32
*buf
= buffer
;
623 SSB_WARN_ON(count
& 3);
625 *buf
= (__force __le32
)__raw_readl(addr
);
635 #endif /* CONFIG_SSB_BLOCKIO */
637 static void ssb_ssb_write8(struct ssb_device
*dev
, u16 offset
, u8 value
)
639 struct ssb_bus
*bus
= dev
->bus
;
641 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
642 writeb(value
, bus
->mmio
+ offset
);
645 static void ssb_ssb_write16(struct ssb_device
*dev
, u16 offset
, u16 value
)
647 struct ssb_bus
*bus
= dev
->bus
;
649 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
650 writew(value
, bus
->mmio
+ offset
);
653 static void ssb_ssb_write32(struct ssb_device
*dev
, u16 offset
, u32 value
)
655 struct ssb_bus
*bus
= dev
->bus
;
657 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
658 writel(value
, bus
->mmio
+ offset
);
661 #ifdef CONFIG_SSB_BLOCKIO
662 static void ssb_ssb_block_write(struct ssb_device
*dev
, const void *buffer
,
663 size_t count
, u16 offset
, u8 reg_width
)
665 struct ssb_bus
*bus
= dev
->bus
;
668 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
669 addr
= bus
->mmio
+ offset
;
673 const u8
*buf
= buffer
;
676 __raw_writeb(*buf
, addr
);
683 const __le16
*buf
= buffer
;
685 SSB_WARN_ON(count
& 1);
687 __raw_writew((__force u16
)(*buf
), addr
);
694 const __le32
*buf
= buffer
;
696 SSB_WARN_ON(count
& 3);
698 __raw_writel((__force u32
)(*buf
), addr
);
708 #endif /* CONFIG_SSB_BLOCKIO */
710 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
711 static const struct ssb_bus_ops ssb_ssb_ops
= {
712 .read8
= ssb_ssb_read8
,
713 .read16
= ssb_ssb_read16
,
714 .read32
= ssb_ssb_read32
,
715 .write8
= ssb_ssb_write8
,
716 .write16
= ssb_ssb_write16
,
717 .write32
= ssb_ssb_write32
,
718 #ifdef CONFIG_SSB_BLOCKIO
719 .block_read
= ssb_ssb_block_read
,
720 .block_write
= ssb_ssb_block_write
,
724 static int ssb_fetch_invariants(struct ssb_bus
*bus
,
725 ssb_invariants_func_t get_invariants
)
727 struct ssb_init_invariants iv
;
730 memset(&iv
, 0, sizeof(iv
));
731 err
= get_invariants(bus
, &iv
);
734 memcpy(&bus
->boardinfo
, &iv
.boardinfo
, sizeof(iv
.boardinfo
));
735 memcpy(&bus
->sprom
, &iv
.sprom
, sizeof(iv
.sprom
));
736 bus
->has_cardbus_slot
= iv
.has_cardbus_slot
;
741 static int ssb_bus_register(struct ssb_bus
*bus
,
742 ssb_invariants_func_t get_invariants
,
743 unsigned long baseaddr
)
747 spin_lock_init(&bus
->bar_lock
);
748 INIT_LIST_HEAD(&bus
->list
);
749 #ifdef CONFIG_SSB_EMBEDDED
750 spin_lock_init(&bus
->gpio_lock
);
753 /* Powerup the bus */
754 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
758 /* Init SDIO-host device (if any), before the scan */
759 err
= ssb_sdio_init(bus
);
761 goto err_disable_xtal
;
764 bus
->busnumber
= next_busnumber
;
765 /* Scan for devices (cores) */
766 err
= ssb_bus_scan(bus
, baseaddr
);
770 /* Init PCI-host device (if any) */
771 err
= ssb_pci_init(bus
);
774 /* Init PCMCIA-host device (if any) */
775 err
= ssb_pcmcia_init(bus
);
779 /* Initialize basic system devices (if available) */
780 err
= ssb_bus_powerup(bus
, 0);
782 goto err_pcmcia_exit
;
783 ssb_chipcommon_init(&bus
->chipco
);
784 ssb_mipscore_init(&bus
->mipscore
);
785 err
= ssb_fetch_invariants(bus
, get_invariants
);
787 ssb_bus_may_powerdown(bus
);
788 goto err_pcmcia_exit
;
790 ssb_bus_may_powerdown(bus
);
792 /* Queue it for attach.
793 * See the comment at the ssb_is_early_boot definition. */
794 list_add_tail(&bus
->list
, &attach_queue
);
795 if (!ssb_is_early_boot
) {
796 /* This is not early boot, so we must attach the bus now */
797 err
= ssb_attach_queued_buses();
808 list_del(&bus
->list
);
810 ssb_pcmcia_exit(bus
);
819 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
823 #ifdef CONFIG_SSB_PCIHOST
824 int ssb_bus_pcibus_register(struct ssb_bus
*bus
,
825 struct pci_dev
*host_pci
)
829 bus
->bustype
= SSB_BUSTYPE_PCI
;
830 bus
->host_pci
= host_pci
;
831 bus
->ops
= &ssb_pci_ops
;
833 err
= ssb_bus_register(bus
, ssb_pci_get_invariants
, 0);
835 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
836 "PCI device %s\n", dev_name(&host_pci
->dev
));
841 EXPORT_SYMBOL(ssb_bus_pcibus_register
);
842 #endif /* CONFIG_SSB_PCIHOST */
844 #ifdef CONFIG_SSB_PCMCIAHOST
845 int ssb_bus_pcmciabus_register(struct ssb_bus
*bus
,
846 struct pcmcia_device
*pcmcia_dev
,
847 unsigned long baseaddr
)
851 bus
->bustype
= SSB_BUSTYPE_PCMCIA
;
852 bus
->host_pcmcia
= pcmcia_dev
;
853 bus
->ops
= &ssb_pcmcia_ops
;
855 err
= ssb_bus_register(bus
, ssb_pcmcia_get_invariants
, baseaddr
);
857 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
858 "PCMCIA device %s\n", pcmcia_dev
->devname
);
863 EXPORT_SYMBOL(ssb_bus_pcmciabus_register
);
864 #endif /* CONFIG_SSB_PCMCIAHOST */
866 #ifdef CONFIG_SSB_SDIOHOST
867 int ssb_bus_sdiobus_register(struct ssb_bus
*bus
, struct sdio_func
*func
,
872 bus
->bustype
= SSB_BUSTYPE_SDIO
;
873 bus
->host_sdio
= func
;
874 bus
->ops
= &ssb_sdio_ops
;
875 bus
->quirks
= quirks
;
877 err
= ssb_bus_register(bus
, ssb_sdio_get_invariants
, ~0);
879 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
880 "SDIO device %s\n", sdio_func_id(func
));
885 EXPORT_SYMBOL(ssb_bus_sdiobus_register
);
886 #endif /* CONFIG_SSB_PCMCIAHOST */
888 int ssb_bus_ssbbus_register(struct ssb_bus
*bus
,
889 unsigned long baseaddr
,
890 ssb_invariants_func_t get_invariants
)
894 bus
->bustype
= SSB_BUSTYPE_SSB
;
895 bus
->ops
= &ssb_ssb_ops
;
897 err
= ssb_bus_register(bus
, get_invariants
, baseaddr
);
899 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found at "
900 "address 0x%08lX\n", baseaddr
);
906 int __ssb_driver_register(struct ssb_driver
*drv
, struct module
*owner
)
908 drv
->drv
.name
= drv
->name
;
909 drv
->drv
.bus
= &ssb_bustype
;
910 drv
->drv
.owner
= owner
;
912 return driver_register(&drv
->drv
);
914 EXPORT_SYMBOL(__ssb_driver_register
);
916 void ssb_driver_unregister(struct ssb_driver
*drv
)
918 driver_unregister(&drv
->drv
);
920 EXPORT_SYMBOL(ssb_driver_unregister
);
922 void ssb_set_devtypedata(struct ssb_device
*dev
, void *data
)
924 struct ssb_bus
*bus
= dev
->bus
;
925 struct ssb_device
*ent
;
928 for (i
= 0; i
< bus
->nr_devices
; i
++) {
929 ent
= &(bus
->devices
[i
]);
930 if (ent
->id
.vendor
!= dev
->id
.vendor
)
932 if (ent
->id
.coreid
!= dev
->id
.coreid
)
935 ent
->devtypedata
= data
;
938 EXPORT_SYMBOL(ssb_set_devtypedata
);
940 static u32
clkfactor_f6_resolve(u32 v
)
942 /* map the magic values */
944 case SSB_CHIPCO_CLK_F6_2
:
946 case SSB_CHIPCO_CLK_F6_3
:
948 case SSB_CHIPCO_CLK_F6_4
:
950 case SSB_CHIPCO_CLK_F6_5
:
952 case SSB_CHIPCO_CLK_F6_6
:
954 case SSB_CHIPCO_CLK_F6_7
:
960 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
961 u32
ssb_calc_clock_rate(u32 plltype
, u32 n
, u32 m
)
963 u32 n1
, n2
, clock
, m1
, m2
, m3
, mc
;
965 n1
= (n
& SSB_CHIPCO_CLK_N1
);
966 n2
= ((n
& SSB_CHIPCO_CLK_N2
) >> SSB_CHIPCO_CLK_N2_SHIFT
);
969 case SSB_PLLTYPE_6
: /* 100/200 or 120/240 only */
970 if (m
& SSB_CHIPCO_CLK_T6_MMASK
)
971 return SSB_CHIPCO_CLK_T6_M0
;
972 return SSB_CHIPCO_CLK_T6_M1
;
973 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
974 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
975 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
976 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
977 n1
= clkfactor_f6_resolve(n1
);
978 n2
+= SSB_CHIPCO_CLK_F5_BIAS
;
980 case SSB_PLLTYPE_2
: /* 48Mhz, 4 dividers */
981 n1
+= SSB_CHIPCO_CLK_T2_BIAS
;
982 n2
+= SSB_CHIPCO_CLK_T2_BIAS
;
983 SSB_WARN_ON(!((n1
>= 2) && (n1
<= 7)));
984 SSB_WARN_ON(!((n2
>= 5) && (n2
<= 23)));
986 case SSB_PLLTYPE_5
: /* 25Mhz, 4 dividers */
993 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
994 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
995 clock
= SSB_CHIPCO_CLK_BASE2
* n1
* n2
;
998 clock
= SSB_CHIPCO_CLK_BASE1
* n1
* n2
;
1003 m1
= (m
& SSB_CHIPCO_CLK_M1
);
1004 m2
= ((m
& SSB_CHIPCO_CLK_M2
) >> SSB_CHIPCO_CLK_M2_SHIFT
);
1005 m3
= ((m
& SSB_CHIPCO_CLK_M3
) >> SSB_CHIPCO_CLK_M3_SHIFT
);
1006 mc
= ((m
& SSB_CHIPCO_CLK_MC
) >> SSB_CHIPCO_CLK_MC_SHIFT
);
1009 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
1010 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
1011 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
1012 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
1013 m1
= clkfactor_f6_resolve(m1
);
1014 if ((plltype
== SSB_PLLTYPE_1
) ||
1015 (plltype
== SSB_PLLTYPE_3
))
1016 m2
+= SSB_CHIPCO_CLK_F5_BIAS
;
1018 m2
= clkfactor_f6_resolve(m2
);
1019 m3
= clkfactor_f6_resolve(m3
);
1022 case SSB_CHIPCO_CLK_MC_BYPASS
:
1024 case SSB_CHIPCO_CLK_MC_M1
:
1025 return (clock
/ m1
);
1026 case SSB_CHIPCO_CLK_MC_M1M2
:
1027 return (clock
/ (m1
* m2
));
1028 case SSB_CHIPCO_CLK_MC_M1M2M3
:
1029 return (clock
/ (m1
* m2
* m3
));
1030 case SSB_CHIPCO_CLK_MC_M1M3
:
1031 return (clock
/ (m1
* m3
));
1035 m1
+= SSB_CHIPCO_CLK_T2_BIAS
;
1036 m2
+= SSB_CHIPCO_CLK_T2M2_BIAS
;
1037 m3
+= SSB_CHIPCO_CLK_T2_BIAS
;
1038 SSB_WARN_ON(!((m1
>= 2) && (m1
<= 7)));
1039 SSB_WARN_ON(!((m2
>= 3) && (m2
<= 10)));
1040 SSB_WARN_ON(!((m3
>= 2) && (m3
<= 7)));
1042 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M1BYP
))
1044 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M2BYP
))
1046 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M3BYP
))
1055 /* Get the current speed the backplane is running at */
1056 u32
ssb_clockspeed(struct ssb_bus
*bus
)
1060 u32 clkctl_n
, clkctl_m
;
1062 if (ssb_extif_available(&bus
->extif
))
1063 ssb_extif_get_clockcontrol(&bus
->extif
, &plltype
,
1064 &clkctl_n
, &clkctl_m
);
1065 else if (bus
->chipco
.dev
)
1066 ssb_chipco_get_clockcontrol(&bus
->chipco
, &plltype
,
1067 &clkctl_n
, &clkctl_m
);
1071 if (bus
->chip_id
== 0x5365) {
1074 rate
= ssb_calc_clock_rate(plltype
, clkctl_n
, clkctl_m
);
1075 if (plltype
== SSB_PLLTYPE_3
) /* 25Mhz, 2 dividers */
1081 EXPORT_SYMBOL(ssb_clockspeed
);
1083 static u32
ssb_tmslow_reject_bitmask(struct ssb_device
*dev
)
1085 u32 rev
= ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_SSBREV
;
1087 /* The REJECT bit changed position in TMSLOW between
1088 * Backplane revisions. */
1090 case SSB_IDLOW_SSBREV_22
:
1091 return SSB_TMSLOW_REJECT_22
;
1092 case SSB_IDLOW_SSBREV_23
:
1093 return SSB_TMSLOW_REJECT_23
;
1094 case SSB_IDLOW_SSBREV_24
: /* TODO - find the proper REJECT bits */
1095 case SSB_IDLOW_SSBREV_25
: /* same here */
1096 case SSB_IDLOW_SSBREV_26
: /* same here */
1097 case SSB_IDLOW_SSBREV_27
: /* same here */
1098 return SSB_TMSLOW_REJECT_23
; /* this is a guess */
1100 printk(KERN_INFO
"ssb: Backplane Revision 0x%.8X\n", rev
);
1103 return (SSB_TMSLOW_REJECT_22
| SSB_TMSLOW_REJECT_23
);
1106 int ssb_device_is_enabled(struct ssb_device
*dev
)
1111 reject
= ssb_tmslow_reject_bitmask(dev
);
1112 val
= ssb_read32(dev
, SSB_TMSLOW
);
1113 val
&= SSB_TMSLOW_CLOCK
| SSB_TMSLOW_RESET
| reject
;
1115 return (val
== SSB_TMSLOW_CLOCK
);
1117 EXPORT_SYMBOL(ssb_device_is_enabled
);
1119 static void ssb_flush_tmslow(struct ssb_device
*dev
)
1121 /* Make _really_ sure the device has finished the TMSLOW
1122 * register write transaction, as we risk running into
1123 * a machine check exception otherwise.
1124 * Do this by reading the register back to commit the
1125 * PCI write and delay an additional usec for the device
1126 * to react to the change. */
1127 ssb_read32(dev
, SSB_TMSLOW
);
1131 void ssb_device_enable(struct ssb_device
*dev
, u32 core_specific_flags
)
1135 ssb_device_disable(dev
, core_specific_flags
);
1136 ssb_write32(dev
, SSB_TMSLOW
,
1137 SSB_TMSLOW_RESET
| SSB_TMSLOW_CLOCK
|
1138 SSB_TMSLOW_FGC
| core_specific_flags
);
1139 ssb_flush_tmslow(dev
);
1141 /* Clear SERR if set. This is a hw bug workaround. */
1142 if (ssb_read32(dev
, SSB_TMSHIGH
) & SSB_TMSHIGH_SERR
)
1143 ssb_write32(dev
, SSB_TMSHIGH
, 0);
1145 val
= ssb_read32(dev
, SSB_IMSTATE
);
1146 if (val
& (SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
)) {
1147 val
&= ~(SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
);
1148 ssb_write32(dev
, SSB_IMSTATE
, val
);
1151 ssb_write32(dev
, SSB_TMSLOW
,
1152 SSB_TMSLOW_CLOCK
| SSB_TMSLOW_FGC
|
1153 core_specific_flags
);
1154 ssb_flush_tmslow(dev
);
1156 ssb_write32(dev
, SSB_TMSLOW
, SSB_TMSLOW_CLOCK
|
1157 core_specific_flags
);
1158 ssb_flush_tmslow(dev
);
1160 EXPORT_SYMBOL(ssb_device_enable
);
1162 /* Wait for a bit in a register to get set or unset.
1163 * timeout is in units of ten-microseconds */
1164 static int ssb_wait_bit(struct ssb_device
*dev
, u16 reg
, u32 bitmask
,
1165 int timeout
, int set
)
1170 for (i
= 0; i
< timeout
; i
++) {
1171 val
= ssb_read32(dev
, reg
);
1176 if (!(val
& bitmask
))
1181 printk(KERN_ERR PFX
"Timeout waiting for bitmask %08X on "
1182 "register %04X to %s.\n",
1183 bitmask
, reg
, (set
? "set" : "clear"));
1188 void ssb_device_disable(struct ssb_device
*dev
, u32 core_specific_flags
)
1192 if (ssb_read32(dev
, SSB_TMSLOW
) & SSB_TMSLOW_RESET
)
1195 reject
= ssb_tmslow_reject_bitmask(dev
);
1196 ssb_write32(dev
, SSB_TMSLOW
, reject
| SSB_TMSLOW_CLOCK
);
1197 ssb_wait_bit(dev
, SSB_TMSLOW
, reject
, 1000, 1);
1198 ssb_wait_bit(dev
, SSB_TMSHIGH
, SSB_TMSHIGH_BUSY
, 1000, 0);
1199 ssb_write32(dev
, SSB_TMSLOW
,
1200 SSB_TMSLOW_FGC
| SSB_TMSLOW_CLOCK
|
1201 reject
| SSB_TMSLOW_RESET
|
1202 core_specific_flags
);
1203 ssb_flush_tmslow(dev
);
1205 ssb_write32(dev
, SSB_TMSLOW
,
1206 reject
| SSB_TMSLOW_RESET
|
1207 core_specific_flags
);
1208 ssb_flush_tmslow(dev
);
1210 EXPORT_SYMBOL(ssb_device_disable
);
1212 u32
ssb_dma_translation(struct ssb_device
*dev
)
1214 switch (dev
->bus
->bustype
) {
1215 case SSB_BUSTYPE_SSB
:
1217 case SSB_BUSTYPE_PCI
:
1220 __ssb_dma_not_implemented(dev
);
1224 EXPORT_SYMBOL(ssb_dma_translation
);
1226 int ssb_dma_set_mask(struct ssb_device
*dev
, u64 mask
)
1228 #ifdef CONFIG_SSB_PCIHOST
1232 switch (dev
->bus
->bustype
) {
1233 case SSB_BUSTYPE_PCI
:
1234 #ifdef CONFIG_SSB_PCIHOST
1235 err
= pci_set_dma_mask(dev
->bus
->host_pci
, mask
);
1238 err
= pci_set_consistent_dma_mask(dev
->bus
->host_pci
, mask
);
1241 case SSB_BUSTYPE_SSB
:
1242 return dma_set_mask(dev
->dev
, mask
);
1244 __ssb_dma_not_implemented(dev
);
1248 EXPORT_SYMBOL(ssb_dma_set_mask
);
1250 void * ssb_dma_alloc_consistent(struct ssb_device
*dev
, size_t size
,
1251 dma_addr_t
*dma_handle
, gfp_t gfp_flags
)
1253 switch (dev
->bus
->bustype
) {
1254 case SSB_BUSTYPE_PCI
:
1255 #ifdef CONFIG_SSB_PCIHOST
1256 if (gfp_flags
& GFP_DMA
) {
1257 /* Workaround: The PCI API does not support passing
1259 return dma_alloc_coherent(&dev
->bus
->host_pci
->dev
,
1260 size
, dma_handle
, gfp_flags
);
1262 return pci_alloc_consistent(dev
->bus
->host_pci
, size
, dma_handle
);
1264 case SSB_BUSTYPE_SSB
:
1265 return dma_alloc_coherent(dev
->dev
, size
, dma_handle
, gfp_flags
);
1267 __ssb_dma_not_implemented(dev
);
1271 EXPORT_SYMBOL(ssb_dma_alloc_consistent
);
1273 void ssb_dma_free_consistent(struct ssb_device
*dev
, size_t size
,
1274 void *vaddr
, dma_addr_t dma_handle
,
1277 switch (dev
->bus
->bustype
) {
1278 case SSB_BUSTYPE_PCI
:
1279 #ifdef CONFIG_SSB_PCIHOST
1280 if (gfp_flags
& GFP_DMA
) {
1281 /* Workaround: The PCI API does not support passing
1283 dma_free_coherent(&dev
->bus
->host_pci
->dev
,
1284 size
, vaddr
, dma_handle
);
1287 pci_free_consistent(dev
->bus
->host_pci
, size
,
1291 case SSB_BUSTYPE_SSB
:
1292 dma_free_coherent(dev
->dev
, size
, vaddr
, dma_handle
);
1295 __ssb_dma_not_implemented(dev
);
1298 EXPORT_SYMBOL(ssb_dma_free_consistent
);
1300 int ssb_bus_may_powerdown(struct ssb_bus
*bus
)
1302 struct ssb_chipcommon
*cc
;
1305 /* On buses where more than one core may be working
1306 * at a time, we must not powerdown stuff if there are
1307 * still cores that may want to run. */
1308 if (bus
->bustype
== SSB_BUSTYPE_SSB
)
1315 if (cc
->dev
->id
.revision
< 5)
1318 ssb_chipco_set_clockmode(cc
, SSB_CLKMODE_SLOW
);
1319 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
1323 #ifdef CONFIG_SSB_DEBUG
1324 bus
->powered_up
= 0;
1328 ssb_printk(KERN_ERR PFX
"Bus powerdown failed\n");
1331 EXPORT_SYMBOL(ssb_bus_may_powerdown
);
1333 int ssb_bus_powerup(struct ssb_bus
*bus
, bool dynamic_pctl
)
1335 struct ssb_chipcommon
*cc
;
1337 enum ssb_clkmode mode
;
1339 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
1343 mode
= dynamic_pctl
? SSB_CLKMODE_DYNAMIC
: SSB_CLKMODE_FAST
;
1344 ssb_chipco_set_clockmode(cc
, mode
);
1346 #ifdef CONFIG_SSB_DEBUG
1347 bus
->powered_up
= 1;
1351 ssb_printk(KERN_ERR PFX
"Bus powerup failed\n");
1354 EXPORT_SYMBOL(ssb_bus_powerup
);
1356 u32
ssb_admatch_base(u32 adm
)
1360 switch (adm
& SSB_ADM_TYPE
) {
1362 base
= (adm
& SSB_ADM_BASE0
);
1365 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1366 base
= (adm
& SSB_ADM_BASE1
);
1369 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1370 base
= (adm
& SSB_ADM_BASE2
);
1378 EXPORT_SYMBOL(ssb_admatch_base
);
1380 u32
ssb_admatch_size(u32 adm
)
1384 switch (adm
& SSB_ADM_TYPE
) {
1386 size
= ((adm
& SSB_ADM_SZ0
) >> SSB_ADM_SZ0_SHIFT
);
1389 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1390 size
= ((adm
& SSB_ADM_SZ1
) >> SSB_ADM_SZ1_SHIFT
);
1393 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1394 size
= ((adm
& SSB_ADM_SZ2
) >> SSB_ADM_SZ2_SHIFT
);
1399 size
= (1 << (size
+ 1));
1403 EXPORT_SYMBOL(ssb_admatch_size
);
1405 static int __init
ssb_modinit(void)
1409 /* See the comment at the ssb_is_early_boot definition */
1410 ssb_is_early_boot
= 0;
1411 err
= bus_register(&ssb_bustype
);
1415 /* Maybe we already registered some buses at early boot.
1416 * Check for this and attach them
1419 err
= ssb_attach_queued_buses();
1422 bus_unregister(&ssb_bustype
);
1426 err
= b43_pci_ssb_bridge_init();
1428 ssb_printk(KERN_ERR
"Broadcom 43xx PCI-SSB-bridge "
1429 "initialization failed\n");
1430 /* don't fail SSB init because of this */
1433 err
= ssb_gige_init();
1435 ssb_printk(KERN_ERR
"SSB Broadcom Gigabit Ethernet "
1436 "driver initialization failed\n");
1437 /* don't fail SSB init because of this */
1443 /* ssb must be initialized after PCI but before the ssb drivers.
1444 * That means we must use some initcall between subsys_initcall
1445 * and device_initcall. */
1446 fs_initcall(ssb_modinit
);
1448 static void __exit
ssb_modexit(void)
1451 b43_pci_ssb_bridge_exit();
1452 bus_unregister(&ssb_bustype
);
1454 module_exit(ssb_modexit
)