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V4L/DVB: media/IR/imon: testing the wrong variable
[wandboard.git] / drivers / gpu / drm / drm_edid.c
blob18f41d7061f0d04f7ff9e1b465ea6565aa520cbe
1 /*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
7 * FB layer.
8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sub license,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial portions
19 * of the Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
28 */
29 #include <linux/kernel.h>
30 #include <linux/slab.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c-algo-bit.h>
33 #include "drmP.h"
34 #include "drm_edid.h"
35
36 /*
37 * TODO:
38 * - support EDID 1.4 (incl. CE blocks)
39 */
40
41 /*
42 * EDID blocks out in the wild have a variety of bugs, try to collect
43 * them here (note that userspace may work around broken monitors first,
44 * but fixes should make their way here so that the kernel "just works"
45 * on as many displays as possible).
46 */
47
48 /* First detailed mode wrong, use largest 60Hz mode */
49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
50 /* Reported 135MHz pixel clock is too high, needs adjustment */
51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
52 /* Prefer the largest mode at 75 Hz */
53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
54 /* Detail timing is in cm not mm */
55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
56 /* Detailed timing descriptors have bogus size values, so just take the
57 * maximum size and use that.
58 */
59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
60 /* Monitor forgot to set the first detailed is preferred bit. */
61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
62 /* use +hsync +vsync for detailed mode */
63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
64
65
66 #define LEVEL_DMT 0
67 #define LEVEL_GTF 1
68 #define LEVEL_CVT 2
69
70 static struct edid_quirk {
71 char *vendor;
72 int product_id;
73 u32 quirks;
74 } edid_quirk_list[] = {
75 /* Acer AL1706 */
76 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77 /* Acer F51 */
78 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79 /* Unknown Acer */
80 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81
82 /* Belinea 10 15 55 */
83 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
84 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85
86 /* Envision Peripherals, Inc. EN-7100e */
87 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88 /* Envision EN2028 */
89 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
90
91 /* Funai Electronics PM36B */
92 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
93 EDID_QUIRK_DETAILED_IN_CM },
94
95 /* LG Philips LCD LP154W01-A5 */
96 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
97 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
98
99 /* Philips 107p5 CRT */
100 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
101
102 /* Proview AY765C */
103 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104
105 /* Samsung SyncMaster 205BW. Note: irony */
106 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
107 /* Samsung SyncMaster 22[5-6]BW */
108 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
109 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
110 };
111
112
113 /* Valid EDID header has these bytes */
114 static const u8 edid_header[] = {
115 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
116 };
117
118 /**
119 * drm_edid_is_valid - sanity check EDID data
120 * @edid: EDID data
121 *
122 * Sanity check the EDID block by looking at the header, the version number
123 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
124 * valid.
125 */
126 bool drm_edid_is_valid(struct edid *edid)
127 {
128 int i, score = 0;
129 u8 csum = 0;
130 u8 *raw_edid = (u8 *)edid;
131
132 for (i = 0; i < sizeof(edid_header); i++)
133 if (raw_edid[i] == edid_header[i])
134 score++;
135
136 if (score == 8) ;
137 else if (score >= 6) {
138 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
139 memcpy(raw_edid, edid_header, sizeof(edid_header));
140 } else
141 goto bad;
142
143 for (i = 0; i < EDID_LENGTH; i++)
144 csum += raw_edid[i];
145 if (csum) {
146 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
147 goto bad;
148 }
149
150 if (edid->version != 1) {
151 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
152 goto bad;
153 }
154
155 if (edid->revision > 4)
156 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
157
158 return 1;
159
160 bad:
161 if (raw_edid) {
162 DRM_ERROR("Raw EDID:\n");
163 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
164 printk("\n");
165 }
166 return 0;
167 }
168 EXPORT_SYMBOL(drm_edid_is_valid);
169
170 /**
171 * edid_vendor - match a string against EDID's obfuscated vendor field
172 * @edid: EDID to match
173 * @vendor: vendor string
174 *
175 * Returns true if @vendor is in @edid, false otherwise
176 */
177 static bool edid_vendor(struct edid *edid, char *vendor)
178 {
179 char edid_vendor[3];
180
181 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
182 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
183 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
184 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
185
186 return !strncmp(edid_vendor, vendor, 3);
187 }
188
189 /**
190 * edid_get_quirks - return quirk flags for a given EDID
191 * @edid: EDID to process
192 *
193 * This tells subsequent routines what fixes they need to apply.
194 */
195 static u32 edid_get_quirks(struct edid *edid)
196 {
197 struct edid_quirk *quirk;
198 int i;
199
200 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
201 quirk = &edid_quirk_list[i];
202
203 if (edid_vendor(edid, quirk->vendor) &&
204 (EDID_PRODUCT_ID(edid) == quirk->product_id))
205 return quirk->quirks;
206 }
207
208 return 0;
209 }
210
211 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
212 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
213
214
215 /**
216 * edid_fixup_preferred - set preferred modes based on quirk list
217 * @connector: has mode list to fix up
218 * @quirks: quirks list
219 *
220 * Walk the mode list for @connector, clearing the preferred status
221 * on existing modes and setting it anew for the right mode ala @quirks.
222 */
223 static void edid_fixup_preferred(struct drm_connector *connector,
224 u32 quirks)
225 {
226 struct drm_display_mode *t, *cur_mode, *preferred_mode;
227 int target_refresh = 0;
228
229 if (list_empty(&connector->probed_modes))
230 return;
231
232 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
233 target_refresh = 60;
234 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
235 target_refresh = 75;
236
237 preferred_mode = list_first_entry(&connector->probed_modes,
238 struct drm_display_mode, head);
239
240 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
241 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
242
243 if (cur_mode == preferred_mode)
244 continue;
245
246 /* Largest mode is preferred */
247 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
248 preferred_mode = cur_mode;
249
250 /* At a given size, try to get closest to target refresh */
251 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
252 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
253 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
254 preferred_mode = cur_mode;
255 }
256 }
257
258 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
259 }
260
261 /*
262 * Add the Autogenerated from the DMT spec.
263 * This table is copied from xfree86/modes/xf86EdidModes.c.
264 * But the mode with Reduced blank feature is deleted.
265 */
266 static struct drm_display_mode drm_dmt_modes[] = {
267 /* 640x350@85Hz */
268 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
269 736, 832, 0, 350, 382, 385, 445, 0,
270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
271 /* 640x400@85Hz */
272 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
273 736, 832, 0, 400, 401, 404, 445, 0,
274 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275 /* 720x400@85Hz */
276 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
277 828, 936, 0, 400, 401, 404, 446, 0,
278 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 /* 640x480@60Hz */
280 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
281 752, 800, 0, 480, 489, 492, 525, 0,
282 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
283 /* 640x480@72Hz */
284 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
285 704, 832, 0, 480, 489, 492, 520, 0,
286 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
287 /* 640x480@75Hz */
288 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
289 720, 840, 0, 480, 481, 484, 500, 0,
290 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
291 /* 640x480@85Hz */
292 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
293 752, 832, 0, 480, 481, 484, 509, 0,
294 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
295 /* 800x600@56Hz */
296 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
297 896, 1024, 0, 600, 601, 603, 625, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
299 /* 800x600@60Hz */
300 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
301 968, 1056, 0, 600, 601, 605, 628, 0,
302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
303 /* 800x600@72Hz */
304 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
305 976, 1040, 0, 600, 637, 643, 666, 0,
306 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
307 /* 800x600@75Hz */
308 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
309 896, 1056, 0, 600, 601, 604, 625, 0,
310 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
311 /* 800x600@85Hz */
312 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
313 896, 1048, 0, 600, 601, 604, 631, 0,
314 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 /* 848x480@60Hz */
316 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
317 976, 1088, 0, 480, 486, 494, 517, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
319 /* 1024x768@43Hz, interlace */
320 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
321 1208, 1264, 0, 768, 768, 772, 817, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
323 DRM_MODE_FLAG_INTERLACE) },
324 /* 1024x768@60Hz */
325 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
326 1184, 1344, 0, 768, 771, 777, 806, 0,
327 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
328 /* 1024x768@70Hz */
329 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
330 1184, 1328, 0, 768, 771, 777, 806, 0,
331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
332 /* 1024x768@75Hz */
333 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
334 1136, 1312, 0, 768, 769, 772, 800, 0,
335 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
336 /* 1024x768@85Hz */
337 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
338 1072, 1376, 0, 768, 769, 772, 808, 0,
339 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
340 /* 1152x864@75Hz */
341 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
342 1344, 1600, 0, 864, 865, 868, 900, 0,
343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
344 /* 1280x768@60Hz */
345 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
346 1472, 1664, 0, 768, 771, 778, 798, 0,
347 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
348 /* 1280x768@75Hz */
349 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
350 1488, 1696, 0, 768, 771, 778, 805, 0,
351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
352 /* 1280x768@85Hz */
353 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
354 1496, 1712, 0, 768, 771, 778, 809, 0,
355 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
356 /* 1280x800@60Hz */
357 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
358 1480, 1680, 0, 800, 803, 809, 831, 0,
359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
360 /* 1280x800@75Hz */
361 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
362 1488, 1696, 0, 800, 803, 809, 838, 0,
363 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
364 /* 1280x800@85Hz */
365 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
366 1496, 1712, 0, 800, 803, 809, 843, 0,
367 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
368 /* 1280x960@60Hz */
369 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
370 1488, 1800, 0, 960, 961, 964, 1000, 0,
371 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
372 /* 1280x960@85Hz */
373 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
374 1504, 1728, 0, 960, 961, 964, 1011, 0,
375 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
376 /* 1280x1024@60Hz */
377 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
378 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
379 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
380 /* 1280x1024@75Hz */
381 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
382 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
383 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
384 /* 1280x1024@85Hz */
385 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
386 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
387 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 /* 1360x768@60Hz */
389 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
390 1536, 1792, 0, 768, 771, 777, 795, 0,
391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
392 /* 1440x1050@60Hz */
393 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
394 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
396 /* 1440x1050@75Hz */
397 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
398 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 /* 1440x1050@85Hz */
401 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
402 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
403 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
404 /* 1440x900@60Hz */
405 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
406 1672, 1904, 0, 900, 903, 909, 934, 0,
407 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
408 /* 1440x900@75Hz */
409 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
410 1688, 1936, 0, 900, 903, 909, 942, 0,
411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
412 /* 1440x900@85Hz */
413 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
414 1696, 1952, 0, 900, 903, 909, 948, 0,
415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
416 /* 1600x1200@60Hz */
417 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
418 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
420 /* 1600x1200@65Hz */
421 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
422 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
424 /* 1600x1200@70Hz */
425 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
426 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
427 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
428 /* 1600x1200@75Hz */
429 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
430 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 /* 1600x1200@85Hz */
433 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
434 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
436 /* 1680x1050@60Hz */
437 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
438 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440 /* 1680x1050@75Hz */
441 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
442 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
444 /* 1680x1050@85Hz */
445 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
446 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
448 /* 1792x1344@60Hz */
449 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
450 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452 /* 1729x1344@75Hz */
453 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
454 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
456 /* 1853x1392@60Hz */
457 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
458 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
459 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
460 /* 1856x1392@75Hz */
461 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
462 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
463 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
464 /* 1920x1200@60Hz */
465 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
466 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
468 /* 1920x1200@75Hz */
469 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
470 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
471 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
472 /* 1920x1200@85Hz */
473 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
474 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
475 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
476 /* 1920x1440@60Hz */
477 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
478 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
480 /* 1920x1440@75Hz */
481 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
482 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
483 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
484 /* 2560x1600@60Hz */
485 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
486 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
487 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
488 /* 2560x1600@75HZ */
489 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
490 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
492 /* 2560x1600@85HZ */
493 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
494 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
495 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
496 };
497 static const int drm_num_dmt_modes =
498 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
499
500 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
501 int hsize, int vsize, int fresh)
502 {
503 int i;
504 struct drm_display_mode *ptr, *mode;
505
506 mode = NULL;
507 for (i = 0; i < drm_num_dmt_modes; i++) {
508 ptr = &drm_dmt_modes[i];
509 if (hsize == ptr->hdisplay &&
510 vsize == ptr->vdisplay &&
511 fresh == drm_mode_vrefresh(ptr)) {
512 /* get the expected default mode */
513 mode = drm_mode_duplicate(dev, ptr);
514 break;
515 }
516 }
517 return mode;
518 }
519
520 /*
521 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
522 * monitors fill with ascii space (0x20) instead.
523 */
524 static int
525 bad_std_timing(u8 a, u8 b)
526 {
527 return (a == 0x00 && b == 0x00) ||
528 (a == 0x01 && b == 0x01) ||
529 (a == 0x20 && b == 0x20);
530 }
531
532 /**
533 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
534 * @t: standard timing params
535 * @timing_level: standard timing level
536 *
537 * Take the standard timing params (in this case width, aspect, and refresh)
538 * and convert them into a real mode using CVT/GTF/DMT.
539 *
540 * Punts for now, but should eventually use the FB layer's CVT based mode
541 * generation code.
542 */
543 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
544 struct std_timing *t,
545 int revision,
546 int timing_level)
547 {
548 struct drm_display_mode *mode;
549 int hsize, vsize;
550 int vrefresh_rate;
551 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
552 >> EDID_TIMING_ASPECT_SHIFT;
553 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
554 >> EDID_TIMING_VFREQ_SHIFT;
555
556 if (bad_std_timing(t->hsize, t->vfreq_aspect))
557 return NULL;
558
559 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
560 hsize = t->hsize * 8 + 248;
561 /* vrefresh_rate = vfreq + 60 */
562 vrefresh_rate = vfreq + 60;
563 /* the vdisplay is calculated based on the aspect ratio */
564 if (aspect_ratio == 0) {
565 if (revision < 3)
566 vsize = hsize;
567 else
568 vsize = (hsize * 10) / 16;
569 } else if (aspect_ratio == 1)
570 vsize = (hsize * 3) / 4;
571 else if (aspect_ratio == 2)
572 vsize = (hsize * 4) / 5;
573 else
574 vsize = (hsize * 9) / 16;
575 /* HDTV hack */
576 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
577 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
578 false);
579 mode->hdisplay = 1366;
580 mode->vsync_start = mode->vsync_start - 1;
581 mode->vsync_end = mode->vsync_end - 1;
582 return mode;
583 }
584 mode = NULL;
585 /* check whether it can be found in default mode table */
586 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
587 if (mode)
588 return mode;
589
590 switch (timing_level) {
591 case LEVEL_DMT:
592 break;
593 case LEVEL_GTF:
594 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
595 break;
596 case LEVEL_CVT:
597 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
598 false);
599 break;
600 }
601 return mode;
602 }
603
604 /*
605 * EDID is delightfully ambiguous about how interlaced modes are to be
606 * encoded. Our internal representation is of frame height, but some
607 * HDTV detailed timings are encoded as field height.
608 *
609 * The format list here is from CEA, in frame size. Technically we
610 * should be checking refresh rate too. Whatever.
611 */
612 static void
613 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
614 struct detailed_pixel_timing *pt)
615 {
616 int i;
617 static const struct {
618 int w, h;
619 } cea_interlaced[] = {
620 { 1920, 1080 },
621 { 720, 480 },
622 { 1440, 480 },
623 { 2880, 480 },
624 { 720, 576 },
625 { 1440, 576 },
626 { 2880, 576 },
627 };
628 static const int n_sizes =
629 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
630
631 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
632 return;
633
634 for (i = 0; i < n_sizes; i++) {
635 if ((mode->hdisplay == cea_interlaced[i].w) &&
636 (mode->vdisplay == cea_interlaced[i].h / 2)) {
637 mode->vdisplay *= 2;
638 mode->vsync_start *= 2;
639 mode->vsync_end *= 2;
640 mode->vtotal *= 2;
641 mode->vtotal |= 1;
642 }
643 }
644
645 mode->flags |= DRM_MODE_FLAG_INTERLACE;
646 }
647
648 /**
649 * drm_mode_detailed - create a new mode from an EDID detailed timing section
650 * @dev: DRM device (needed to create new mode)
651 * @edid: EDID block
652 * @timing: EDID detailed timing info
653 * @quirks: quirks to apply
654 *
655 * An EDID detailed timing block contains enough info for us to create and
656 * return a new struct drm_display_mode.
657 */
658 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
659 struct edid *edid,
660 struct detailed_timing *timing,
661 u32 quirks)
662 {
663 struct drm_display_mode *mode;
664 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
665 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
666 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
667 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
668 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
669 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
670 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
671 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
672 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
673
674 /* ignore tiny modes */
675 if (hactive < 64 || vactive < 64)
676 return NULL;
677
678 if (pt->misc & DRM_EDID_PT_STEREO) {
679 printk(KERN_WARNING "stereo mode not supported\n");
680 return NULL;
681 }
682 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
683 printk(KERN_WARNING "composite sync not supported\n");
684 }
685
686 /* it is incorrect if hsync/vsync width is zero */
687 if (!hsync_pulse_width || !vsync_pulse_width) {
688 DRM_DEBUG_KMS("Incorrect Detailed timing. "
689 "Wrong Hsync/Vsync pulse width\n");
690 return NULL;
691 }
692 mode = drm_mode_create(dev);
693 if (!mode)
694 return NULL;
695
696 mode->type = DRM_MODE_TYPE_DRIVER;
697
698 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
699 timing->pixel_clock = cpu_to_le16(1088);
700
701 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
702
703 mode->hdisplay = hactive;
704 mode->hsync_start = mode->hdisplay + hsync_offset;
705 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
706 mode->htotal = mode->hdisplay + hblank;
707
708 mode->vdisplay = vactive;
709 mode->vsync_start = mode->vdisplay + vsync_offset;
710 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
711 mode->vtotal = mode->vdisplay + vblank;
712
713 /* Some EDIDs have bogus h/vtotal values */
714 if (mode->hsync_end > mode->htotal)
715 mode->htotal = mode->hsync_end + 1;
716 if (mode->vsync_end > mode->vtotal)
717 mode->vtotal = mode->vsync_end + 1;
718
719 drm_mode_set_name(mode);
720
721 drm_mode_do_interlace_quirk(mode, pt);
722
723 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
724 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
725 }
726
727 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
728 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
729 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
730 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
731
732 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
733 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
734
735 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
736 mode->width_mm *= 10;
737 mode->height_mm *= 10;
738 }
739
740 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
741 mode->width_mm = edid->width_cm * 10;
742 mode->height_mm = edid->height_cm * 10;
743 }
744
745 return mode;
746 }
747
748 /*
749 * Detailed mode info for the EDID "established modes" data to use.
750 */
751 static struct drm_display_mode edid_est_modes[] = {
752 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
753 968, 1056, 0, 600, 601, 605, 628, 0,
754 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
755 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
756 896, 1024, 0, 600, 601, 603, 625, 0,
757 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
758 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
759 720, 840, 0, 480, 481, 484, 500, 0,
760 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
761 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
762 704, 832, 0, 480, 489, 491, 520, 0,
763 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
764 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
765 768, 864, 0, 480, 483, 486, 525, 0,
766 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
767 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
768 752, 800, 0, 480, 490, 492, 525, 0,
769 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
770 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
771 846, 900, 0, 400, 421, 423, 449, 0,
772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
773 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
774 846, 900, 0, 400, 412, 414, 449, 0,
775 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
776 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
777 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
778 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
779 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
780 1136, 1312, 0, 768, 769, 772, 800, 0,
781 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
782 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
783 1184, 1328, 0, 768, 771, 777, 806, 0,
784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
785 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
786 1184, 1344, 0, 768, 771, 777, 806, 0,
787 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
788 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
789 1208, 1264, 0, 768, 768, 776, 817, 0,
790 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
791 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
792 928, 1152, 0, 624, 625, 628, 667, 0,
793 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
794 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
795 896, 1056, 0, 600, 601, 604, 625, 0,
796 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
797 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
798 976, 1040, 0, 600, 637, 643, 666, 0,
799 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
800 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
801 1344, 1600, 0, 864, 865, 868, 900, 0,
802 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
803 };
804
805 #define EDID_EST_TIMINGS 16
806 #define EDID_STD_TIMINGS 8
807 #define EDID_DETAILED_TIMINGS 4
808
809 /**
810 * add_established_modes - get est. modes from EDID and add them
811 * @edid: EDID block to scan
812 *
813 * Each EDID block contains a bitmap of the supported "established modes" list
814 * (defined above). Tease them out and add them to the global modes list.
815 */
816 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
817 {
818 struct drm_device *dev = connector->dev;
819 unsigned long est_bits = edid->established_timings.t1 |
820 (edid->established_timings.t2 << 8) |
821 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
822 int i, modes = 0;
823
824 for (i = 0; i <= EDID_EST_TIMINGS; i++)
825 if (est_bits & (1<<i)) {
826 struct drm_display_mode *newmode;
827 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
828 if (newmode) {
829 drm_mode_probed_add(connector, newmode);
830 modes++;
831 }
832 }
833
834 return modes;
835 }
836 /**
837 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
838 * @edid: EDID block to scan
839 */
840 static int standard_timing_level(struct edid *edid)
841 {
842 if (edid->revision >= 2) {
843 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
844 return LEVEL_CVT;
845 return LEVEL_GTF;
846 }
847 return LEVEL_DMT;
848 }
849
850 /**
851 * add_standard_modes - get std. modes from EDID and add them
852 * @edid: EDID block to scan
853 *
854 * Standard modes can be calculated using the CVT standard. Grab them from
855 * @edid, calculate them, and add them to the list.
856 */
857 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
858 {
859 struct drm_device *dev = connector->dev;
860 int i, modes = 0;
861 int timing_level;
862
863 timing_level = standard_timing_level(edid);
864
865 for (i = 0; i < EDID_STD_TIMINGS; i++) {
866 struct std_timing *t = &edid->standard_timings[i];
867 struct drm_display_mode *newmode;
868
869 /* If std timings bytes are 1, 1 it's empty */
870 if (t->hsize == 1 && t->vfreq_aspect == 1)
871 continue;
872
873 newmode = drm_mode_std(dev, &edid->standard_timings[i],
874 edid->revision, timing_level);
875 if (newmode) {
876 drm_mode_probed_add(connector, newmode);
877 modes++;
878 }
879 }
880
881 return modes;
882 }
883
884 /*
885 * XXX fix this for:
886 * - GTF secondary curve formula
887 * - EDID 1.4 range offsets
888 * - CVT extended bits
889 */
890 static bool
891 mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
892 {
893 struct detailed_data_monitor_range *range;
894 int hsync, vrefresh;
895
896 range = &timing->data.other_data.data.range;
897
898 hsync = drm_mode_hsync(mode);
899 vrefresh = drm_mode_vrefresh(mode);
900
901 if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
902 return false;
903
904 if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
905 return false;
906
907 if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
908 /* be forgiving since it's in units of 10MHz */
909 int max_clock = range->pixel_clock_mhz * 10 + 9;
910 max_clock *= 1000;
911 if (mode->clock > max_clock)
912 return false;
913 }
914
915 return true;
916 }
917
918 /*
919 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
920 * need to account for them.
921 */
922 static int drm_gtf_modes_for_range(struct drm_connector *connector,
923 struct detailed_timing *timing)
924 {
925 int i, modes = 0;
926 struct drm_display_mode *newmode;
927 struct drm_device *dev = connector->dev;
928
929 for (i = 0; i < drm_num_dmt_modes; i++) {
930 if (mode_in_range(drm_dmt_modes + i, timing)) {
931 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
932 if (newmode) {
933 drm_mode_probed_add(connector, newmode);
934 modes++;
935 }
936 }
937 }
938
939 return modes;
940 }
941
942 static int drm_cvt_modes(struct drm_connector *connector,
943 struct detailed_timing *timing)
944 {
945 int i, j, modes = 0;
946 struct drm_display_mode *newmode;
947 struct drm_device *dev = connector->dev;
948 struct cvt_timing *cvt;
949 const int rates[] = { 60, 85, 75, 60, 50 };
950 const u8 empty[3] = { 0, 0, 0 };
951
952 for (i = 0; i < 4; i++) {
953 int uninitialized_var(width), height;
954 cvt = &(timing->data.other_data.data.cvt[i]);
955
956 if (!memcmp(cvt->code, empty, 3))
957 continue;
958
959 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
960 switch (cvt->code[1] & 0x0c) {
961 case 0x00:
962 width = height * 4 / 3;
963 break;
964 case 0x04:
965 width = height * 16 / 9;
966 break;
967 case 0x08:
968 width = height * 16 / 10;
969 break;
970 case 0x0c:
971 width = height * 15 / 9;
972 break;
973 }
974
975 for (j = 1; j < 5; j++) {
976 if (cvt->code[2] & (1 << j)) {
977 newmode = drm_cvt_mode(dev, width, height,
978 rates[j], j == 0,
979 false, false);
980 if (newmode) {
981 drm_mode_probed_add(connector, newmode);
982 modes++;
983 }
984 }
985 }
986 }
987
988 return modes;
989 }
990
991 static int add_detailed_modes(struct drm_connector *connector,
992 struct detailed_timing *timing,
993 struct edid *edid, u32 quirks, int preferred)
994 {
995 int i, modes = 0;
996 struct detailed_non_pixel *data = &timing->data.other_data;
997 int timing_level = standard_timing_level(edid);
998 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
999 struct drm_display_mode *newmode;
1000 struct drm_device *dev = connector->dev;
1001
1002 if (timing->pixel_clock) {
1003 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1004 if (!newmode)
1005 return 0;
1006
1007 if (preferred)
1008 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1009
1010 drm_mode_probed_add(connector, newmode);
1011 return 1;
1012 }
1013
1014 /* other timing types */
1015 switch (data->type) {
1016 case EDID_DETAIL_MONITOR_RANGE:
1017 if (gtf)
1018 modes += drm_gtf_modes_for_range(connector, timing);
1019 break;
1020 case EDID_DETAIL_STD_MODES:
1021 /* Six modes per detailed section */
1022 for (i = 0; i < 6; i++) {
1023 struct std_timing *std;
1024 struct drm_display_mode *newmode;
1025
1026 std = &data->data.timings[i];
1027 newmode = drm_mode_std(dev, std, edid->revision,
1028 timing_level);
1029 if (newmode) {
1030 drm_mode_probed_add(connector, newmode);
1031 modes++;
1032 }
1033 }
1034 break;
1035 case EDID_DETAIL_CVT_3BYTE:
1036 modes += drm_cvt_modes(connector, timing);
1037 break;
1038 default:
1039 break;
1040 }
1041
1042 return modes;
1043 }
1044
1045 /**
1046 * add_detailed_info - get detailed mode info from EDID data
1047 * @connector: attached connector
1048 * @edid: EDID block to scan
1049 * @quirks: quirks to apply
1050 *
1051 * Some of the detailed timing sections may contain mode information. Grab
1052 * it and add it to the list.
1053 */
1054 static int add_detailed_info(struct drm_connector *connector,
1055 struct edid *edid, u32 quirks)
1056 {
1057 int i, modes = 0;
1058
1059 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1060 struct detailed_timing *timing = &edid->detailed_timings[i];
1061 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1062
1063 /* In 1.0, only timings are allowed */
1064 if (!timing->pixel_clock && edid->version == 1 &&
1065 edid->revision == 0)
1066 continue;
1067
1068 modes += add_detailed_modes(connector, timing, edid, quirks,
1069 preferred);
1070 }
1071
1072 return modes;
1073 }
1074
1075 /**
1076 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1077 * EDID block
1078 * @connector: attached connector
1079 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1080 * @quirks: quirks to apply
1081 *
1082 * Some of the detailed timing sections may contain mode information. Grab
1083 * it and add it to the list.
1084 */
1085 static int add_detailed_info_eedid(struct drm_connector *connector,
1086 struct edid *edid, u32 quirks)
1087 {
1088 int i, modes = 0;
1089 char *edid_ext = NULL;
1090 struct detailed_timing *timing;
1091 int edid_ext_num;
1092 int start_offset, end_offset;
1093 int timing_level;
1094
1095 if (edid->version == 1 && edid->revision < 3) {
1096 /* If the EDID version is less than 1.3, there is no
1097 * extension EDID.
1098 */
1099 return 0;
1100 }
1101 if (!edid->extensions) {
1102 /* if there is no extension EDID, it is unnecessary to
1103 * parse the E-EDID to get detailed info
1104 */
1105 return 0;
1106 }
1107
1108 /* Chose real EDID extension number */
1109 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1110 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1111
1112 /* Find CEA extension */
1113 for (i = 0; i < edid_ext_num; i++) {
1114 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1115 /* This block is CEA extension */
1116 if (edid_ext[0] == 0x02)
1117 break;
1118 }
1119
1120 if (i == edid_ext_num) {
1121 /* if there is no additional timing EDID block, return */
1122 return 0;
1123 }
1124
1125 /* Get the start offset of detailed timing block */
1126 start_offset = edid_ext[2];
1127 if (start_offset == 0) {
1128 /* If the start_offset is zero, it means that neither detailed
1129 * info nor data block exist. In such case it is also
1130 * unnecessary to parse the detailed timing info.
1131 */
1132 return 0;
1133 }
1134
1135 timing_level = standard_timing_level(edid);
1136 end_offset = EDID_LENGTH;
1137 end_offset -= sizeof(struct detailed_timing);
1138 for (i = start_offset; i < end_offset;
1139 i += sizeof(struct detailed_timing)) {
1140 timing = (struct detailed_timing *)(edid_ext + i);
1141 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1142 }
1143
1144 return modes;
1145 }
1146
1147 #define DDC_ADDR 0x50
1148 /**
1149 * Get EDID information via I2C.
1150 *
1151 * \param adapter : i2c device adaptor
1152 * \param buf : EDID data buffer to be filled
1153 * \param len : EDID data buffer length
1154 * \return 0 on success or -1 on failure.
1155 *
1156 * Try to fetch EDID information by calling i2c driver function.
1157 */
1158 int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
1159 unsigned char *buf, int len)
1160 {
1161 unsigned char start = 0x0;
1162 struct i2c_msg msgs[] = {
1163 {
1164 .addr = DDC_ADDR,
1165 .flags = 0,
1166 .len = 1,
1167 .buf = &start,
1168 }, {
1169 .addr = DDC_ADDR,
1170 .flags = I2C_M_RD,
1171 .len = len,
1172 .buf = buf,
1173 }
1174 };
1175
1176 if (i2c_transfer(adapter, msgs, 2) == 2)
1177 return 0;
1178
1179 return -1;
1180 }
1181 EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1182
1183 static int drm_ddc_read_edid(struct drm_connector *connector,
1184 struct i2c_adapter *adapter,
1185 char *buf, int len)
1186 {
1187 int i;
1188
1189 for (i = 0; i < 4; i++) {
1190 if (drm_do_probe_ddc_edid(adapter, buf, len))
1191 return -1;
1192 if (drm_edid_is_valid((struct edid *)buf))
1193 return 0;
1194 }
1195
1196 /* repeated checksum failures; warn, but carry on */
1197 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1198 drm_get_connector_name(connector));
1199 return -1;
1200 }
1201
1202 /**
1203 * drm_get_edid - get EDID data, if available
1204 * @connector: connector we're probing
1205 * @adapter: i2c adapter to use for DDC
1206 *
1207 * Poke the given connector's i2c channel to grab EDID data if possible.
1208 *
1209 * Return edid data or NULL if we couldn't find any.
1210 */
1211 struct edid *drm_get_edid(struct drm_connector *connector,
1212 struct i2c_adapter *adapter)
1213 {
1214 int ret;
1215 struct edid *edid;
1216
1217 edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),
1218 GFP_KERNEL);
1219 if (edid == NULL) {
1220 dev_warn(&connector->dev->pdev->dev,
1221 "Failed to allocate EDID\n");
1222 goto end;
1223 }
1224
1225 /* Read first EDID block */
1226 ret = drm_ddc_read_edid(connector, adapter,
1227 (unsigned char *)edid, EDID_LENGTH);
1228 if (ret != 0)
1229 goto clean_up;
1230
1231 /* There are EDID extensions to be read */
1232 if (edid->extensions != 0) {
1233 int edid_ext_num = edid->extensions;
1234
1235 if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) {
1236 dev_warn(&connector->dev->pdev->dev,
1237 "The number of extension(%d) is "
1238 "over max (%d), actually read number (%d)\n",
1239 edid_ext_num, DRM_MAX_EDID_EXT_NUM,
1240 DRM_MAX_EDID_EXT_NUM);
1241 /* Reset EDID extension number to be read */
1242 edid_ext_num = DRM_MAX_EDID_EXT_NUM;
1243 }
1244 /* Read EDID including extensions too */
1245 ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1246 EDID_LENGTH * (edid_ext_num + 1));
1247 if (ret != 0)
1248 goto clean_up;
1249
1250 }
1251
1252 connector->display_info.raw_edid = (char *)edid;
1253 goto end;
1254
1255 clean_up:
1256 kfree(edid);
1257 edid = NULL;
1258 end:
1259 return edid;
1260
1261 }
1262 EXPORT_SYMBOL(drm_get_edid);
1263
1264 #define HDMI_IDENTIFIER 0x000C03
1265 #define VENDOR_BLOCK 0x03
1266 /**
1267 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1268 * @edid: monitor EDID information
1269 *
1270 * Parse the CEA extension according to CEA-861-B.
1271 * Return true if HDMI, false if not or unknown.
1272 */
1273 bool drm_detect_hdmi_monitor(struct edid *edid)
1274 {
1275 char *edid_ext = NULL;
1276 int i, hdmi_id, edid_ext_num;
1277 int start_offset, end_offset;
1278 bool is_hdmi = false;
1279
1280 /* No EDID or EDID extensions */
1281 if (edid == NULL || edid->extensions == 0)
1282 goto end;
1283
1284 /* Chose real EDID extension number */
1285 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1286 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1287
1288 /* Find CEA extension */
1289 for (i = 0; i < edid_ext_num; i++) {
1290 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1291 /* This block is CEA extension */
1292 if (edid_ext[0] == 0x02)
1293 break;
1294 }
1295
1296 if (i == edid_ext_num)
1297 goto end;
1298
1299 /* Data block offset in CEA extension block */
1300 start_offset = 4;
1301 end_offset = edid_ext[2];
1302
1303 /*
1304 * Because HDMI identifier is in Vendor Specific Block,
1305 * search it from all data blocks of CEA extension.
1306 */
1307 for (i = start_offset; i < end_offset;
1308 /* Increased by data block len */
1309 i += ((edid_ext[i] & 0x1f) + 1)) {
1310 /* Find vendor specific block */
1311 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1312 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1313 edid_ext[i + 3] << 16;
1314 /* Find HDMI identifier */
1315 if (hdmi_id == HDMI_IDENTIFIER)
1316 is_hdmi = true;
1317 break;
1318 }
1319 }
1320
1321 end:
1322 return is_hdmi;
1323 }
1324 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1325
1326 /**
1327 * drm_add_edid_modes - add modes from EDID data, if available
1328 * @connector: connector we're probing
1329 * @edid: edid data
1330 *
1331 * Add the specified modes to the connector's mode list.
1332 *
1333 * Return number of modes added or 0 if we couldn't find any.
1334 */
1335 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1336 {
1337 int num_modes = 0;
1338 u32 quirks;
1339
1340 if (edid == NULL) {
1341 return 0;
1342 }
1343 if (!drm_edid_is_valid(edid)) {
1344 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1345 drm_get_connector_name(connector));
1346 return 0;
1347 }
1348
1349 quirks = edid_get_quirks(edid);
1350
1351 num_modes += add_established_modes(connector, edid);
1352 num_modes += add_standard_modes(connector, edid);
1353 num_modes += add_detailed_info(connector, edid, quirks);
1354 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1355
1356 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1357 edid_fixup_preferred(connector, quirks);
1358
1359 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1360 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1361 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1362 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1363 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1364 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1365 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1366 connector->display_info.width_mm = edid->width_cm * 10;
1367 connector->display_info.height_mm = edid->height_cm * 10;
1368 connector->display_info.gamma = edid->gamma;
1369 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1370 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1371 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1372 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1373 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1374 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1375 connector->display_info.gamma = edid->gamma;
1376
1377 return num_modes;
1378 }
1379 EXPORT_SYMBOL(drm_add_edid_modes);
1380
1381 /**
1382 * drm_add_modes_noedid - add modes for the connectors without EDID
1383 * @connector: connector we're probing
1384 * @hdisplay: the horizontal display limit
1385 * @vdisplay: the vertical display limit
1386 *
1387 * Add the specified modes to the connector's mode list. Only when the
1388 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1389 *
1390 * Return number of modes added or 0 if we couldn't find any.
1391 */
1392 int drm_add_modes_noedid(struct drm_connector *connector,
1393 int hdisplay, int vdisplay)
1394 {
1395 int i, count, num_modes = 0;
1396 struct drm_display_mode *mode, *ptr;
1397 struct drm_device *dev = connector->dev;
1398
1399 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1400 if (hdisplay < 0)
1401 hdisplay = 0;
1402 if (vdisplay < 0)
1403 vdisplay = 0;
1404
1405 for (i = 0; i < count; i++) {
1406 ptr = &drm_dmt_modes[i];
1407 if (hdisplay && vdisplay) {
1408 /*
1409 * Only when two are valid, they will be used to check
1410 * whether the mode should be added to the mode list of
1411 * the connector.
1412 */
1413 if (ptr->hdisplay > hdisplay ||
1414 ptr->vdisplay > vdisplay)
1415 continue;
1416 }
1417 if (drm_mode_vrefresh(ptr) > 61)
1418 continue;
1419 mode = drm_mode_duplicate(dev, ptr);
1420 if (mode) {
1421 drm_mode_probed_add(connector, mode);
1422 num_modes++;
1423 }
1424 }
1425 return num_modes;
1426 }
1427 EXPORT_SYMBOL(drm_add_modes_noedid);
WandBoard kernel