usb gadget: fix fsl_usb2_udc potential OOPS
[wandboard.git] / include / asm-parisc / pgtable.h
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1 #ifndef _PARISC_PGTABLE_H
2 #define _PARISC_PGTABLE_H
4 #include <asm-generic/4level-fixup.h>
6 #include <asm/fixmap.h>
8 #ifndef __ASSEMBLY__
9 /*
10 * we simulate an x86-style page table for the linux mm code
13 #include <linux/mm.h> /* for vm_area_struct */
14 #include <linux/bitops.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >=
21 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
22 * require a hash-, or multi-level tree-lookup or something of that
23 * sort) but it guarantees to return TRUE only if accessing the page
24 * at that address does not cause an error. Note that there may be
25 * addresses for which kern_addr_valid() returns FALSE even though an
26 * access would not cause an error (e.g., this is typically true for
27 * memory mapped I/O regions.
29 * XXX Need to implement this for parisc.
31 #define kern_addr_valid(addr) (1)
33 /* Certain architectures need to do special things when PTEs
34 * within a page table are directly modified. Thus, the following
35 * hook is made available.
37 #define set_pte(pteptr, pteval) \
38 do{ \
39 *(pteptr) = (pteval); \
40 } while(0)
41 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
43 #endif /* !__ASSEMBLY__ */
45 #define pte_ERROR(e) \
46 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
47 #define pmd_ERROR(e) \
48 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
49 #define pgd_ERROR(e) \
50 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
52 /* This is the size of the initially mapped kernel memory */
53 #ifdef CONFIG_64BIT
54 #define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
55 #else
56 #define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
57 #endif
58 #define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
60 #if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
61 #define PT_NLEVELS 3
62 #define PGD_ORDER 1 /* Number of pages per pgd */
63 #define PMD_ORDER 1 /* Number of pages per pmd */
64 #define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
65 #else
66 #define PT_NLEVELS 2
67 #define PGD_ORDER 1 /* Number of pages per pgd */
68 #define PGD_ALLOC_ORDER PGD_ORDER
69 #endif
71 /* Definitions for 3rd level (we use PLD here for Page Lower directory
72 * because PTE_SHIFT is used lower down to mean shift that has to be
73 * done to get usable bits out of the PTE) */
74 #define PLD_SHIFT PAGE_SHIFT
75 #define PLD_SIZE PAGE_SIZE
76 #define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
77 #define PTRS_PER_PTE (1UL << BITS_PER_PTE)
79 /* Definitions for 2nd level */
80 #define pgtable_cache_init() do { } while (0)
82 #define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
83 #define PMD_SIZE (1UL << PMD_SHIFT)
84 #define PMD_MASK (~(PMD_SIZE-1))
85 #if PT_NLEVELS == 3
86 #define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
87 #else
88 #define BITS_PER_PMD 0
89 #endif
90 #define PTRS_PER_PMD (1UL << BITS_PER_PMD)
92 /* Definitions for 1st level */
93 #define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
94 #define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
95 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96 #define PGDIR_MASK (~(PGDIR_SIZE-1))
97 #define PTRS_PER_PGD (1UL << BITS_PER_PGD)
98 #define USER_PTRS_PER_PGD PTRS_PER_PGD
100 #define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
101 #define MAX_ADDRESS (1UL << MAX_ADDRBITS)
103 #define SPACEID_SHIFT (MAX_ADDRBITS - 32)
105 /* This calculates the number of initial pages we need for the initial
106 * page tables */
107 #if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
108 # define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
109 #else
110 # define PT_INITIAL (1) /* all initial PTEs fit into one page */
111 #endif
114 * pgd entries used up by user/kernel:
117 #define FIRST_USER_ADDRESS 0
119 #ifndef __ASSEMBLY__
120 extern void *vmalloc_start;
121 #define PCXL_DMA_MAP_SIZE (8*1024*1024)
122 #define VMALLOC_START ((unsigned long)vmalloc_start)
123 /* this is a fixmap remnant, see fixmap.h */
124 #define VMALLOC_END (KERNEL_MAP_END)
125 #endif
127 /* NB: The tlb miss handlers make certain assumptions about the order */
128 /* of the following bits, so be careful (One example, bits 25-31 */
129 /* are moved together in one instruction). */
131 #define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
132 #define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
133 #define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
134 #define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
135 #define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
136 #define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
137 #define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
138 #define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
139 #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
140 #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
141 #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
142 #define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
143 /* for cache flushing only */
144 #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
146 /* N.B. The bits are defined in terms of a 32 bit word above, so the */
147 /* following macro is ok for both 32 and 64 bit. */
149 #define xlate_pabit(x) (31 - x)
151 /* this defines the shift to the usable bits in the PTE it is set so
152 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
153 * to zero */
154 #define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
156 /* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
157 #define PFN_PTE_SHIFT 12
160 /* this is how many bits may be used by the file functions */
161 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
163 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
164 #define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
166 #define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
167 #define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
168 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
169 #define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
170 #define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
171 #define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
172 #define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
173 #define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
174 #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
175 #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
176 #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
177 #define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
178 #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
179 #define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
181 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
182 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
183 #define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
185 /* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
186 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
187 * for a few meta-information bits, so we shift the address to be
188 * able to effectively address 40/42/44-bits of physical address space
189 * depending on 4k/16k/64k PAGE_SIZE */
190 #define _PxD_PRESENT_BIT 31
191 #define _PxD_ATTACHED_BIT 30
192 #define _PxD_VALID_BIT 29
194 #define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
195 #define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
196 #define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
197 #define PxD_FLAG_MASK (0xf)
198 #define PxD_FLAG_SHIFT (4)
199 #define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
201 #ifndef __ASSEMBLY__
203 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
204 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
205 /* Others seem to make this executable, I don't know if that's correct
206 or not. The stack is mapped this way though so this is necessary
207 in the short term - dhd@linuxcare.com, 2000-08-08 */
208 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
209 #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
210 #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
211 #define PAGE_COPY PAGE_EXECREAD
212 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
213 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
214 #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
215 #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
216 #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
217 #define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
221 * We could have an execute only page using "gateway - promote to priv
222 * level 3", but that is kind of silly. So, the way things are defined
223 * now, we must always have read permission for pages with execute
224 * permission. For the fun of it we'll go ahead and support write only
225 * pages.
228 /*xwr*/
229 #define __P000 PAGE_NONE
230 #define __P001 PAGE_READONLY
231 #define __P010 __P000 /* copy on write */
232 #define __P011 __P001 /* copy on write */
233 #define __P100 PAGE_EXECREAD
234 #define __P101 PAGE_EXECREAD
235 #define __P110 __P100 /* copy on write */
236 #define __P111 __P101 /* copy on write */
238 #define __S000 PAGE_NONE
239 #define __S001 PAGE_READONLY
240 #define __S010 PAGE_WRITEONLY
241 #define __S011 PAGE_SHARED
242 #define __S100 PAGE_EXECREAD
243 #define __S101 PAGE_EXECREAD
244 #define __S110 PAGE_RWX
245 #define __S111 PAGE_RWX
248 extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
250 /* initial page tables for 0-8MB for kernel */
252 extern pte_t pg0[];
254 /* zero page used for uninitialized stuff */
256 extern unsigned long *empty_zero_page;
259 * ZERO_PAGE is a global shared page that is always zero: used
260 * for zero-mapped memory areas etc..
263 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
265 #define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
266 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
267 #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
269 #define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
270 #define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
271 #define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
272 #define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
274 #if PT_NLEVELS == 3
275 /* The first entry of the permanent pmd is not there if it contains
276 * the gateway marker */
277 #define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
278 #else
279 #define pmd_none(x) (!pmd_val(x))
280 #endif
281 #define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
282 #define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
283 static inline void pmd_clear(pmd_t *pmd) {
284 #if PT_NLEVELS == 3
285 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
286 /* This is the entry pointing to the permanent pmd
287 * attached to the pgd; cannot clear it */
288 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
289 else
290 #endif
291 __pmd_val_set(*pmd, 0);
296 #if PT_NLEVELS == 3
297 #define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
298 #define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
300 /* For 64 bit we have three level tables */
302 #define pgd_none(x) (!pgd_val(x))
303 #define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
304 #define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
305 static inline void pgd_clear(pgd_t *pgd) {
306 #if PT_NLEVELS == 3
307 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
308 /* This is the permanent pmd attached to the pgd; cannot
309 * free it */
310 return;
311 #endif
312 __pgd_val_set(*pgd, 0);
314 #else
316 * The "pgd_xxx()" functions here are trivial for a folded two-level
317 * setup: the pgd is never bad, and a pmd always exists (as it's folded
318 * into the pgd entry)
320 static inline int pgd_none(pgd_t pgd) { return 0; }
321 static inline int pgd_bad(pgd_t pgd) { return 0; }
322 static inline int pgd_present(pgd_t pgd) { return 1; }
323 static inline void pgd_clear(pgd_t * pgdp) { }
324 #endif
327 * The following only work if pte_present() is true.
328 * Undefined behaviour if not..
330 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
331 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
332 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
333 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
335 static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
336 static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
337 static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
338 static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
339 static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
340 static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
343 * Conversion functions: convert a page and protection to a page entry,
344 * and a page entry and page directory to the page they refer to.
346 #define __mk_pte(addr,pgprot) \
347 ({ \
348 pte_t __pte; \
350 pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
352 __pte; \
355 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
357 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
359 pte_t pte;
360 pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
361 return pte;
364 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
365 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
367 /* Permanent address of a page. On parisc we don't have highmem. */
369 #define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
371 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
373 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd)))
375 #define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
376 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
378 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
380 /* to find an entry in a page-table-directory */
381 #define pgd_offset(mm, address) \
382 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
384 /* to find an entry in a kernel page-table-directory */
385 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
387 /* Find an entry in the second-level page table.. */
389 #if PT_NLEVELS == 3
390 #define pmd_offset(dir,address) \
391 ((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
392 #else
393 #define pmd_offset(dir,addr) ((pmd_t *) dir)
394 #endif
396 /* Find an entry in the third-level page table.. */
397 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
398 #define pte_offset_kernel(pmd, address) \
399 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
400 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
401 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
402 #define pte_unmap(pte) do { } while (0)
403 #define pte_unmap_nested(pte) do { } while (0)
405 #define pte_unmap(pte) do { } while (0)
406 #define pte_unmap_nested(pte) do { } while (0)
408 extern void paging_init (void);
410 /* Used for deferring calls to flush_dcache_page() */
412 #define PG_dcache_dirty PG_arch_1
414 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
416 /* Encode and de-code a swap entry */
418 #define __swp_type(x) ((x).val & 0x1f)
419 #define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
420 (((x).val >> 8) & ~0x7) )
421 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
422 ((offset & 0x7) << 6) | \
423 ((offset & ~0x7) << 8) })
424 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
425 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
427 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
429 #ifdef CONFIG_SMP
430 if (!pte_young(*ptep))
431 return 0;
432 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
433 #else
434 pte_t pte = *ptep;
435 if (!pte_young(pte))
436 return 0;
437 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
438 return 1;
439 #endif
442 extern spinlock_t pa_dbit_lock;
444 struct mm_struct;
445 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
447 pte_t old_pte;
448 pte_t pte;
450 spin_lock(&pa_dbit_lock);
451 pte = old_pte = *ptep;
452 pte_val(pte) &= ~_PAGE_PRESENT;
453 pte_val(pte) |= _PAGE_FLUSH;
454 set_pte_at(mm,addr,ptep,pte);
455 spin_unlock(&pa_dbit_lock);
457 return old_pte;
460 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
462 #ifdef CONFIG_SMP
463 unsigned long new, old;
465 do {
466 old = pte_val(*ptep);
467 new = pte_val(pte_wrprotect(__pte (old)));
468 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
469 #else
470 pte_t old_pte = *ptep;
471 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
472 #endif
475 #define pte_same(A,B) (pte_val(A) == pte_val(B))
477 #endif /* !__ASSEMBLY__ */
480 /* TLB page size encoding - see table 3-1 in parisc20.pdf */
481 #define _PAGE_SIZE_ENCODING_4K 0
482 #define _PAGE_SIZE_ENCODING_16K 1
483 #define _PAGE_SIZE_ENCODING_64K 2
484 #define _PAGE_SIZE_ENCODING_256K 3
485 #define _PAGE_SIZE_ENCODING_1M 4
486 #define _PAGE_SIZE_ENCODING_4M 5
487 #define _PAGE_SIZE_ENCODING_16M 6
488 #define _PAGE_SIZE_ENCODING_64M 7
490 #if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
491 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
492 #elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
493 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
494 #elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
495 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
496 #endif
499 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
500 remap_pfn_range(vma, vaddr, pfn, size, prot)
502 #define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
504 /* We provide our own get_unmapped_area to provide cache coherency */
506 #define HAVE_ARCH_UNMAPPED_AREA
508 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
509 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
510 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
511 #define __HAVE_ARCH_PTE_SAME
512 #include <asm-generic/pgtable.h>
514 #endif /* _PARISC_PGTABLE_H */